Nut/OS  5.0.5
API Reference
stm32_dma.h
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00001 /*
00002  * Copyright (C) 2010 by Ulrich Prinz (uprinz2@netscape.net)
00003  * Copyright (C) 2010 by Nikolaj Zamotaev. All rights reserved.
00004  * Copyright (C) 2012 by Uwe Bonnes(bon@elektron.ikp.physik.tu-darmstadt.de)
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  *
00010  * 1. Redistributions of source code must retain the above copyright
00011  *    notice, this list of conditions and the following disclaimer.
00012  * 2. Redistributions in binary form must reproduce the above copyright
00013  *    notice, this list of conditions and the following disclaimer in the
00014  *    documentation and/or other materials provided with the distribution.
00015  * 3. Neither the name of the copyright holders nor the names of
00016  *    contributors may be used to endorse or promote products derived
00017  *    from this software without specific prior written permission.
00018  *
00019  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00020  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00021  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00022  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00023  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00024  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00025  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00026  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00027  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00028  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00029  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00030  * SUCH DAMAGE.
00031  *
00032  * For additional information see http://www.ethernut.de/
00033  *
00034  */
00035 
00036 /*
00037  * \verbatim
00038  * $Id$
00039  * \endverbatim
00040  */
00041 
00042 #include <cfg/arch.h>
00043 
00044 #if defined(MCU_STM32F1)||defined(MCU_STM32L1)
00045 #include <arch/cm3/stm/stm32f1_dma.h>
00046 #elif  defined(MCU_STM32F2)||defined(MCU_STM32F4)
00047 #include <arch/cm3/stm/stm32f2_dma.h>
00048 #else
00049 #warning "STM32 family has no implemented DMA"
00050 #endif
00051 
00055 #define DMA_TEIF 0x8  /*< Channel x Transfer Error Flag */
00056 #define DMA_HTIF 0x4  /*< Channel x Half Transfer Complete Flag */
00057 #define DMA_TCIF 0x2  /*< Channel x Transfer Complete Flag */
00058 #define DMA_GIF  0x1  /*< Channel x Global Interrupt Flag */
00059 
00060 #define DMA_FLAGMASK 0xF
00061 #define DMA_IRQMASK  0x1
00062 
00063 #define DMA_CONTROL0 0x00
00064 #define DMA_CONTROL1 0x80
00065 #define DMA_STREAM0  0x00
00066 #define DMA_STREAM1  0x10
00067 #define DMA_STREAM2  0x20
00068 #define DMA_STREAM3  0x30
00069 #define DMA_STREAM4  0x40
00070 #define DMA_STREAM5  0x50
00071 #define DMA_STREAM6  0x60
00072 #define DMA_STREAM7  0x70
00073 #define DMA_CHANNEL0 0x00
00074 #define DMA_CHANNEL1 0x01
00075 #define DMA_CHANNEL2 0x02
00076 #define DMA_CHANNEL3 0x03
00077 #define DMA_CHANNEL4 0x04
00078 #define DMA_CHANNEL5 0x05
00079 #define DMA_CHANNEL6 0x06
00080 #define DMA_CHANNEL7 0x07
00081 
00082 /*
00083  * DMA Handles and Interrupt Entry Points
00084  */
00085 extern void Dma1IrqEntry(void *arg);
00086 #ifdef STM_HAS_DMA2
00087 extern void Dma2IrqEntry(void *arg);
00088 #endif
00089 
00090 /*
00091  * DMA Control Functions
00092  */
00093 void DMA_Setup( uint8_t ch, void* dst, void* src, uint16_t length, uint32_t flags);
00094 void DMA_Enable(uint8_t ch);
00095 void DMA_Disable(uint8_t ch);
00096 void DMA_Init(void);
00097 void DMA_IrqMask( uint8_t ch, uint32_t mask, uint8_t ena);
00098 void DMA_ClearFlag( uint8_t ch, uint32_t flags);
00099 uint32_t DMA_GetFlag( uint8_t ch);
00100