Nut/OS  4.10.3
API Reference
arm.h
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00001 #ifndef _ARCH_ARM_H_
00002 #define _ARCH_ARM_H_
00003 
00004 /*
00005  * Copyright (C) 2001-2006 by egnite Software GmbH. All rights reserved.
00006  *
00007  * Redistribution and use in source and binary forms, with or without
00008  * modification, are permitted provided that the following conditions
00009  * are met:
00010  *
00011  * 1. Redistributions of source code must retain the above copyright
00012  *    notice, this list of conditions and the following disclaimer.
00013  * 2. Redistributions in binary form must reproduce the above copyright
00014  *    notice, this list of conditions and the following disclaimer in the
00015  *    documentation and/or other materials provided with the distribution.
00016  * 3. Neither the name of the copyright holders nor the names of
00017  *    contributors may be used to endorse or promote products derived
00018  *    from this software without specific prior written permission.
00019  *
00020  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00021  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00022  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00023  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00024  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00025  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00026  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00027  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00028  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00029  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00030  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00031  * SUCH DAMAGE.
00032  *
00033  * For additional information see http://www.ethernut.de/
00034  */
00035 
00036 /*
00037  * $Log$
00038  * Revision 1.22  2009/02/17 09:34:34  haraldkipp
00039  * Added inline assembler macros for reading/writing coprocessor CP15
00040  * control register.
00041  *
00042  * Revision 1.21  2009/01/16 19:45:42  haraldkipp
00043  * All ARM code is now running in system mode.
00044  *
00045  * Revision 1.20  2008/08/06 12:51:09  haraldkipp
00046  * Added support for Ethernut 5 (AT91SAM9XE reference design).
00047  *
00048  * Revision 1.19  2008/02/15 17:00:24  haraldkipp
00049  * Spport for AT91SAM7SE512 added.
00050  *
00051  * Revision 1.18  2007/10/04 20:29:08  olereinhardt
00052  * Support for SAM7S256 added
00053  *
00054  * Revision 1.17  2007/05/02 11:32:07  haraldkipp
00055  * Mapping of Harvard specific stdio functions moved to stdio.h and io.h.
00056  *
00057  * Revision 1.16  2006/08/31 19:04:08  haraldkipp
00058  * Added support for the AT91SAM9260 and Atmel's AT91SAM9260 Evaluation Kit.
00059  *
00060  * Revision 1.15  2006/08/05 11:58:22  haraldkipp
00061  * Missing brackets may result in unexpected expansion of the _BV() macro.
00062  *
00063  * Revision 1.14  2006/08/01 07:35:59  haraldkipp
00064  * Exclude function prototypes when included by assembler.
00065  *
00066  * Revision 1.13  2006/07/21 09:08:58  haraldkipp
00067  * Map puts_P to puts and _write_P to _write for non-Harvard architectures.
00068  *
00069  * Revision 1.12  2006/07/10 14:27:03  haraldkipp
00070  * C++ will use main instead of NutAppMain. Contributed by Matthias Wilde.
00071  *
00072  * Revision 1.11  2006/07/05 07:45:25  haraldkipp
00073  * Split on-chip interface definitions.
00074  *
00075  * Revision 1.10  2006/06/28 17:22:34  haraldkipp
00076  * Make it compile for AT91SAM7X256.
00077  *
00078  * Revision 1.9  2006/05/25 09:35:27  haraldkipp
00079  * Dummy macros added to support the avr-libc special function register
00080  * definitions.
00081  *
00082  * Revision 1.8  2006/03/16 15:25:26  haraldkipp
00083  * Changed human readable strings from u_char to char to stop GCC 4 from
00084  * nagging about signedness.
00085  *
00086  * Revision 1.7  2006/03/02 20:02:05  haraldkipp
00087  * Added a few macros to allow compilation with ICCARM.
00088  *
00089  * Revision 1.6  2006/02/23 15:34:00  haraldkipp
00090  * Support for Philips LPC2xxx Family and LPC-E2294 Board from Olimex added.
00091  * Many thanks to Michael Fischer for this port.
00092  *
00093  * Revision 1.5  2005/11/20 14:45:15  haraldkipp
00094  * Define printf_P for non Harvard architectures.
00095  *
00096  * Revision 1.4  2005/10/24 18:03:02  haraldkipp
00097  * GameBoy header file added.
00098  *
00099  * Revision 1.3  2005/10/24 10:35:05  haraldkipp
00100  * Port I/O macros added.
00101  *
00102  * Revision 1.2  2004/09/08 10:24:26  haraldkipp
00103  * RAMSTART is too platform dependant
00104  *
00105  * Revision 1.1  2004/03/16 16:48:28  haraldkipp
00106  * Added Jan Dubiec's H8/300 port.
00107  *
00108  * Revision 1.1  2004/02/01 18:49:47  haraldkipp
00109  * Added CPU family support
00110  *
00111  */
00112 
00113 #include <cfg/arch.h>
00114 #if defined (MCU_AT91)
00115 #include <arch/arm/at91.h>
00116 #elif defined (MCU_GBA)
00117 #include <arch/arm/gba.h>
00118 #elif defined (MCU_LPC2XXX)
00119 #include <arch/arm/lpc2xxx.h>
00120 #endif
00121 
00122 #ifndef __ASSEMBLER__
00123 #include <dev/mweeprom.h>
00124 #endif
00125 
00126 #define ARM_MODE_USER       0x10
00127 #define ARM_MODE_FIQ        0x11
00128 #define ARM_MODE_IRQ        0x12
00129 #define ARM_MODE_SVC        0x13
00130 #define ARM_MODE_ABORT      0x17
00131 #define ARM_MODE_UNDEF      0x1B
00132 #define ARM_MODE_SYS        0x1F
00133 #define ARM_MODE_MASK       0x1F
00134 
00135 #define I_BIT               0x80
00136 #define ARM_CPSR_I_BIT      0x80
00137 #define F_BIT               0x40
00138 #define ARM_CPSR_F_BIT      0x40
00139 #define T_BIT               0x20
00140 #define ARM_CPSR_T_BIT      0x20
00141 
00142 #ifdef __GNUC__
00143 #define CONST      const
00144 #define INLINE     inline
00145 #else
00146 #ifndef CONST
00147 #define CONST      const
00148 #endif
00149 #ifndef INLINE
00150 #define INLINE
00151 #endif
00152 #endif
00153 
00154 #define PSTR(p)    (p)
00155 #define PRG_RDB(p) (*((const char *)(p)))
00156 
00157 #define prog_char  const char
00158 #define PGM_P      prog_char *
00159 
00160 #define SIGNAL(x)  __attribute__((interrupt_handler)) void x(void)
00161 #define RAMFUNC __attribute__ ((long_call, section (".ramfunc")))
00162 
00163 #if !defined(__arm__) && !defined(__cplusplus)
00164 #define main       NutAppMain
00165 #endif
00166 
00167 #define strlen_P(x)             strlen((char *)(x))
00168 #define strcpy_P(x,y)           strcpy(x,(char *)(y))
00169 #define strcat_P(x,y)           strcat(x,(char *)(y))
00170 
00171 #define strcmp_P(x, y)          strcmp((char *)(x), (char *)(y))
00172 #define memcpy_P(x, y, z)       memcpy(x, y, z)
00173 
00174 #ifndef __ASSEMBLER__
00175 
00178 extern void *__bss_end;
00179 
00183 extern void *__stack;
00184 #endif
00185 
00186 #ifndef _NOP
00187 #ifdef __GNUC__
00188 #define _NOP() __asm__ __volatile__ ("mov r0, r0  @ _NOP")
00189 #else
00190 #define _NOP() asm("mov r0, r0")
00191 #endif
00192 #endif
00193 
00194 #define outb(_reg, _val)  (*((volatile unsigned char *)(_reg)) = (_val))
00195 #define outw(_reg, _val)  (*((volatile unsigned short *)(_reg)) = (_val))
00196 #define outr(_reg, _val)  (*((volatile unsigned int *)(_reg)) = (_val))
00197 
00198 #define inb(_reg)   (*((volatile unsigned char *)(_reg)))
00199 #define inw(_reg)   (*((volatile unsigned short *)(_reg)))
00200 #define inr(_reg)   (*((volatile unsigned int *)(_reg)))
00201 
00202 #define _BV(bit)    (1 << (bit))
00203 
00204 #define sbi(_reg, _bit)         outr(_reg, inr(_reg) | _BV(_bit))
00205 #define cbi(_reg, _bit)         outr(_reg, inr(_reg) & ~_BV(_bit))
00206 #define bit_is_set(_reg, _bit)  ((inr(_reg) & _BV(_bit)) != 0)
00207 
00208 #ifdef __IMAGECRAFT__
00209 #define __attribute__(x)
00210 #endif
00211 
00212 #define _SFR_MEM8(addr)     (addr)
00213 #define _SFR_MEM16(addr)    (addr)
00214 
00215 #ifndef __ASSEMBLER__
00216 #ifdef __GNUC__
00217 #define ARM_SET_CP15_CR(val) __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 0" :: "r"(val) : "cc")
00218 #define ARM_GET_CP15_CR() ( \
00219     { \
00220         unsigned int val; \
00221         __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 0" : "=r"(val) :: "cc"); \
00222         val; \
00223     } \
00224 )
00225 #endif /* __GNUC__ */
00226 #endif /* __ASSEMBLER__ */
00227 
00228 #if !defined (__ASSEMBLER__) && defined(__CROSSWORKS_ARM)
00229 
00236 #define strcasecmp(s1, s2)      stricmp(s1, s2)
00237 #define strncasecmp(s1, s2, n)  strnicmp(s1, s2, n)
00238 
00239 /*
00240  * Not supported by CrossWorks, added prototypes here.
00241  */
00242 int   stricmp(CONST char *s1, CONST char *s2);
00243 int   strnicmp(CONST char *s1, CONST char *s2, size_t n);
00244 char *strdup(CONST char *str);
00245 
00246 /*
00247  * If "Enforce ANSI Checking" is enabled, which is
00248  * the default from the v2.x version of CrossWorks
00249  * the keyword asm will not be recognize. Therefore
00250  * the next define is needed to solve the problem.
00251  */
00252 #define asm __asm__
00253 #endif
00254 
00255 #endif