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Nut/OS
4.10.3
API Reference
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Nut/OS
4.10.3
API Reference
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00001 #ifndef _ARCH_ARM_AT91_LCDC_H_ 00002 #define _ARCH_ARM_AT91_LCDC_H_ 00003 00004 /* 00005 * Copyright (C) 2010 by egnite GmbH 00006 * 00007 * All rights reserved. 00008 * 00009 * Redistribution and use in source and binary forms, with or without 00010 * modification, are permitted provided that the following conditions 00011 * are met: 00012 * 00013 * 1. Redistributions of source code must retain the above copyright 00014 * notice, this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright 00016 * notice, this list of conditions and the following disclaimer in the 00017 * documentation and/or other materials provided with the distribution. 00018 * 3. Neither the name of the copyright holders nor the names of 00019 * contributors may be used to endorse or promote products derived 00020 * from this software without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00023 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00024 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00025 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00026 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00027 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00028 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 00029 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 00030 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00031 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 00032 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00033 * SUCH DAMAGE. 00034 * 00035 * For additional information see http://www.ethernut.de/ 00036 */ 00037 00042 00043 #ifdef LCDC_BASE 00044 00047 00048 #define LCDC_DMABADDR1_OFF 0x00000000 00049 #define LCDC_DMABADDR2_OFF 0x00000004 00050 #define LCDC_DMAFRMPT1_OFF 0x00000008 00051 #define LCDC_DMAFRMPT2_OFF 0x0000000C 00052 #define LCDC_DMAFRMADD1_OFF 0x00000010 00053 #define LCDC_DMAFRMADD2_OFF 0x00000014 00054 #define LCDC_DMAFRMCFG_OFF 0x00000018 00055 #define LCDC_DMACON_OFF 0x0000001C 00056 #define LCDC_DMA2DCFG_OFF 0x00000020 00057 #define LCDC_LCDCON1_OFF 0x00000800 00058 #define LCDC_LCDCON2_OFF 0x00000804 00059 #define LCDC_LCDTIM1_OFF 0x00000808 00060 #define LCDC_LCDTIM2_OFF 0x0000080C 00061 #define LCDC_LCDFRMCFG_OFF 0x00000810 00062 #define LCDC_LCDFIFO_OFF 0x00000814 00063 #define LCDC_LCDMVAL_OFF 0x00000818 00064 #define LCDC_DP1_2_OFF 0x0000081C 00065 #define LCDC_DP4_7_OFF 0x00000820 00066 #define LCDC_DP3_5_OFF 0x00000824 00067 #define LCDC_DP2_3_OFF 0x00000828 00068 #define LCDC_DP5_7_OFF 0x0000082C 00069 #define LCDC_DP3_4_OFF 0x00000830 00070 #define LCDC_DP4_5_OFF 0x00000834 00071 #define LCDC_DP6_7_OFF 0x00000838 00072 #define LCDC_PWRCON_OFF 0x0000083C 00073 #define LCDC_CONTRAST_CTR_OFF 0x00000840 00074 #define LCDC_CONTRAST_VAL_OFF 0x00000844 00075 #define LCDC_LCD_IER_OFF 0x00000848 00076 #define LCDC_LCD_IDR_OFF 0x0000084C 00077 #define LCDC_LCD_IMR_OFF 0x00000850 00078 #define LCDC_LCD_ISR_OFF 0x00000854 00079 #define LCDC_LCD_ICR_OFF 0x00000858 00080 #define LCDC_LCD_ITR_OFF 0x00000860 00081 #define LCDC_LCD_IRR_OFF 0x00000864 00082 #define LCDC_LCD_WPCR_OFF 0x000008E4 00083 #define LCDC_LCD_WPSR_OFF 0x000008E8 00084 #define LCDC_LUT_ENTRY_0_OFF 0x00000C00 00085 #define LCDC_LUT_ENTRY_1_OFF 0x00000C04 00086 #define LCDC_LUT_ENTRY_2_OFF 0x00000C08 00087 /* ... */ 00088 #define LCDC_LUT_ENTRY_255_OFF 0x00000FFC 00090 #define LCDC_DMABADDR1 (LCDC_BASE + LCDC_DMABADDR1_OFF) 00091 #define LCDC_DMABADDR2 (LCDC_BASE + LCDC_DMABADDR2_OFF) 00092 #define LCDC_DMAFRMPT1 (LCDC_BASE + LCDC_DMAFRMPT1_OFF) 00093 #define LCDC_DMAFRMPT2 (LCDC_BASE + LCDC_DMAFRMPT2_OFF) 00094 #define LCDC_DMAFRMADD1 (LCDC_BASE + LCDC_DMAFRMADD1_OFF) 00095 #define LCDC_DMAFRMADD2 (LCDC_BASE + LCDC_DMAFRMADD2_OFF) 00096 #define LCDC_DMAFRMCFG (LCDC_BASE + LCDC_DMAFRMCFG_OFF) 00097 #define LCDC_DMACON (LCDC_BASE + LCDC_DMACON_OFF) 00098 #define LCDC_DMA2DCFG (LCDC_BASE + LCDC_DMA2DCFG_OFF) 00099 #define LCDC_LCDCON1 (LCDC_BASE + LCDC_LCDCON1_OFF) 00100 #define LCDC_LCDCON2 (LCDC_BASE + LCDC_LCDCON2_OFF) 00101 #define LCDC_LCDTIM1 (LCDC_BASE + LCDC_LCDTIM1_OFF) 00102 #define LCDC_LCDTIM2 (LCDC_BASE + LCDC_LCDTIM2_OFF) 00103 #define LCDC_LCDFRMCFG (LCDC_BASE + LCDC_LCDFRMCFG_OFF) 00104 #define LCDC_LCDFIFO (LCDC_BASE + LCDC_LCDFIFO_OFF) 00105 #define LCDC_LCDMVAL (LCDC_BASE + LCDC_LCDMVAL_OFF) 00106 #define LCDC_DP1_2 (LCDC_BASE + LCDC_DP1_2_OFF) 00107 #define LCDC_DP4_7 (LCDC_BASE + LCDC_DP4_7_OFF) 00108 #define LCDC_DP3_5 (LCDC_BASE + LCDC_DP3_5_OFF) 00109 #define LCDC_DP2_3 (LCDC_BASE + LCDC_DP2_3_OFF) 00110 #define LCDC_DP5_7 (LCDC_BASE + LCDC_DP5_7_OFF) 00111 #define LCDC_DP3_4 (LCDC_BASE + LCDC_DP3_4_OFF) 00112 #define LCDC_DP4_5 (LCDC_BASE + LCDC_DP4_5_OFF) 00113 #define LCDC_DP6_7 (LCDC_BASE + LCDC_DP6_7_OFF) 00114 #define LCDC_PWRCON (LCDC_BASE + LCDC_PWRCON_OFF) 00115 #define LCDC_CONTRAST_CTR (LCDC_BASE + LCDC_CONTRAST_CTR_OFF) 00116 #define LCDC_CONTRAST_VAL (LCDC_BASE + LCDC_CONTRAST_VAL_OFF) 00117 #define LCDC_LCD_IER (LCDC_BASE + LCDC_LCD_IER_OFF) 00118 #define LCDC_LCD_IDR (LCDC_BASE + LCDC_LCD_IDR_OFF) 00119 #define LCDC_LCD_IMR (LCDC_BASE + LCDC_LCD_IMR_OFF) 00120 #define LCDC_LCD_ISR (LCDC_BASE + LCDC_LCD_ISR_OFF) 00121 #define LCDC_LCD_ICR (LCDC_BASE + LCDC_LCD_ICR_OFF) 00122 #define LCDC_LCD_ITR (LCDC_BASE + LCDC_LCD_ITR_OFF) 00123 #define LCDC_LCD_IRR (LCDC_BASE + LCDC_LCD_IRR_OFF) 00124 #define LCDC_LCD_WPCR (LCDC_BASE + LCDC_LCD_WPCR_OFF) 00125 #define LCDC_LCD_WPSR (LCDC_BASE + LCDC_LCD_WPSR_OFF) 00126 #define LCDC_LUT_ENTRY_0 (LCDC_BASE + LCDC_LUT_ENTRY_0_OFF) 00127 #define LCDC_LUT_ENTRY_1 (LCDC_BASE + LCDC_LUT_ENTRY_1_OFF) 00128 #define LCDC_LUT_ENTRY_2 (LCDC_BASE + LCDC_LUT_ENTRY_2_OFF) 00129 /* ... */ 00130 #define LCDC_LUT_ENTRY_255 (LCDC_BASE + LCDC_LUT_ENTRY_255_OFF) 00132 00133 00135 #endif /* LCDC_BASE */ 00136 00137 #endif /* _ARCH_ARM_AT91_LCDC_H_ */