api/at91__pio_8h_source.html

00001 #ifndef _ARCH_ARM_AT91_PIO_H_
00002 #define _ARCH_ARM_AT91_PIO_H_
00003
00004 /*
00005  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00006  *
00007  * Redistribution and use in source and binary forms, with or without
00008  * modification, are permitted provided that the following conditions
00009  * are met:
00010  *
00011  * 1. Redistributions of source code must retain the above copyright
00012  *    notice, this list of conditions and the following disclaimer.
00013  * 2. Redistributions in binary form must reproduce the above copyright
00014  *    notice, this list of conditions and the following disclaimer in the
00015  *    documentation and/or other materials provided with the distribution.
00016  * 3. Neither the name of the copyright holders nor the names of
00017  *    contributors may be used to endorse or promote products derived
00018  *    from this software without specific prior written permission.
00019  *
00020  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00021  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00022  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00023  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00024  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00025  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00026  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00027  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00028  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00029  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00030  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00031  * SUCH DAMAGE.
00032  *
00033  * For additional information see http://www.ethernut.de/
00034  */
00035
00062
00065 #define PIO_PER_OFF     0x00000000
00066 #define PIO_PDR_OFF     0x00000004
00067 #define PIO_PSR_OFF     0x00000008
00068 #define PIO_OER_OFF     0x00000010
00069 #define PIO_ODR_OFF     0x00000014
00070 #define PIO_OSR_OFF     0x00000018
00071 #define PIO_IFER_OFF    0x00000020
00072 #define PIO_IFDR_OFF    0x00000024
00073 #define PIO_IFSR_OFF    0x00000028
00074 #define PIO_SODR_OFF    0x00000030
00075 #define PIO_CODR_OFF    0x00000034
00076 #define PIO_ODSR_OFF    0x00000038
00077 #define PIO_PDSR_OFF    0x0000003C
00078 #define PIO_IER_OFF     0x00000040
00079 #define PIO_IDR_OFF     0x00000044
00080 #define PIO_IMR_OFF     0x00000048
00081 #define PIO_ISR_OFF     0x0000004C
00082 #if defined(PIO_HAS_MULTIDRIVER)
00083 #define PIO_MDER_OFF    0x00000050
00084 #define PIO_MDDR_OFF    0x00000054
00085 #define PIO_MDSR_OFF    0x00000058
00086 #endif /* PIO_HAS_MULTIDRIVER */
00087 #if defined(PIO_HAS_PULLUP)
00088 #define PIO_PUDR_OFF    0x00000060
00089 #define PIO_PUER_OFF    0x00000064
00090 #define PIO_PUSR_OFF    0x00000068
00091 #endif /* PIO_HAS_PULLUP */
00092 #if defined(PIO_HAS_PERIPHERALSELECT)
00093 #define PIO_ASR_OFF     0x00000070
00094 #define PIO_BSR_OFF     0x00000074
00095 #define PIO_ABSR_OFF    0x00000078
00096 #endif /* PIO_HAS_PERIPHERALSELECT */
00097 #if defined(PIO_HAS_OUTPUTWRITEENABLE)
00098 #define PIO_OWER_OFF    0x000000A0
00099 #define PIO_OWDR_OFF    0x000000A4
00100 #define PIO_OWSR_OFF    0x000000A8
00101 #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00102
00106 #if defined(PIO_BASE)
00107 #define PIO_PER     (PIO_BASE + PIO_PER_OFF)
00108 #define PIO_PDR     (PIO_BASE + PIO_PDR_OFF)
00109 #define PIO_PSR     (PIO_BASE + PIO_PSR_OFF)
00110 #define PIO_OER     (PIO_BASE + PIO_OER_OFF)
00111 #define PIO_ODR     (PIO_BASE + PIO_ODR_OFF)
00112 #define PIO_OSR     (PIO_BASE + PIO_OSR_OFF)
00113 #define PIO_IFER    (PIO_BASE + PIO_IFER_OFF)
00114 #define PIO_IFDR    (PIO_BASE + PIO_IFDR_OFF)
00115 #define PIO_IFSR    (PIO_BASE + PIO_IFSR_OFF)
00116 #define PIO_SODR    (PIO_BASE + PIO_SODR_OFF)
00117 #define PIO_CODR    (PIO_BASE + PIO_CODR_OFF)
00118 #define PIO_ODSR    (PIO_BASE + PIO_ODSR_OFF)
00119 #define PIO_PDSR    (PIO_BASE + PIO_PDSR_OFF)
00120 #define PIO_IER     (PIO_BASE + PIO_IER_OFF)
00121 #define PIO_IDR     (PIO_BASE + PIO_IDR_OFF)
00122 #define PIO_IMR     (PIO_BASE + PIO_IMR_OFF)
00123 #define PIO_ISR     (PIO_BASE + PIO_ISR_OFF)
00124 #if defined(PIO_HAS_MULTIDRIVER)
00125 #define PIO_MDER    (PIO_BASE + PIO_MDER_OFF)
00126 #define PIO_MDDR    (PIO_BASE + PIO_MDDR_OFF)
00127 #define PIO_MDSR    (PIO_BASE + PIO_MDSR_OFF)
00128 #endif /* PIO_HAS_MULTIDRIVER */
00129 #if defined(PIO_HAS_PULLUP)
00130 #define PIO_PUDR    (PIO_BASE + PIO_PUDR_OFF)
00131 #define PIO_PUER    (PIO_BASE + PIO_PUER_OFF)
00132 #define PIO_PUSR    (PIO_BASE + PIO_PUSR_OFF)
00133 #endif /* PIO_HAS_PULLUP */
00134 #if defined(PIO_HAS_PERIPHERALSELECT)
00135 #define PIO_ASR     (PIO_BASE + PIO_ASR_OFF)
00136 #define PIO_BSR     (PIO_BASE + PIO_BSR_OFF)
00137 #define PIO_ABSR    (PIO_BASE + PIO_ABSR_OFF)
00138 #endif /* PIO_HAS_PERIPHERALSELECT */
00139 #if defined(PIO_HAS_OUTPUTWRITEENABLE)
00140 #define PIO_OWER    (PIO_BASE + PIO_OWER_OFF)
00141 #define PIO_OWDR    (PIO_BASE + PIO_OWDR_OFF)
00142 #define PIO_OWSR    (PIO_BASE + PIO_OWSR_OFF)
00143 #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00144 #endif /* PIO_BASE */
00145
00149 #if defined(PIOA_BASE)
00150 #define PIOA_PER    (PIOA_BASE + PIO_PER_OFF)
00151 #define PIOA_PDR    (PIOA_BASE + PIO_PDR_OFF)
00152 #define PIOA_PSR    (PIOA_BASE + PIO_PSR_OFF)
00153 #define PIOA_OER    (PIOA_BASE + PIO_OER_OFF)
00154 #define PIOA_ODR    (PIOA_BASE + PIO_ODR_OFF)
00155 #define PIOA_OSR    (PIOA_BASE + PIO_OSR_OFF)
00156 #define PIOA_IFER   (PIOA_BASE + PIO_IFER_OFF)
00157 #define PIOA_IFDR   (PIOA_BASE + PIO_IFDR_OFF)
00158 #define PIOA_IFSR   (PIOA_BASE + PIO_IFSR_OFF)
00159 #define PIOA_SODR   (PIOA_BASE + PIO_SODR_OFF)
00160 #define PIOA_CODR   (PIOA_BASE + PIO_CODR_OFF)
00161 #define PIOA_ODSR   (PIOA_BASE + PIO_ODSR_OFF)
00162 #define PIOA_PDSR   (PIOA_BASE + PIO_PDSR_OFF)
00163 #define PIOA_IER    (PIOA_BASE + PIO_IER_OFF)
00164 #define PIOA_IDR    (PIOA_BASE + PIO_IDR_OFF)
00165 #define PIOA_IMR    (PIOA_BASE + PIO_IMR_OFF)
00166 #define PIOA_ISR    (PIOA_BASE + PIO_ISR_OFF)
00167 #if defined(PIO_HAS_MULTIDRIVER)
00168 #define PIOA_MDER   (PIOA_BASE + PIO_MDER_OFF)
00169 #define PIOA_MDDR   (PIOA_BASE + PIO_MDDR_OFF)
00170 #define PIOA_MDSR   (PIOA_BASE + PIO_MDSR_OFF)
00171 #endif /* PIO_HAS_MULTIDRIVER */
00172 #if defined(PIO_HAS_PULLUP)
00173 #define PIOA_PUDR   (PIOA_BASE + PIO_PUDR_OFF)
00174 #define PIOA_PUER   (PIOA_BASE + PIO_PUER_OFF)
00175 #define PIOA_PUSR   (PIOA_BASE + PIO_PUSR_OFF)
00176 #endif /* PIO_HAS_PULLUP */
00177 #if defined(PIO_HAS_PERIPHERALSELECT)
00178 #define PIOA_ASR    (PIOA_BASE + PIO_ASR_OFF)
00179 #define PIOA_BSR    (PIOA_BASE + PIO_BSR_OFF)
00180 #define PIOA_ABSR   (PIOA_BASE + PIO_ABSR_OFF)
00181 #endif /* PIO_HAS_PERIPHERALSELECT */
00182 #if defined(PIO_HAS_OUTPUTWRITEENABLE)
00183 #define PIOA_OWER   (PIOA_BASE + PIO_OWER_OFF)
00184 #define PIOA_OWDR   (PIOA_BASE + PIO_OWDR_OFF)
00185 #define PIOA_OWSR   (PIOA_BASE + PIO_OWSR_OFF)
00186 #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00187 #endif /* PIOA_BASE */
00188
00192 #if defined(PIOB_BASE)
00193 #define PIOB_PER    (PIOB_BASE + PIO_PER_OFF)
00194 #define PIOB_PDR    (PIOB_BASE + PIO_PDR_OFF)
00195 #define PIOB_PSR    (PIOB_BASE + PIO_PSR_OFF)
00196 #define PIOB_OER    (PIOB_BASE + PIO_OER_OFF)
00197 #define PIOB_ODR    (PIOB_BASE + PIO_ODR_OFF)
00198 #define PIOB_OSR    (PIOB_BASE + PIO_OSR_OFF)
00199 #define PIOB_IFER   (PIOB_BASE + PIO_IFER_OFF)
00200 #define PIOB_IFDR   (PIOB_BASE + PIO_IFDR_OFF)
00201 #define PIOB_IFSR   (PIOB_BASE + PIO_IFSR_OFF)
00202 #define PIOB_SODR   (PIOB_BASE + PIO_SODR_OFF)
00203 #define PIOB_CODR   (PIOB_BASE + PIO_CODR_OFF)
00204 #define PIOB_ODSR   (PIOB_BASE + PIO_ODSR_OFF)
00205 #define PIOB_PDSR   (PIOB_BASE + PIO_PDSR_OFF)
00206 #define PIOB_IER    (PIOB_BASE + PIO_IER_OFF)
00207 #define PIOB_IDR    (PIOB_BASE + PIO_IDR_OFF)
00208 #define PIOB_IMR    (PIOB_BASE + PIO_IMR_OFF)
00209 #define PIOB_ISR    (PIOB_BASE + PIO_ISR_OFF)
00210 #if defined(PIO_HAS_MULTIDRIVER)
00211 #define PIOB_MDER   (PIOB_BASE + PIO_MDER_OFF)
00212 #define PIOB_MDDR   (PIOB_BASE + PIO_MDDR_OFF)
00213 #define PIOB_MDSR   (PIOB_BASE + PIO_MDSR_OFF)
00214 #endif /* PIO_HAS_MULTIDRIVER */
00215 #if defined(PIO_HAS_PULLUP)
00216 #define PIOB_PUDR   (PIOB_BASE + PIO_PUDR_OFF)
00217 #define PIOB_PUER   (PIOB_BASE + PIO_PUER_OFF)
00218 #define PIOB_PUSR   (PIOB_BASE + PIO_PUSR_OFF)
00219 #endif /* PIO_HAS_PULLUP */
00220 #if defined(PIO_HAS_PERIPHERALSELECT)
00221 #define PIOB_ASR    (PIOB_BASE + PIO_ASR_OFF)
00222 #define PIOB_BSR    (PIOB_BASE + PIO_BSR_OFF)
00223 #define PIOB_ABSR   (PIOB_BASE + PIO_ABSR_OFF)
00224 #endif /* PIO_HAS_PERIPHERALSELECT */
00225 #if defined(PIO_HAS_OUTPUTWRITEENABLE)
00226 #define PIOB_OWER   (PIOB_BASE + PIO_OWER_OFF)
00227 #define PIOB_OWDR   (PIOB_BASE + PIO_OWDR_OFF)
00228 #define PIOB_OWSR   (PIOB_BASE + PIO_OWSR_OFF)
00229 #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00230 #endif /* PIOB_BASE */
00231
00235 #if defined(PIOC_BASE)
00236 #define PIOC_PER    (PIOC_BASE + PIO_PER_OFF)
00237 #define PIOC_PDR    (PIOC_BASE + PIO_PDR_OFF)
00238 #define PIOC_PSR    (PIOC_BASE + PIO_PSR_OFF)
00239 #define PIOC_OER    (PIOC_BASE + PIO_OER_OFF)
00240 #define PIOC_ODR    (PIOC_BASE + PIO_ODR_OFF)
00241 #define PIOC_OSR    (PIOC_BASE + PIO_OSR_OFF)
00242 #define PIOC_IFER   (PIOC_BASE + PIO_IFER_OFF)
00243 #define PIOC_IFDR   (PIOC_BASE + PIO_IFDR_OFF)
00244 #define PIOC_IFSR   (PIOC_BASE + PIO_IFSR_OFF)
00245 #define PIOC_SODR   (PIOC_BASE + PIO_SODR_OFF)
00246 #define PIOC_CODR   (PIOC_BASE + PIO_CODR_OFF)
00247 #define PIOC_ODSR   (PIOC_BASE + PIO_ODSR_OFF)
00248 #define PIOC_PDSR   (PIOC_BASE + PIO_PDSR_OFF)
00249 #define PIOC_IER    (PIOC_BASE + PIO_IER_OFF)
00250 #define PIOC_IDR    (PIOC_BASE + PIO_IDR_OFF)
00251 #define PIOC_IMR    (PIOC_BASE + PIO_IMR_OFF)
00252 #define PIOC_ISR    (PIOC_BASE + PIO_ISR_OFF)
00253 #if defined(PIO_HAS_MULTIDRIVER)
00254 #define PIOC_MDER   (PIOC_BASE + PIO_MDER_OFF)
00255 #define PIOC_MDDR   (PIOC_BASE + PIO_MDDR_OFF)
00256 #define PIOC_MDSR   (PIOC_BASE + PIO_MDSR_OFF)
00257 #endif /* PIO_HAS_MULTIDRIVER */
00258 #if defined(PIO_HAS_PULLUP)
00259 #define PIOC_PUDR   (PIOC_BASE + PIO_PUDR_OFF)
00260 #define PIOC_PUER   (PIOC_BASE + PIO_PUER_OFF)
00261 #define PIOC_PUSR   (PIOC_BASE + PIO_PUSR_OFF)
00262 #endif /* PIO_HAS_PULLUP */
00263 #if defined(PIO_HAS_PERIPHERALSELECT)
00264 #define PIOC_ASR    (PIOC_BASE + PIO_ASR_OFF)
00265 #define PIOC_BSR    (PIOC_BASE + PIO_BSR_OFF)
00266 #define PIOC_ABSR   (PIOC_BASE + PIO_ABSR_OFF)
00267 #endif /* PIO_HAS_PERIPHERALSELECT */
00268 #if defined(PIO_HAS_OUTPUTWRITEENABLE)
00269 #define PIOC_OWER   (PIOC_BASE + PIO_OWER_OFF)
00270 #define PIOC_OWDR   (PIOC_BASE + PIO_OWDR_OFF)
00271 #define PIOC_OWSR   (PIOC_BASE + PIO_OWSR_OFF)
00272 #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00273 #endif /* PIOC_BASE */
00274
00278 #if defined(PIOD_BASE)
00279 #define PIOD_PER    (PIOD_BASE + PIO_PER_OFF)
00280 #define PIOD_PDR    (PIOD_BASE + PIO_PDR_OFF)
00281 #define PIOD_PSR    (PIOD_BASE + PIO_PSR_OFF)
00282 #define PIOD_OER    (PIOD_BASE + PIO_OER_OFF)
00283 #define PIOD_ODR    (PIOD_BASE + PIO_ODR_OFF)
00284 #define PIOD_OSR    (PIOD_BASE + PIO_OSR_OFF)
00285 #define PIOD_IFER   (PIOD_BASE + PIO_IFER_OFF)
00286 #define PIOD_IFDR   (PIOD_BASE + PIO_IFDR_OFF)
00287 #define PIOD_IFSR   (PIOD_BASE + PIO_IFSR_OFF)
00288 #define PIOD_SODR   (PIOD_BASE + PIO_SODR_OFF)
00289 #define PIOD_CODR   (PIOD_BASE + PIO_CODR_OFF)
00290 #define PIOD_ODSR   (PIOD_BASE + PIO_ODSR_OFF)
00291 #define PIOD_PDSR   (PIOD_BASE + PIO_PDSR_OFF)
00292 #define PIOD_IER    (PIOD_BASE + PIO_IER_OFF)
00293 #define PIOD_IDR    (PIOD_BASE + PIO_IDR_OFF)
00294 #define PIOD_IMR    (PIOD_BASE + PIO_IMR_OFF)
00295 #define PIOD_ISR    (PIOD_BASE + PIO_ISR_OFF)
00296 #if defined(PIO_HAS_MULTIDRIVER)
00297 #define PIOD_MDER   (PIOD_BASE + PIO_MDER_OFF)
00298 #define PIOD_MDDR   (PIOD_BASE + PIO_MDDR_OFF)
00299 #define PIOD_MDSR   (PIOD_BASE + PIO_MDSR_OFF)
00300 #endif /* PIO_HAS_MULTIDRIVER */
00301 #if defined(PIO_HAS_PULLUP)
00302 #define PIOD_PUDR   (PIOD_BASE + PIO_PUDR_OFF)
00303 #define PIOD_PUER   (PIOD_BASE + PIO_PUER_OFF)
00304 #define PIOD_PUSR   (PIOD_BASE + PIO_PUSR_OFF)
00305 #endif /* PIO_HAS_PULLUP */
00306 #if defined(PIO_HAS_PERIPHERALSELECT)
00307 #define PIOD_ASR    (PIOD_BASE + PIO_ASR_OFF)
00308 #define PIOD_BSR    (PIOD_BASE + PIO_BSR_OFF)
00309 #define PIOD_ABSR   (PIOD_BASE + PIO_ABSR_OFF)
00310 #endif /* PIO_HAS_PERIPHERALSELECT */
00311 #if defined(PIO_HAS_OUTPUTWRITEENABLE)
00312 #define PIOD_OWER   (PIOD_BASE + PIO_OWER_OFF)
00313 #define PIOD_OWDR   (PIOD_BASE + PIO_OWDR_OFF)
00314 #define PIOD_OWSR   (PIOD_BASE + PIO_OWSR_OFF)
00315 #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00316 #endif /* PIOD_BASE */
00317
00322 #if defined(PIOE_BASE)
00323 #define PIOE_PER    (PIOE_BASE + PIO_PER_OFF)
00324 #define PIOE_PDR    (PIOE_BASE + PIO_PDR_OFF)
00325 #define PIOE_PSR    (PIOE_BASE + PIO_PSR_OFF)
00326 #define PIOE_OER    (PIOE_BASE + PIO_OER_OFF)
00327 #define PIOE_ODR    (PIOE_BASE + PIO_ODR_OFF)
00328 #define PIOE_OSR    (PIOE_BASE + PIO_OSR_OFF)
00329 #define PIOE_IFER   (PIOE_BASE + PIO_IFER_OFF)
00330 #define PIOE_IFDR   (PIOE_BASE + PIO_IFDR_OFF)
00331 #define PIOE_IFSR   (PIOE_BASE + PIO_IFSR_OFF)
00332 #define PIOE_SODR   (PIOE_BASE + PIO_SODR_OFF)
00333 #define PIOE_CODR   (PIOE_BASE + PIO_CODR_OFF)
00334 #define PIOE_ODSR   (PIOE_BASE + PIO_ODSR_OFF)
00335 #define PIOE_PDSR   (PIOE_BASE + PIO_PDSR_OFF)
00336 #define PIOE_IER    (PIOE_BASE + PIO_IER_OFF)
00337 #define PIOE_IDR    (PIOE_BASE + PIO_IDR_OFF)
00338 #define PIOE_IMR    (PIOE_BASE + PIO_IMR_OFF)
00339 #define PIOE_ISR    (PIOE_BASE + PIO_ISR_OFF)
00340 #if defined(PIO_HAS_MULTIDRIVER)
00341 #define PIOE_MDER   (PIOE_BASE + PIO_MDER_OFF)
00342 #define PIOE_MDDR   (PIOE_BASE + PIO_MDDR_OFF)
00343 #define PIOE_MDSR   (PIOE_BASE + PIO_MDSR_OFF)
00344 #endif /* PIO_HAS_MULTIDRIVER */
00345 #if defined(PIO_HAS_PULLUP)
00346 #define PIOE_PUDR   (PIOE_BASE + PIO_PUDR_OFF)
00347 #define PIOE_PUER   (PIOE_BASE + PIO_PUER_OFF)
00348 #define PIOE_PUSR   (PIOE_BASE + PIO_PUSR_OFF)
00349 #endif /* PIO_HAS_PULLUP */
00350 #if defined(PIO_HAS_PERIPHERALSELECT)
00351 #define PIOE_ASR    (PIOE_BASE + PIO_ASR_OFF)
00352 #define PIOE_BSR    (PIOE_BASE + PIO_BSR_OFF)
00353 #define PIOE_ABSR   (PIOE_BASE + PIO_ABSR_OFF)
00354 #endif /* PIO_HAS_PERIPHERALSELECT */
00355 #if defined(PIO_HAS_OUTPUTWRITEENABLE)
00356 #define PIOE_OWER   (PIOE_BASE + PIO_OWER_OFF)
00357 #define PIOE_OWDR   (PIOE_BASE + PIO_OWDR_OFF)
00358 #define PIOE_OWSR   (PIOE_BASE + PIO_OWSR_OFF)
00359 #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00360 #endif /* PIOD_BASE */
00361
00363
00365 #endif                          /* _ARCH_ARM_AT91_PIO_H_ */