00001 /* 00002 * Copyright (C) 2001-2005 by egnite Software GmbH. All rights reserved. 00003 * 00004 * Redistribution and use in source and binary forms, with or without 00005 * modification, are permitted provided that the following conditions 00006 * are met: 00007 * 00008 * 1. Redistributions of source code must retain the above copyright 00009 * notice, this list of conditions and the following disclaimer. 00010 * 2. Redistributions in binary form must reproduce the above copyright 00011 * notice, this list of conditions and the following disclaimer in the 00012 * documentation and/or other materials provided with the distribution. 00013 * 3. Neither the name of the copyright holders nor the names of 00014 * contributors may be used to endorse or promote products derived 00015 * from this software without specific prior written permission. 00016 * 00017 * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS 00018 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00019 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00020 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE 00021 * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00022 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00023 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 00024 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 00025 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00026 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 00027 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00028 * SUCH DAMAGE. 00029 * 00030 * For additional information see http://www.ethernut.de/ 00031 * 00032 */ 00033 00080 #include <dev/irqreg.h> 00081 00086 00087 static int AvrAdcIrqCtl(int cmd, void *param); 00088 00089 IRQ_HANDLER sig_ADC = { 00090 #ifdef NUT_PERFMON 00091 0, /* Interrupt counter, ir_count. */ 00092 #endif 00093 NULL, /* Passed argument, ir_arg. */ 00094 NULL, /* Handler subroutine, ir_handler. */ 00095 AvrAdcIrqCtl /* Interrupt control, ir_ctl. */ 00096 }; 00097 00113 static int AvrAdcIrqCtl(int cmd, void *param) 00114 { 00115 int rc = 0; 00116 unsigned int *ival = (unsigned int *) param; 00117 int_fast8_t enabled = bit_is_set(ADCSR, ADIE); 00118 00119 /* Disable interrupt. */ 00120 cbi(ADCSR, ADIE); 00121 00122 switch (cmd) { 00123 case NUT_IRQCTL_INIT: 00124 enabled = 0; 00125 case NUT_IRQCTL_CLEAR: 00126 /* Clear any pending interrupt. */ 00127 outb(ADCSR, _BV(ADIF)); 00128 break; 00129 case NUT_IRQCTL_STATUS: 00130 if (bit_is_set(ADCSR, ADIF)) { 00131 *ival = 1; 00132 } else { 00133 *ival = 0; 00134 } 00135 if (enabled) { 00136 *ival |= 0x80; 00137 } 00138 break; 00139 case NUT_IRQCTL_ENABLE: 00140 enabled = 1; 00141 break; 00142 case NUT_IRQCTL_DISABLE: 00143 enabled = 0; 00144 break; 00145 case NUT_IRQCTL_GETPRIO: 00146 *ival = 0; 00147 break; 00148 #ifdef NUT_PERFMON 00149 case NUT_IRQCTL_GETCOUNT: 00150 *ival = (unsigned int) sig_ADC.ir_count; 00151 sig_ADC.ir_count = 0; 00152 break; 00153 #endif 00154 default: 00155 rc = -1; 00156 break; 00157 } 00158 00159 /* Enable interrupt. */ 00160 if (enabled) { 00161 sbi(ADCSR, ADIE); 00162 } 00163 return rc; 00164 } 00165 00169 #ifdef __IMAGECRAFT__ 00170 #pragma interrupt_handler SIG_ADC:iv_ADC 00171 #endif 00172 NUTSIGNAL(SIG_ADC, sig_ADC) 00173 00174