ih_rtc.c

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/*
 * $Log: ih_rtc.c,v $
  *
 */

#include <arch/avr32.h>
#include <arch/avr32/pm.h>
#include <dev/irqreg.h>
#include <avr32/io.h>

#include <arch/avr32/ihndlr.h>

#ifndef NUT_IRQPRI_RTC
#define NUT_IRQPRI_RTC  AVR32_INTC_INT0
#endif

// Work around differences between ES and production chips.
#ifndef AVR32_RTC_CTRL_CLKEN_MASK
#define AVR32_RTC_CTRL_CLKEN_MASK AVR32_RTC_CTRL_EN_MASK
#endif


static int RealTimeCounterIrqCtl(int cmd, void *param);

IRQ_HANDLER sig_RTC = {
#ifdef NUT_PERFMON
    0,                          /* Interrupt counter, ir_count. */
#endif
    NULL,                       /* Passed argument, ir_arg. */
    NULL,                       /* Handler subroutine, ir_handler. */
    RealTimeCounterIrqCtl       /* Interrupt control, ir_ctl. */
};

static SIGNAL(RealTimeCounterIrqEntry)
{
    IRQ_ENTRY();
#ifdef NUT_PERFMON
    sig_RTC.ir_count++;
#endif
    if (sig_RTC.ir_handler) {
        (sig_RTC.ir_handler) (sig_RTC.ir_arg);
    }
    IRQ_EXIT();
}

static int RealTimeCounterIrqCtl(int cmd, void *param)
{
    int rc = 0;
    unsigned int *ival = (unsigned int *) param;
    int_fast8_t enabled = AVR32_RTC.imr & AVR32_RTC_IMR_TOPI_MASK;

    /* Disable interrupt. */
    if (enabled) {
        AVR32_RTC.idr = AVR32_RTC_IDR_TOPI_MASK;
        AVR32_RTC.imr;
    }

    switch (cmd) {
    case NUT_IRQCTL_INIT:
        /* Enable 32k oscillator crystal */
        pm_enable_osc32_crystal(&AVR32_PM);
        pm_enable_clk32_no_wait(&AVR32_PM, AVR32_PM_OSCCTRL32_STARTUP_0_RCOSC);

        /* Wait until the rtc CTRL register is up-to-date */
        while ((AVR32_RTC.ctrl & AVR32_RTC_CTRL_BUSY_MASK));

        /* Set the new RTC configuration to 1ms */
        AVR32_RTC.ctrl = 1 << AVR32_RTC_CTRL_CLK32_OFFSET | 4 << AVR32_RTC_CTRL_PSEL_OFFSET | AVR32_RTC_CTRL_CLKEN_MASK;

        /* Wait until the rtc CTRL register is up-to-date */
        while ((AVR32_RTC.ctrl & AVR32_RTC_CTRL_BUSY_MASK));

        register_interrupt(RealTimeCounterIrqEntry, AVR32_RTC_IRQ, NUT_IRQPRI_RTC);

        break;
    case NUT_IRQCTL_STATUS:
        if (enabled) {
            *ival |= 1;
        } else {
            *ival &= ~1;
        }
        break;
    case NUT_IRQCTL_ENABLE:
        enabled = 1;
        break;
    case NUT_IRQCTL_DISABLE:
        enabled = 0;
        break;
#ifdef NUT_PERFMON
    case NUT_IRQCTL_GETCOUNT:
        *ival = (unsigned int) sig_TC0.ir_count;
        sig_RTC.ir_count = 0;
        break;
#endif
    default:
        rc = -1;
        break;
    }

    /* Enable interrupt. */
    if (enabled) {
        AVR32_RTC.ier = AVR32_RTC_IER_TOPI_MASK;
    }
    return rc;
}