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Nut/OS
4.10.3
API Reference
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Nut/OS
4.10.3
API Reference
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00001 #ifndef _DEV_SBBIF3_H_ 00002 #define _DEV_SBBIF3_H_ 00003 /* 00004 * Copyright (C) 2007 by egnite Software GmbH. All rights reserved. 00005 * 00006 * Redistribution and use in source and binary forms, with or without 00007 * modification, are permitted provided that the following conditions 00008 * are met: 00009 * 00010 * 1. Redistributions of source code must retain the above copyright 00011 * notice, this list of conditions and the following disclaimer. 00012 * 2. Redistributions in binary form must reproduce the above copyright 00013 * notice, this list of conditions and the following disclaimer in the 00014 * documentation and/or other materials provided with the distribution. 00015 * 3. Neither the name of the copyright holders nor the names of 00016 * contributors may be used to endorse or promote products derived 00017 * from this software without specific prior written permission. 00018 * 00019 * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS 00020 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00021 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00022 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE 00023 * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00024 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00025 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 00026 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 00027 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00028 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 00029 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00030 * SUCH DAMAGE. 00031 * 00032 * For additional information see http://www.ethernut.de/ 00033 */ 00034 00058 #include <cfg/arch/gpio.h> 00059 00063 #ifndef SBBI3_MAX_DEVICES 00064 #define SBBI3_MAX_DEVICES 4 00065 #endif 00066 00067 #if defined(__AVR__) /* MCU */ 00068 /* 00069 * AVR implementation. 00070 * ====================================== 00071 */ 00072 00073 #ifdef SBBI3_CS0_BIT 00074 00075 #if (SBBI3_CS0_PORT == AVRPORTB) 00076 #define SBBI3_CS0_SOD_REG PORTB 00077 #define SBBI3_CS0_OE_REG DDRB 00078 #elif (SBBI3_CS0_PORT == AVRPORTD) 00079 #define SBBI3_CS0_SOD_REG PORTD 00080 #define SBBI3_CS0_OE_REG DDRD 00081 #elif (SBBI3_CS0_PORT == AVRPORTE) 00082 #define SBBI3_CS0_SOD_REG PORTE 00083 #define SBBI3_CS0_OE_REG DDRE 00084 #elif (SBBI3_CS0_PORT == AVRPORTF) 00085 #define SBBI3_CS0_SOD_REG PORTF 00086 #define SBBI3_CS0_OE_REG DDRF 00087 #elif (SBBI3_CS0_PORT == AVRPORTG) 00088 #define SBBI3_CS0_SOD_REG PORTG 00089 #define SBBI3_CS0_OE_REG DDRG 00090 #elif (SBBI3_CS0_PORT == AVRPORTH) 00091 #define SBBI3_CS0_SOD_REG PORTH 00092 #define SBBI3_CS0_OE_REG DDRH 00093 #endif 00094 00096 #define SBBI3_CS0_ENA() sbi(SBBI3_CS0_OE_REG, SBBI3_CS0_BIT) 00097 00098 #define SBBI3_CS0_CLR() cbi(SBBI3_CS0_SOD_REG, SBBI3_CS0_BIT) 00099 00100 #define SBBI3_CS0_SET() sbi(SBBI3_CS0_SOD_REG, SBBI3_CS0_BIT) 00101 00102 #endif /* SBBI3_CS0_BIT */ 00103 00104 #ifdef SBBI3_CS1_BIT 00105 00106 #if (SBBI3_CS1_PORT == AVRPORTB) 00107 #define SBBI3_CS1_SOD_REG PORTB 00108 #define SBBI3_CS1_OE_REG DDRB 00109 #elif (SBBI3_CS1_PORT == AVRPORTD) 00110 #define SBBI3_CS1_SOD_REG PORTD 00111 #define SBBI3_CS1_OE_REG DDRD 00112 #elif (SBBI3_CS1_PORT == AVRPORTE) 00113 #define SBBI3_CS1_SOD_REG PORTE 00114 #define SBBI3_CS1_OE_REG DDRE 00115 #elif (SBBI3_CS1_PORT == AVRPORTF) 00116 #define SBBI3_CS1_SOD_REG PORTF 00117 #define SBBI3_CS1_OE_REG DDRF 00118 #elif (SBBI3_CS1_PORT == AVRPORTG) 00119 #define SBBI3_CS1_SOD_REG PORTG 00120 #define SBBI3_CS1_OE_REG DDRG 00121 #elif (SBBI3_CS1_PORT == AVRPORTH) 00122 #define SBBI3_CS1_SOD_REG PORTH 00123 #define SBBI3_CS1_OE_REG DDRH 00124 #endif 00125 00127 #define SBBI3_CS1_ENA() sbi(SBBI3_CS1_OE_REG, SBBI3_CS1_BIT) 00128 00129 #define SBBI3_CS1_CLR() cbi(SBBI3_CS1_SOD_REG, SBBI3_CS1_BIT) 00130 00131 #define SBBI3_CS1_SET() sbi(SBBI3_CS1_SOD_REG, SBBI3_CS1_BIT) 00132 00133 #endif /* SBBI3_CS1_BIT */ 00134 00135 #ifdef SBBI3_CS2_BIT 00136 00137 #if (SBBI3_CS2_PORT == AVRPORTB) 00138 #define SBBI3_CS2_SOD_REG PORTB 00139 #define SBBI3_CS2_OE_REG DDRB 00140 #elif (SBBI3_CS2_PORT == AVRPORTD) 00141 #define SBBI3_CS2_SOD_REG PORTD 00142 #define SBBI3_CS2_OE_REG DDRD 00143 #elif (SBBI3_CS2_PORT == AVRPORTE) 00144 #define SBBI3_CS2_SOD_REG PORTE 00145 #define SBBI3_CS2_OE_REG DDRE 00146 #elif (SBBI3_CS2_PORT == AVRPORTF) 00147 #define SBBI3_CS2_SOD_REG PORTF 00148 #define SBBI3_CS2_OE_REG DDRF 00149 #elif (SBBI3_CS2_PORT == AVRPORTG) 00150 #define SBBI3_CS2_SOD_REG PORTG 00151 #define SBBI3_CS2_OE_REG DDRG 00152 #elif (SBBI3_CS2_PORT == AVRPORTH) 00153 #define SBBI3_CS2_SOD_REG PORTH 00154 #define SBBI3_CS2_OE_REG DDRH 00155 #endif 00156 00158 #define SBBI3_CS2_ENA() sbi(SBBI3_CS2_OE_REG, SBBI3_CS2_BIT) 00159 00160 #define SBBI3_CS2_CLR() cbi(SBBI3_CS2_SOD_REG, SBBI3_CS2_BIT) 00161 00162 #define SBBI3_CS2_SET() sbi(SBBI3_CS2_SOD_REG, SBBI3_CS2_BIT) 00163 00164 #endif /* SBBI3_CS2_BIT */ 00165 00166 #ifdef SBBI3_CS3_BIT 00167 00168 #if (SBBI3_CS3_PORT == AVRPORTB) 00169 #define SBBI3_CS3_SOD_REG PORTB 00170 #define SBBI3_CS3_OE_REG DDRB 00171 #elif (SBBI3_CS3_PORT == AVRPORTD) 00172 #define SBBI3_CS3_SOD_REG PORTD 00173 #define SBBI3_CS3_OE_REG DDRD 00174 #elif (SBBI3_CS3_PORT == AVRPORTE) 00175 #define SBBI3_CS3_SOD_REG PORTE 00176 #define SBBI3_CS3_OE_REG DDRE 00177 #elif (SBBI3_CS3_PORT == AVRPORTF) 00178 #define SBBI3_CS3_SOD_REG PORTF 00179 #define SBBI3_CS3_OE_REG DDRF 00180 #elif (SBBI3_CS3_PORT == AVRPORTG) 00181 #define SBBI3_CS3_SOD_REG PORTG 00182 #define SBBI3_CS3_OE_REG DDRG 00183 #elif (SBBI3_CS3_PORT == AVRPORTH) 00184 #define SBBI3_CS3_SOD_REG PORTH 00185 #define SBBI3_CS3_OE_REG DDRH 00186 #endif 00187 00189 #define SBBI3_CS3_ENA() sbi(SBBI3_CS3_OE_REG, SBBI3_CS3_BIT) 00190 00191 #define SBBI3_CS3_CLR() cbi(SBBI3_CS3_SOD_REG, SBBI3_CS3_BIT) 00192 00193 #define SBBI3_CS3_SET() sbi(SBBI3_CS3_SOD_REG, SBBI3_CS3_BIT) 00194 00195 #endif /* SBBI3_CS3_BIT */ 00196 00197 #ifdef SBBI3_RST0_BIT 00198 00199 #if (SBBI3_RST0_PORT == AVRPORTB) 00200 #define SBBI3_RST0_SOD_REG PORTB 00201 #define SBBI3_RST0_OE_REG DDRB 00202 #elif (SBBI3_RST0_PORT == AVRPORTD) 00203 #define SBBI3_RST0_SOD_REG PORTD 00204 #define SBBI3_RST0_OE_REG DDRD 00205 #elif (SBBI3_RST0_PORT == AVRPORTE) 00206 #define SBBI3_RST0_SOD_REG PORTE 00207 #define SBBI3_RST0_OE_REG DDRE 00208 #elif (SBBI3_RST0_PORT == AVRPORTF) 00209 #define SBBI3_RST0_SOD_REG PORTF 00210 #define SBBI3_RST0_OE_REG DDRF 00211 #elif (SBBI3_RST0_PORT == AVRPORTG) 00212 #define SBBI3_RST0_SOD_REG PORTG 00213 #define SBBI3_RST0_OE_REG DDRG 00214 #elif (SBBI3_RST0_PORT == AVRPORTH) 00215 #define SBBI3_RST0_SOD_REG PORTH 00216 #define SBBI3_RST0_OE_REG DDRH 00217 #endif 00218 00220 #define SBBI3_RST0_ENA() sbi(SBBI3_RST0_OE_REG, SBBI3_RST0_BIT) 00221 00222 #define SBBI3_RST0_CLR() cbi(SBBI3_RST0_SOD_REG, SBBI3_RST0_BIT) 00223 00224 #define SBBI3_RST0_SET() sbi(SBBI3_RST0_SOD_REG, SBBI3_RST0_BIT) 00225 00226 #endif /* SBBI3_RST0_BIT */ 00227 00228 #ifdef SBBI3_RST1_BIT 00229 00230 #if (SBBI3_RST1_PORT == AVRPORTB) 00231 #define SBBI3_RST1_SOD_REG PORTB 00232 #define SBBI3_RST1_OE_REG DDRB 00233 #elif (SBBI3_RST1_PORT == AVRPORTD) 00234 #define SBBI3_RST1_SOD_REG PORTD 00235 #define SBBI3_RST1_OE_REG DDRD 00236 #elif (SBBI3_RST1_PORT == AVRPORTE) 00237 #define SBBI3_RST1_SOD_REG PORTE 00238 #define SBBI3_RST1_OE_REG DDRE 00239 #elif (SBBI3_RST1_PORT == AVRPORTF) 00240 #define SBBI3_RST1_SOD_REG PORTF 00241 #define SBBI3_RST1_OE_REG DDRF 00242 #elif (SBBI3_RST1_PORT == AVRPORTG) 00243 #define SBBI3_RST1_SOD_REG PORTG 00244 #define SBBI3_RST1_OE_REG DDRG 00245 #elif (SBBI3_RST1_PORT == AVRPORTH) 00246 #define SBBI3_RST1_SOD_REG PORTH 00247 #define SBBI3_RST1_OE_REG DDRH 00248 #endif 00249 00251 #define SBBI3_RST1_ENA() sbi(SBBI3_RST1_OE_REG, SBBI3_RST1_BIT) 00252 00253 #define SBBI3_RST1_CLR() cbi(SBBI3_RST1_SOD_REG, SBBI3_RST1_BIT) 00254 00255 #define SBBI3_RST1_SET() sbi(SBBI3_RST1_SOD_REG, SBBI3_RST1_BIT) 00256 00257 #endif /* SBBI3_RST1_BIT */ 00258 00259 #ifdef SBBI3_RST2_BIT 00260 00261 #if (SBBI3_RST2_PORT == AVRPORTB) 00262 #define SBBI3_RST2_SOD_REG PORTB 00263 #define SBBI3_RST2_OE_REG DDRB 00264 #elif (SBBI3_RST2_PORT == AVRPORTD) 00265 #define SBBI3_RST2_SOD_REG PORTD 00266 #define SBBI3_RST2_OE_REG DDRD 00267 #elif (SBBI3_RST2_PORT == AVRPORTE) 00268 #define SBBI3_RST2_SOD_REG PORTE 00269 #define SBBI3_RST2_OE_REG DDRE 00270 #elif (SBBI3_RST2_PORT == AVRPORTF) 00271 #define SBBI3_RST2_SOD_REG PORTF 00272 #define SBBI3_RST2_OE_REG DDRF 00273 #elif (SBBI3_RST2_PORT == AVRPORTG) 00274 #define SBBI3_RST2_SOD_REG PORTG 00275 #define SBBI3_RST2_OE_REG DDRG 00276 #elif (SBBI3_RST2_PORT == AVRPORTH) 00277 #define SBBI3_RST2_SOD_REG PORTH 00278 #define SBBI3_RST2_OE_REG DDRH 00279 #endif 00280 00282 #define SBBI3_RST2_ENA() sbi(SBBI3_RST2_OE_REG, SBBI3_RST2_BIT) 00283 00284 #define SBBI3_RST2_CLR() cbi(SBBI3_RST2_SOD_REG, SBBI3_RST2_BIT) 00285 00286 #define SBBI3_RST2_SET() sbi(SBBI3_RST2_SOD_REG, SBBI3_RST2_BIT) 00287 00288 #endif /* SBBI3_RST2_BIT */ 00289 00290 #ifdef SBBI3_RST3_BIT 00291 00292 #if (SBBI3_RST3_PORT == AVRPORTB) 00293 #define SBBI3_RST3_SOD_REG PORTB 00294 #define SBBI3_RST3_OE_REG DDRB 00295 #elif (SBBI3_RST3_PORT == AVRPORTD) 00296 #define SBBI3_RST3_SOD_REG PORTD 00297 #define SBBI3_RST3_OE_REG DDRD 00298 #elif (SBBI3_RST3_PORT == AVRPORTE) 00299 #define SBBI3_RST3_SOD_REG PORTE 00300 #define SBBI3_RST3_OE_REG DDRE 00301 #elif (SBBI3_RST3_PORT == AVRPORTF) 00302 #define SBBI3_RST3_SOD_REG PORTF 00303 #define SBBI3_RST3_OE_REG DDRF 00304 #elif (SBBI3_RST3_PORT == AVRPORTG) 00305 #define SBBI3_RST3_SOD_REG PORTG 00306 #define SBBI3_RST3_OE_REG DDRG 00307 #elif (SBBI3_RST3_PORT == AVRPORTH) 00308 #define SBBI3_RST3_SOD_REG PORTH 00309 #define SBBI3_RST3_OE_REG DDRH 00310 #endif 00311 00313 #define SBBI3_RST3_ENA() sbi(SBBI3_RST3_OE_REG, SBBI3_RST3_BIT) 00314 00315 #define SBBI3_RST3_CLR() cbi(SBBI3_RST3_SOD_REG, SBBI3_RST3_BIT) 00316 00317 #define SBBI3_RST3_SET() sbi(SBBI3_RST3_SOD_REG, SBBI3_RST3_BIT) 00318 00319 #endif /* SBBI3_RST3_BIT */ 00320 00321 #ifdef SBBI3_SCK_BIT 00322 00323 #if (SBBI3_SCK_PORT == AVRPORTB) 00324 #define SBBI3_SCK_SOD_REG PORTB 00325 #define SBBI3_SCK_OE_REG DDRB 00326 #elif (SBBI3_SCK_PORT == AVRPORTD) 00327 #define SBBI3_SCK_SOD_REG PORTD 00328 #define SBBI3_SCK_OE_REG DDRD 00329 #elif (SBBI3_SCK_PORT == AVRPORTE) 00330 #define SBBI3_SCK_SOD_REG PORTE 00331 #define SBBI3_SCK_OE_REG DDRE 00332 #elif (SBBI3_SCK_PORT == AVRPORTF) 00333 #define SBBI3_SCK_SOD_REG PORTF 00334 #define SBBI3_SCK_OE_REG DDRF 00335 #elif (SBBI3_SCK_PORT == AVRPORTG) 00336 #define SBBI3_SCK_SOD_REG PORTG 00337 #define SBBI3_SCK_OE_REG DDRG 00338 #elif (SBBI3_SCK_PORT == AVRPORTH) 00339 #define SBBI3_SCK_SOD_REG PORTH 00340 #define SBBI3_SCK_OE_REG DDRH 00341 #endif 00342 00344 #define SBBI3_SCK_ENA() sbi(SBBI3_SCK_OE_REG, SBBI3_SCK_BIT) 00345 00346 #define SBBI3_SCK_CLR() cbi(SBBI3_SCK_SOD_REG, SBBI3_SCK_BIT) 00347 00348 #define SBBI3_SCK_SET() sbi(SBBI3_SCK_SOD_REG, SBBI3_SCK_BIT) 00349 00350 #if defined(SBBI3_MOSI_BIT) 00351 00352 #if (SBBI3_MOSI_PORT == AVRPORTB) 00353 #define SBBI3_MOSI_SOD_REG PORTB 00354 #define SBBI3_MOSI_OE_REG DDRB 00355 #elif (SBBI3_MOSI_PORT == AVRPORTD) 00356 #define SBBI3_MOSI_SOD_REG PORTD 00357 #define SBBI3_MOSI_OE_REG DDRD 00358 #elif (SBBI3_MOSI_PORT == AVRPORTE) 00359 #define SBBI3_MOSI_SOD_REG PORTE 00360 #define SBBI3_MOSI_OE_REG DDRE 00361 #elif (SBBI3_MOSI_PORT == AVRPORTF) 00362 #define SBBI3_MOSI_SOD_REG PORTF 00363 #define SBBI3_MOSI_OE_REG DDRF 00364 #elif (SBBI3_MOSI_PORT == AVRPORTG) 00365 #define SBBI3_MOSI_SOD_REG PORTG 00366 #define SBBI3_MOSI_OE_REG DDRG 00367 #elif (SBBI3_MOSI_PORT == AVRPORTH) 00368 #define SBBI3_MOSI_SOD_REG PORTH 00369 #define SBBI3_MOSI_OE_REG DDRH 00370 #endif 00371 00373 #define SBBI3_MOSI_ENA() sbi(SBBI3_MOSI_OE_REG, SBBI3_MOSI_BIT) 00374 00375 #define SBBI3_MOSI_CLR() cbi(SBBI3_MOSI_SOD_REG, SBBI3_MOSI_BIT) 00376 00377 #define SBBI3_MOSI_SET() sbi(SBBI3_MOSI_SOD_REG, SBBI3_MOSI_BIT) 00378 00379 #else /* SBBI3_MOSI_BIT */ 00380 00381 #define SBBI3_MOSI_ENA() 00382 #define SBBI3_MOSI_CLR() 00383 #define SBBI3_MOSI_SET() 00384 00385 #endif /* SBBI3_MOSI_BIT */ 00386 00387 #if defined(SBBI3_MISO_BIT) 00388 00389 #if (SBBI3_MISO_PORT == AVRPORTB) 00390 #define SBBI3_MISO_PDS_REG PINB 00391 #define SBBI3_MISO_PUE_REG PORTB 00392 #define SBBI3_MISO_OE_REG DDRB 00393 #elif (SBBI3_MISO_PORT == AVRPORTD) 00394 #define SBBI3_MISO_PDS_REG PIND 00395 #define SBBI3_MISO_PUE_REG PORTD 00396 #define SBBI3_MISO_OE_REG DDRD 00397 #elif (SBBI3_MISO_PORT == AVRPORTE) 00398 #define SBBI3_MISO_PDS_REG PINE 00399 #define SBBI3_MISO_PUE_REG PORTE 00400 #define SBBI3_MISO_OE_REG DDRE 00401 #elif (SBBI3_MISO_PORT == AVRPORTF) 00402 #define SBBI3_MISO_PDS_REG PINF 00403 #define SBBI3_MISO_PUE_REG PORTF 00404 #define SBBI3_MISO_OE_REG DDRF 00405 #elif (SBBI3_MISO_PORT == AVRPORTG) 00406 #define SBBI3_MISO_PDS_REG PING 00407 #define SBBI3_MISO_PUE_REG PORTG 00408 #define SBBI3_MISO_OE_REG DDRG 00409 #elif (SBBI3_MISO_PORT == AVRPORTH) 00410 #define SBBI3_MISO_PDS_REG PINH 00411 #define SBBI3_MISO_PUE_REG PORTH 00412 #define SBBI3_MISO_OE_REG DDRH 00413 #endif 00414 00416 #define SBBI3_MISO_ENA() \ 00417 cbi(SBBI3_MISO_OE_REG, SBBI3_MISO_BIT); \ 00418 sbi(SBBI3_MISO_PUE_REG, SBBI3_MISO_BIT) 00419 00420 #define SBBI3_MISO_TST() ((inb(SBBI3_MISO_PDS_REG) & _BV(SBBI3_MISO_BIT)) == _BV(SBBI3_MISO_BIT)) 00421 00422 #else /* SBBI3_MISO_BIT */ 00423 00424 #define SBBI3_MISO_ENA() 00425 #define SBBI3_MISO_TST() 0 00426 00427 #endif /* SBBI3_MISO_BIT */ 00428 00429 #endif /* SBBI3_SCK_BIT */ 00430 00431 #else /* MCU */ 00432 /* 00433 * AT91 implementation. 00434 * ====================================== 00435 */ 00436 00437 #ifdef SBBI3_CS0_BIT 00438 00439 #if !defined(SBBI3_CS0_PORT) 00440 #define SBBI3_CS0_PE_REG PIO_PER 00441 #define SBBI3_CS0_OE_REG PIO_OER 00442 #define SBBI3_CS0_COD_REG PIO_CODR 00443 #define SBBI3_CS0_SOD_REG PIO_SODR 00444 #elif SBBI3_CS0_PORT == PIOA_ID 00445 #define SBBI3_CS0_PE_REG PIOA_PER 00446 #define SBBI3_CS0_OE_REG PIOA_OER 00447 #define SBBI3_CS0_COD_REG PIOA_CODR 00448 #define SBBI3_CS0_SOD_REG PIOA_SODR 00449 #elif SBBI3_CS0_PORT == PIOB_ID 00450 #define SBBI3_CS0_PE_REG PIOB_PER 00451 #define SBBI3_CS0_OE_REG PIOB_OER 00452 #define SBBI3_CS0_COD_REG PIOB_CODR 00453 #define SBBI3_CS0_SOD_REG PIOB_SODR 00454 #elif SBBI3_CS0_PORT == PIOC_ID 00455 #define SBBI3_CS0_PE_REG PIOC_PER 00456 #define SBBI3_CS0_OE_REG PIOC_OER 00457 #define SBBI3_CS0_COD_REG PIOC_CODR 00458 #define SBBI3_CS0_SOD_REG PIOC_SODR 00459 #endif 00460 00462 #define SBBI3_CS0_ENA() \ 00463 outr(SBBI3_CS0_PE_REG, _BV(SBBI3_CS0_BIT)); \ 00464 outr(SBBI3_CS0_OE_REG, _BV(SBBI3_CS0_BIT)) 00465 00466 #define SBBI3_CS0_CLR() outr(SBBI3_CS0_COD_REG, _BV(SBBI3_CS0_BIT)) 00467 00468 #define SBBI3_CS0_SET() outr(SBBI3_CS0_SOD_REG, _BV(SBBI3_CS0_BIT)) 00469 00470 #endif /* SBBI3_CS0_BIT */ 00471 00472 #ifdef SBBI3_CS1_BIT 00473 00474 #if !defined(SBBI3_CS1_PORT) 00475 #define SBBI3_CS1_PE_REG PIO_PER 00476 #define SBBI3_CS1_OE_REG PIO_OER 00477 #define SBBI3_CS1_COD_REG PIO_CODR 00478 #define SBBI3_CS1_SOD_REG PIO_SODR 00479 #elif SBBI3_CS1_PORT == PIOA_ID 00480 #define SBBI3_CS1_PE_REG PIOA_PER 00481 #define SBBI3_CS1_OE_REG PIOA_OER 00482 #define SBBI3_CS1_COD_REG PIOA_CODR 00483 #define SBBI3_CS1_SOD_REG PIOA_SODR 00484 #elif SBBI3_CS1_PORT == PIOB_ID 00485 #define SBBI3_CS1_PE_REG PIOB_PER 00486 #define SBBI3_CS1_OE_REG PIOB_OER 00487 #define SBBI3_CS1_COD_REG PIOB_CODR 00488 #define SBBI3_CS1_SOD_REG PIOB_SODR 00489 #elif SBBI3_CS1_PORT == PIOC_ID 00490 #define SBBI3_CS1_PE_REG PIOC_PER 00491 #define SBBI3_CS1_OE_REG PIOC_OER 00492 #define SBBI3_CS1_COD_REG PIOC_CODR 00493 #define SBBI3_CS1_SOD_REG PIOC_SODR 00494 #endif 00495 00497 #define SBBI3_CS1_ENA() \ 00498 outr(SBBI3_CS1_PE_REG, _BV(SBBI3_CS1_BIT)); \ 00499 outr(SBBI3_CS1_OE_REG, _BV(SBBI3_CS1_BIT)) 00500 00501 #define SBBI3_CS1_CLR() outr(SBBI3_CS1_COD_REG, _BV(SBBI3_CS1_BIT)) 00502 00503 #define SBBI3_CS1_SET() outr(SBBI3_CS1_SOD_REG, _BV(SBBI3_CS1_BIT)) 00504 00505 #endif /* SBBI3_CS1_BIT */ 00506 00507 #ifdef SBBI3_CS2_BIT 00508 00509 #if !defined(SBBI3_CS2_PORT) 00510 #define SBBI3_CS2_PE_REG PIO_PER 00511 #define SBBI3_CS2_OE_REG PIO_OER 00512 #define SBBI3_CS2_COD_REG PIO_CODR 00513 #define SBBI3_CS2_SOD_REG PIO_SODR 00514 #elif SBBI3_CS2_PORT == PIOA_ID 00515 #define SBBI3_CS2_PE_REG PIOA_PER 00516 #define SBBI3_CS2_OE_REG PIOA_OER 00517 #define SBBI3_CS2_COD_REG PIOA_CODR 00518 #define SBBI3_CS2_SOD_REG PIOA_SODR 00519 #elif SBBI3_CS2_PORT == PIOB_ID 00520 #define SBBI3_CS2_PE_REG PIOB_PER 00521 #define SBBI3_CS2_OE_REG PIOB_OER 00522 #define SBBI3_CS2_COD_REG PIOB_CODR 00523 #define SBBI3_CS2_SOD_REG PIOB_SODR 00524 #elif SBBI3_CS2_PORT == PIOC_ID 00525 #define SBBI3_CS2_PE_REG PIOC_PER 00526 #define SBBI3_CS2_OE_REG PIOC_OER 00527 #define SBBI3_CS2_COD_REG PIOC_CODR 00528 #define SBBI3_CS2_SOD_REG PIOC_SODR 00529 #endif 00530 00532 #define SBBI3_CS2_ENA() \ 00533 outr(SBBI3_CS2_PE_REG, _BV(SBBI3_CS2_BIT)); \ 00534 outr(SBBI3_CS2_OE_REG, _BV(SBBI3_CS2_BIT)) 00535 00536 #define SBBI3_CS2_CLR() outr(SBBI3_CS2_COD_REG, _BV(SBBI3_CS2_BIT)) 00537 00538 #define SBBI3_CS2_SET() outr(SBBI3_CS2_SOD_REG, _BV(SBBI3_CS2_BIT)) 00539 00540 #endif /* SBBI3_CS2_BIT */ 00541 00542 #ifdef SBBI3_CS3_BIT 00543 00544 #if !defined(SBBI3_CS3_PORT) 00545 #define SBBI3_CS3_PE_REG PIO_PER 00546 #define SBBI3_CS3_OE_REG PIO_OER 00547 #define SBBI3_CS3_COD_REG PIO_CODR 00548 #define SBBI3_CS3_SOD_REG PIO_SODR 00549 #elif SBBI3_CS3_PORT == PIOA_ID 00550 #define SBBI3_CS3_PE_REG PIOA_PER 00551 #define SBBI3_CS3_OE_REG PIOA_OER 00552 #define SBBI3_CS3_COD_REG PIOA_CODR 00553 #define SBBI3_CS3_SOD_REG PIOA_SODR 00554 #elif SBBI3_CS3_PORT == PIOB_ID 00555 #define SBBI3_CS3_PE_REG PIOB_PER 00556 #define SBBI3_CS3_OE_REG PIOB_OER 00557 #define SBBI3_CS3_COD_REG PIOB_CODR 00558 #define SBBI3_CS3_SOD_REG PIOB_SODR 00559 #elif SBBI3_CS3_PORT == PIOC_ID 00560 #define SBBI3_CS3_PE_REG PIOC_PER 00561 #define SBBI3_CS3_OE_REG PIOC_OER 00562 #define SBBI3_CS3_COD_REG PIOC_CODR 00563 #define SBBI3_CS3_SOD_REG PIOC_SODR 00564 #endif 00565 00567 #define SBBI3_CS3_ENA() \ 00568 outr(SBBI3_CS3_PE_REG, _BV(SBBI3_CS3_BIT)); \ 00569 outr(SBBI3_CS3_OE_REG, _BV(SBBI3_CS3_BIT)) 00570 00571 #define SBBI3_CS3_CLR() outr(SBBI3_CS3_COD_REG, _BV(SBBI3_CS3_BIT)) 00572 00573 #define SBBI3_CS3_SET() outr(SBBI3_CS3_SOD_REG, _BV(SBBI3_CS3_BIT)) 00574 00575 #endif /* SBBI3_CS3_BIT */ 00576 00577 #ifdef SBBI3_RST0_BIT 00578 00579 #if !defined(SBBI3_RST0_PORT) 00580 #define SBBI3_RST0_PE_REG PIO_PER 00581 #define SBBI3_RST0_OE_REG PIO_OER 00582 #define SBBI3_RST0_COD_REG PIO_CODR 00583 #define SBBI3_RST0_SOD_REG PIO_SODR 00584 #elif SBBI3_RST0_PORT == PIOA_ID 00585 #define SBBI3_RST0_PE_REG PIOA_PER 00586 #define SBBI3_RST0_OE_REG PIOA_OER 00587 #define SBBI3_RST0_COD_REG PIOA_CODR 00588 #define SBBI3_RST0_SOD_REG PIOA_SODR 00589 #elif SBBI3_RST0_PORT == PIOB_ID 00590 #define SBBI3_RST0_PE_REG PIOB_PER 00591 #define SBBI3_RST0_OE_REG PIOB_OER 00592 #define SBBI3_RST0_COD_REG PIOB_CODR 00593 #define SBBI3_RST0_SOD_REG PIOB_SODR 00594 #elif SBBI3_RST0_PORT == PIOC_ID 00595 #define SBBI3_RST0_PE_REG PIOC_PER 00596 #define SBBI3_RST0_OE_REG PIOC_OER 00597 #define SBBI3_RST0_COD_REG PIOC_CODR 00598 #define SBBI3_RST0_SOD_REG PIOC_SODR 00599 #endif 00600 00602 #define SBBI3_RST0_ENA() \ 00603 outr(SBBI3_RST0_PE_REG, _BV(SBBI3_RST0_BIT)); \ 00604 outr(SBBI3_RST0_OE_REG, _BV(SBBI3_RST0_BIT)) 00605 00606 #define SBBI3_RST0_CLR() outr(SBBI3_RST0_COD_REG, _BV(SBBI3_RST0_BIT)) 00607 00608 #define SBBI3_RST0_SET() outr(SBBI3_RST0_SOD_REG, _BV(SBBI3_RST0_BIT)) 00609 00610 #endif /* SBBI3_RST0_BIT */ 00611 00612 #ifdef SBBI3_RST1_BIT 00613 00614 #if !defined(SBBI3_RST1_PORT) 00615 #define SBBI3_RST1_PE_REG PIO_PER 00616 #define SBBI3_RST1_OE_REG PIO_OER 00617 #define SBBI3_RST1_COD_REG PIO_CODR 00618 #define SBBI3_RST1_SOD_REG PIO_SODR 00619 #elif SBBI3_RST1_PORT == PIOA_ID 00620 #define SBBI3_RST1_PE_REG PIOA_PER 00621 #define SBBI3_RST1_OE_REG PIOA_OER 00622 #define SBBI3_RST1_COD_REG PIOA_CODR 00623 #define SBBI3_RST1_SOD_REG PIOA_SODR 00624 #elif SBBI3_RST1_PORT == PIOB_ID 00625 #define SBBI3_RST1_PE_REG PIOB_PER 00626 #define SBBI3_RST1_OE_REG PIOB_OER 00627 #define SBBI3_RST1_COD_REG PIOB_CODR 00628 #define SBBI3_RST1_SOD_REG PIOB_SODR 00629 #elif SBBI3_RST1_PORT == PIOC_ID 00630 #define SBBI3_RST1_PE_REG PIOC_PER 00631 #define SBBI3_RST1_OE_REG PIOC_OER 00632 #define SBBI3_RST1_COD_REG PIOC_CODR 00633 #define SBBI3_RST1_SOD_REG PIOC_SODR 00634 #endif 00635 00637 #define SBBI3_RST1_ENA() \ 00638 outr(SBBI3_RST1_PE_REG, _BV(SBBI3_RST1_BIT)); \ 00639 outr(SBBI3_RST1_OE_REG, _BV(SBBI3_RST1_BIT)) 00640 00641 #define SBBI3_RST1_CLR() outr(SBBI3_RST1_COD_REG, _BV(SBBI3_RST1_BIT)) 00642 00643 #define SBBI3_RST1_SET() outr(SBBI3_RST1_SOD_REG, _BV(SBBI3_RST1_BIT)) 00644 00645 #endif /* SBBI3_RST1_BIT */ 00646 00647 #ifdef SBBI3_RST2_BIT 00648 00649 #if !defined(SBBI3_RST2_PORT) 00650 #define SBBI3_RST2_PE_REG PIO_PER 00651 #define SBBI3_RST2_OE_REG PIO_OER 00652 #define SBBI3_RST2_COD_REG PIO_CODR 00653 #define SBBI3_RST2_SOD_REG PIO_SODR 00654 #elif SBBI3_RST2_PORT == PIOA_ID 00655 #define SBBI3_RST2_PE_REG PIOA_PER 00656 #define SBBI3_RST2_OE_REG PIOA_OER 00657 #define SBBI3_RST2_COD_REG PIOA_CODR 00658 #define SBBI3_RST2_SOD_REG PIOA_SODR 00659 #elif SBBI3_RST2_PORT == PIOB_ID 00660 #define SBBI3_RST2_PE_REG PIOB_PER 00661 #define SBBI3_RST2_OE_REG PIOB_OER 00662 #define SBBI3_RST2_COD_REG PIOB_CODR 00663 #define SBBI3_RST2_SOD_REG PIOB_SODR 00664 #elif SBBI3_RST2_PORT == PIOC_ID 00665 #define SBBI3_RST2_PE_REG PIOC_PER 00666 #define SBBI3_RST2_OE_REG PIOC_OER 00667 #define SBBI3_RST2_COD_REG PIOC_CODR 00668 #define SBBI3_RST2_SOD_REG PIOC_SODR 00669 #endif 00670 00672 #define SBBI3_RST2_ENA() \ 00673 outr(SBBI3_RST2_PE_REG, _BV(SBBI3_RST2_BIT)); \ 00674 outr(SBBI3_RST2_OE_REG, _BV(SBBI3_RST2_BIT)) 00675 00676 #define SBBI3_RST2_CLR() outr(SBBI3_RST2_COD_REG, _BV(SBBI3_RST2_BIT)) 00677 00678 #define SBBI3_RST2_SET() outr(SBBI3_RST2_SOD_REG, _BV(SBBI3_RST2_BIT)) 00679 00680 #endif /* SBBI3_RST2_BIT */ 00681 00682 #ifdef SBBI3_RST3_BIT 00683 00684 #if !defined(SBBI3_RST3_PORT) 00685 #define SBBI3_RST3_PE_REG PIO_PER 00686 #define SBBI3_RST3_OE_REG PIO_OER 00687 #define SBBI3_RST3_COD_REG PIO_CODR 00688 #define SBBI3_RST3_SOD_REG PIO_SODR 00689 #elif SBBI3_RST3_PORT == PIOA_ID 00690 #define SBBI3_RST3_PE_REG PIOA_PER 00691 #define SBBI3_RST3_OE_REG PIOA_OER 00692 #define SBBI3_RST3_COD_REG PIOA_CODR 00693 #define SBBI3_RST3_SOD_REG PIOA_SODR 00694 #elif SBBI3_RST3_PORT == PIOB_ID 00695 #define SBBI3_RST3_PE_REG PIOB_PER 00696 #define SBBI3_RST3_OE_REG PIOB_OER 00697 #define SBBI3_RST3_COD_REG PIOB_CODR 00698 #define SBBI3_RST3_SOD_REG PIOB_SODR 00699 #elif SBBI3_RST3_PORT == PIOC_ID 00700 #define SBBI3_RST3_PE_REG PIOC_PER 00701 #define SBBI3_RST3_OE_REG PIOC_OER 00702 #define SBBI3_RST3_COD_REG PIOC_CODR 00703 #define SBBI3_RST3_SOD_REG PIOC_SODR 00704 #endif 00705 00707 #define SBBI3_RST3_ENA() \ 00708 outr(SBBI3_RST3_PE_REG, _BV(SBBI3_RST3_BIT)); \ 00709 outr(SBBI3_RST3_OE_REG, _BV(SBBI3_RST3_BIT)) 00710 00711 #define SBBI3_RST3_CLR() outr(SBBI3_RST3_COD_REG, _BV(SBBI3_RST3_BIT)) 00712 00713 #define SBBI3_RST3_SET() outr(SBBI3_RST3_SOD_REG, _BV(SBBI3_RST3_BIT)) 00714 00715 #endif /* SBBI3_RST3_BIT */ 00716 00717 #ifdef SBBI3_SCK_BIT 00718 00719 #if !defined(SBBI3_SCK_PORT) 00720 #define SBBI3_SCK_PE_REG PIO_PER 00721 #define SBBI3_SCK_OE_REG PIO_OER 00722 #define SBBI3_SCK_COD_REG PIO_CODR 00723 #define SBBI3_SCK_SOD_REG PIO_SODR 00724 #elif SBBI3_SCK_PORT == PIOA_ID 00725 #define SBBI3_SCK_PE_REG PIOA_PER 00726 #define SBBI3_SCK_OE_REG PIOA_OER 00727 #define SBBI3_SCK_COD_REG PIOA_CODR 00728 #define SBBI3_SCK_SOD_REG PIOA_SODR 00729 #elif SBBI3_SCK_PORT == PIOB_ID 00730 #define SBBI3_SCK_PE_REG PIOB_PER 00731 #define SBBI3_SCK_OE_REG PIOB_OER 00732 #define SBBI3_SCK_COD_REG PIOB_CODR 00733 #define SBBI3_SCK_SOD_REG PIOB_SODR 00734 #elif SBBI3_SCK_PORT == PIOC_ID 00735 #define SBBI3_SCK_PE_REG PIOC_PER 00736 #define SBBI3_SCK_OE_REG PIOC_OER 00737 #define SBBI3_SCK_COD_REG PIOC_CODR 00738 #define SBBI3_SCK_SOD_REG PIOC_SODR 00739 #endif 00740 00742 #define SBBI3_SCK_ENA() \ 00743 outr(SBBI3_SCK_PE_REG, _BV(SBBI3_SCK_BIT)); \ 00744 outr(SBBI3_SCK_OE_REG, _BV(SBBI3_SCK_BIT)) 00745 00746 #define SBBI3_SCK_CLR() outr(SBBI3_SCK_COD_REG, _BV(SBBI3_SCK_BIT)) 00747 00748 #define SBBI3_SCK_SET() outr(SBBI3_SCK_SOD_REG, _BV(SBBI3_SCK_BIT)) 00749 00750 #ifdef SBBI3_MOSI_BIT 00751 00752 #if !defined(SBBI3_MOSI_PORT) 00753 #define SBBI3_MOSI_PE_REG PIO_PER 00754 #define SBBI3_MOSI_OE_REG PIO_OER 00755 #define SBBI3_MOSI_COD_REG PIO_CODR 00756 #define SBBI3_MOSI_SOD_REG PIO_SODR 00757 #elif SBBI3_MOSI_PORT == PIOA_ID 00758 #define SBBI3_MOSI_PE_REG PIOA_PER 00759 #define SBBI3_MOSI_OE_REG PIOA_OER 00760 #define SBBI3_MOSI_COD_REG PIOA_CODR 00761 #define SBBI3_MOSI_SOD_REG PIOA_SODR 00762 #elif SBBI3_MOSI_PORT == PIOB_ID 00763 #define SBBI3_MOSI_PE_REG PIOB_PER 00764 #define SBBI3_MOSI_OE_REG PIOB_OER 00765 #define SBBI3_MOSI_COD_REG PIOB_CODR 00766 #define SBBI3_MOSI_SOD_REG PIOB_SODR 00767 #elif SBBI3_MOSI_PORT == PIOC_ID 00768 #define SBBI3_MOSI_PE_REG PIOC_PER 00769 #define SBBI3_MOSI_OE_REG PIOC_OER 00770 #define SBBI3_MOSI_COD_REG PIOC_CODR 00771 #define SBBI3_MOSI_SOD_REG PIOC_SODR 00772 #endif 00773 00775 #define SBBI3_MOSI_ENA() \ 00776 outr(SBBI3_MOSI_PE_REG, _BV(SBBI3_MOSI_BIT)); \ 00777 outr(SBBI3_MOSI_OE_REG, _BV(SBBI3_MOSI_BIT)) 00778 00779 #define SBBI3_MOSI_CLR() outr(SBBI3_MOSI_COD_REG, _BV(SBBI3_MOSI_BIT)) 00780 00781 #define SBBI3_MOSI_SET() outr(SBBI3_MOSI_SOD_REG, _BV(SBBI3_MOSI_BIT)) 00782 00783 #else /* SBBI3_MOSI_BIT */ 00784 00785 #define SBBI3_MOSI_ENA() 00786 #define SBBI3_MOSI_CLR() 00787 #define SBBI3_MOSI_SET() 00788 00789 #endif /* SBBI3_MOSI_BIT */ 00790 00791 #ifdef SBBI3_MISO_BIT 00792 00793 #if !defined(SBBI3_MISO_PORT) 00794 #define SBBI3_MISO_PE_REG PIO_PER 00795 #define SBBI3_MISO_OD_REG PIO_ODR 00796 #define SBBI3_MISO_PDS_REG PIO_PDSR 00797 #elif SBBI3_MISO_PORT == PIOA_ID 00798 #define SBBI3_MISO_PE_REG PIOA_PER 00799 #define SBBI3_MISO_OD_REG PIOA_ODR 00800 #define SBBI3_MISO_PDS_REG PIOA_PDSR 00801 #elif SBBI3_MISO_PORT == PIOB_ID 00802 #define SBBI3_MISO_PE_REG PIOB_PER 00803 #define SBBI3_MISO_OD_REG PIOB_ODR 00804 #define SBBI3_MISO_PDS_REG PIOB_PDSR 00805 #elif SBBI3_MISO_PORT == PIOC_ID 00806 #define SBBI3_MISO_PE_REG PIOC_PER 00807 #define SBBI3_MISO_OD_REG PIOC_ODR 00808 #define SBBI3_MISO_PDS_REG PIOC_PDSR 00809 #endif 00810 00812 #define SBBI3_MISO_ENA() \ 00813 outr(SBBI3_MISO_PE_REG, _BV(SBBI3_MISO_BIT)); \ 00814 outr(SBBI3_MISO_OD_REG, _BV(SBBI3_MISO_BIT)) 00815 00816 #define SBBI3_MISO_TST() ((inr(SBBI3_MISO_PDS_REG) & _BV(SBBI3_MISO_BIT)) == _BV(SBBI3_MISO_BIT)) 00817 00818 #else /* SBBI3_MISO_BIT */ 00819 00820 #define SBBI3_MISO_ENA() 00821 #define SBBI3_MISO_TST() 0 00822 00823 #endif /* SBBI3_MISO_BIT */ 00824 00825 #endif /* SBBI3_SCK_BIT */ 00826 00827 #endif /* MCU */ 00828 00829 #define SBBI3_INIT() \ 00830 { \ 00831 SBBI3_SCK_CLR(); \ 00832 SBBI3_SCK_ENA(); \ 00833 SBBI3_MOSI_CLR(); \ 00834 SBBI3_MOSI_ENA(); \ 00835 SBBI3_MISO_ENA(); \ 00836 } 00837 00838 #endif