Collaboration diagram for * AT91:
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The AT91 peripherals are connected to the 32-bit wide advanced peripheral bus. All registers are word accessible only.
Modules | |
* Bus Interface | |
External bus interface registers. | |
Power Saving | |
Power saving registers. | |
Interrupt Controller | |
Advanced interrupt controller registers. | |
Parallel I/O | |
Parallel I/O controller registers. | |
Watchdog Registers | |
Watchdog timer registers. | |
Watchdog Functions | |
AT91 on-chip watchdog timer. | |
Special Function | |
Special function registers. | |
USART | |
Universal synchronous / asynchronous receiver / transmitter registers. | |
Timer/Counter | |
Timer / Counter registers. | |
Peripheral Identifiers and Interrupts | |
#define | FIQ_ID |
Fast interrupt ID. | |
#define | SYSIRQ_ID |
System interrupt ID. | |
#define | PIOA_ID |
Parallel I/O controller ID. | |
#define | PIOB_ID |
Parallel I/O controller ID. | |
#define | SPI0_ID |
Serial peripheral interface 0 ID. | |
#define | SPI1_ID |
Serial peripheral interface 1 ID. | |
#define | US0_ID |
USART 0 ID. | |
#define | US1_ID |
USART 1 ID. | |
#define | SSC_ID |
Synchronous serial controller ID. | |
#define | TWI_ID |
Two-wire interface ID. | |
#define | PWMC_ID |
PWM controller ID. | |
#define | UDP_ID |
USB device port ID. | |
#define | TC0_ID |
Timer 0 ID. | |
#define | TC1_ID |
Timer 1 ID. | |
#define | TC2_ID |
Timer 2 ID. | |
#define | CAN_ID |
CAN controller ID. | |
#define | EMAC_ID |
Ethernet MAC ID. | |
#define | ADC_ID |
Analog to digital converter ID. | |
#define | IRQ0_ID |
External interrupt 0 ID. | |
#define | IRQ1_ID |
External interrupt 1 ID. | |
SPI0 peripheral multiplexing | |
#define | SPI0_NPCS0_PA12A |
Port bit number on PIO-A Perpheral A. | |
#define | SPI0_NPCS1_PA13A |
Port bit number on PIO-A Perpheral A. | |
#define | SPI0_NPCS1_PA07B |
Port bit number on PIO-A Perpheral B. | |
#define | SPI0_NPCS1_PB13B |
Port bit number on PIO-B Perpheral B. | |
#define | SPI0_NPCS2_PA14A |
Port bit number on PIO-A Perpheral A. | |
#define | SPI0_NPCS2_PA08B |
Port bit number on PIO-A Perpheral B. | |
#define | SPI0_NPCS2_PB14B |
Port bit number on PIO-B Perpheral B. | |
#define | SPI0_NPCS3_PA15A |
Port bit number on PIO-A Perpheral A. | |
#define | SPI0_NPCS3_PA09B |
Port bit number on PIO-A Perpheral B. | |
#define | SPI0_NPCS3_PB17B |
Port bit number on PIO-B Perpheral B. | |
#define | SPI0_MISO_PA16A |
Port bit number on PIO-A Perpheral A. | |
#define | SPI0_MOSI_PA17A |
Port bit number on PIO-A Perpheral A. | |
#define | SPI0_SPCK_PA18A |
Port bit number on PIO-A Perpheral A. | |
Peripheral Identifiers and Interrupts | |
#define | FIQ_ID |
Fast interrupt ID. | |
#define | SWIRQ_ID |
Software interrupt ID. | |
#define | US0_ID |
USART 0 ID. | |
#define | US1_ID |
USART 1 ID. | |
#define | TC0_ID |
Timer 0 ID. | |
#define | TC1_ID |
Timer 1 ID. | |
#define | TC2_ID |
Timer 2 ID. | |
#define | WDI_ID |
Watchdog interrupt ID. | |
#define | PIO_ID |
Parallel I/O controller ID. | |
#define | IRQ0_ID |
External interrupt 0 ID. | |
#define | IRQ1_ID |
External interrupt 1 ID. | |
#define | IRQ2_ID |
External interrupt 2 ID. | |
Defines | |
#define | IRQ_ENTRY() |
#define | IRQ_EXIT() |
#define | FIQ_ENTRY() |
#define | FIQ_EXIT() |