This file collects all port specifications for the AVR platform and provides an overview of hardware resources in use.
Values are geared to the Ethernut reference design and can be changed by the Configurator. This program creates a file with the same name in the build tree, which replaces this placeholder.
Defines | |
#define | UART0_RTS_AVRPORT |
USART settings. | |
#define | UART1_RTS_AVRPORT |
#define | RTL_BASE_ADDR |
Settings for the Realtek RTL8019AS. Memory mapped base address. | |
#define | RTL_SIGNAL_IRQ |
Interrupt used by the controller. | |
#define | RTL_EESK_BIT |
Clock input for EEPROM emulation. | |
#define | RTL_EESK_AVRPORT |
#define | RTL_EEDO_BIT |
#define | RTL_EEDO_AVRPORT |
#define | RTL_EEMU_BIT |
#define | RTL_EEMU_AVRPORT |
#define | SPIDIGIO_SOUT_BIT |
Port usage of digital I/O shift register. | |
#define | SPIDIGIO_SOUT_AVRPORT |
#define | SPIDIGIO_SIN_BIT |
#define | SPIDIGIO_SIN_PIN |
#define | SPIDIGIO_SIN_PORT |
#define | SPIDIGIO_SIN_DDR |
#define | SPIDIGIO_SCLK_BIT |
#define | SPIDIGIO_SCLK_AVRPORT |
#define | SPIDIGIO_LDI_BIT |
#define | SPIDIGIO_LDI_AVRPORT |
#define | SPIDIGIO_LDO_BIT |
#define | SPIDIGIO_LDO_AVRPORT |
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Clock input for EEPROM emulation. This is enabled by default, but the driver will run a check before jumping into the emulation. |