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Chip Select Register |
#define | EBI_CSR(i) (EBI_BASE + i * 4) |
| Chip select register address.
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#define | EBI_DBW 0x00000003 |
| Masks data bus width.
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#define | EBI_DBW_16 0x00000001 |
| 16-bit data bus width.
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#define | EBI_DBW_8 0x00000002 |
| 8-bit data bus width.
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#define | EBI_NWS 0x0000001C |
| Masks number of wait states.
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#define | EBI_NWS_1 0x00000000 |
| 1 wait state.
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#define | EBI_NWS_2 0x00000004 |
| 2 wait states.
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#define | EBI_NWS_3 0x00000008 |
| 3 wait states.
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#define | EBI_NWS_4 0x0000000C |
| 4 wait states.
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#define | EBI_NWS_5 0x00000010 |
| 5 wait states.
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#define | EBI_NWS_6 0x00000014 |
| 6 wait states.
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#define | EBI_NWS_7 0x00000018 |
| 7 wait states.
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#define | EBI_NWS_8 0x0000001C |
| 8 wait states.
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#define | EBI_WSE 0x00000020 |
| Wait state enable.
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#define | EBI_PAGES 0x00000180 |
| Page size mask.
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#define | EBI_PAGES_1M 0x00000000 |
| 1 MByte page size.
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#define | EBI_PAGES_4M 0x00000080 |
| 4 MBytes page size.
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#define | EBI_PAGES_16M 0x00000100 |
| 16 MBytes page size.
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#define | EBI_PAGES_64M 0x00000180 |
| 64 MBytes page size.
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#define | EBI_TDF 0x00000E00 |
| Masks data float output time clock cycles.
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#define | EBI_TDF_0 0x00000000 |
| No added cycles.
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#define | EBI_TDF_1 0x00000200 |
| 1 cycle.
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#define | EBI_TDF_2 0x00000400 |
| 2 cycles.
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#define | EBI_TDF_3 0x00000600 |
| 3 cycles.
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#define | EBI_TDF_4 0x00000800 |
| 4 cycles.
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#define | EBI_TDF_5 0x00000A00 |
| 5 cycles.
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#define | EBI_TDF_6 0x00000C00 |
| 6 cycles.
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#define | EBI_TDF_7 0x00000E00 |
| 7 cycles.
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#define | EBI_BAT 0x00001000 |
| Byte access type.
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#define | EBI_BAT_BYTE_WRITE 0x00000000 |
| Byte write access type.
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#define | EBI_BAT_BYTE_SELECT 0x00001000 |
| Byte select access type.
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#define | EBI_CSEN 0x00002000 |
| Chip select enable.
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#define | EBI_BA 0xFFF00000 |
| Page base address mask.
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Remap Control Register |
#define | EBI_RCR (EBI_BASE + 0x20) |
| Remap control register address.
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#define | EBI_RCB 0x00000001 |
| Remap command.
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Memory Control Register |
#define | EBI_MCR (EBI_BASE + 0x24) |
| Memory control register address.
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#define | EBI_ALE 0x00000007 |
| Address line enable.
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#define | EBI_ALE_16M 0x00000000 |
| 16 Mbytes total address space.
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#define | EBI_ALE_8M 0x00000004 |
| 8 Mbytes total address space.
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#define | EBI_ALE_4M 0x00000005 |
| 4 Mbytes total address space.
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#define | EBI_ALE_2M 0x00000006 |
| 2 Mbytes total address space.
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#define | EBI_ALE_1M 0x00000007 |
| 1 Mbyte total address space.
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#define | EBI_DRP 0x00000010 |
| Data read protocol mask.
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#define | EBI_DRP_STANDARD 0x00000000 |
| Standard read protocol.
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#define | EBI_DRP_EARLY 0x00000010 |
| Early read protocol.
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