debug_at91.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (C) 2001-2006 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  *
00032  */
00033 
00084 #include <cfg/os.h>
00085 #include <cfg/clock.h>
00086 
00087 #include <dev/debug.h>
00088 #include <sys/device.h>
00089 #include <sys/file.h>
00090 #include <sys/timer.h>
00091 
00092 #define static
00093 
00098 
00099 #if defined(DBGU_BASE)
00100 static NUTFILE dbgfile;
00101 #else
00102 static NUTFILE dbgfile0;
00103 static NUTFILE dbgfile1;
00104 #endif
00105 
00106 #if defined(DBGU_BASE)
00107 
00114 static int DebugIOCtl(NUTDEVICE * dev, int req, void *conf)
00115 {
00116     if(req == UART_SETSPEED) {
00117 #if defined(AT91_PLL_MAINCK)
00118         outr(DBGU_BRGR, (At91GetMasterClock() / (8 * (*((u_long *)conf))) + 1) / 2);
00119 #else
00120         outr(DBGU_BRGR, (NutGetCpuClock() / (8 * (*((u_long *)conf))) + 1) / 2);
00121 #endif
00122         return 0;
00123     }
00124     return -1;
00125 }
00126 
00132 static int DebugInit(NUTDEVICE * dev)
00133 {
00134 #if defined (MCU_AT91SAM7X256)
00135     /* Disable GPIO on UART tx/rx pins. */
00136     outr(PIOA_PDR, _BV(27) | _BV(28));
00137     /* Reset UART. */
00138     outr(DBGU_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00139     /* Disable all UART interrupts. */
00140     outr(DBGU_IDR, 0xFFFFFFFF);
00141     /* Set UART baud rate generator register. */
00142     outr(DBGU_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00143     /* Set UART mode to 8 data bits, no parity and 1 stop bit. */
00144     outr(DBGU_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00145     /* Enable UART receiver and transmitter. */
00146     outr(DBGU_CR, US_RXEN | US_TXEN);
00147 #endif
00148     return 0;
00149 }
00150 
00151 #else /* !DBGU_BASE */
00152 
00160 static int Debug0IOCtl(NUTDEVICE * dev, int req, void *conf)
00161 {
00162     if(req == UART_SETSPEED) {
00163         outr(US0_BRGR, (NutGetCpuClock() / (8 * (*((u_long *)conf))) + 1) / 2);
00164         return 0;
00165     }
00166     return -1;
00167 }
00168 
00176 static int Debug1IOCtl(NUTDEVICE * dev, int req, void *conf)
00177 {
00178     if(req == UART_SETSPEED) {
00179         outr(US1_BRGR, (NutGetCpuClock() / (8 * (*((u_long *)conf))) + 1) / 2);
00180         return 0;
00181     }
00182     return -1;
00183 }
00184 
00190 static int Debug0Init(NUTDEVICE * dev)
00191 {
00192 #if defined (MCU_AT91R40008)
00193     /* Enable UART clock. */
00194     outr(PS_PCER, _BV(US0_ID));
00195     /* Disable GPIO on UART tx/rx pins. */
00196     outr(PIO_PDR, _BV(14) | _BV(15));
00197 #elif defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM9260)
00198     /* Enable UART clock. */
00199     outr(PMC_PCER, _BV(US0_ID));
00200     /* Disable GPIO on UART tx/rx pins. */
00201     outr(PIOA_PDR, _BV(0) | _BV(1));
00202 #endif
00203     /* Reset UART. */
00204     outr(US0_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00205     /* Disable all UART interrupts. */
00206     outr(US0_IDR, 0xFFFFFFFF);
00207 #if defined (US0_RCR) && defined(US0_TCR)
00208     /* Clear UART counter registers. */
00209     outr(US0_RCR, 0);
00210     outr(US0_TCR, 0);
00211 #endif
00212     /* Set UART baud rate generator register. */
00213     outr(US0_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00214     /* Set UART mode to 8 data bits, no parity and 1 stop bit. */
00215     outr(US0_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00216     /* Enable UART receiver and transmitter. */
00217     outr(US0_CR, US_RXEN | US_TXEN);
00218 
00219     return 0;
00220 }
00221 
00227 static int Debug1Init(NUTDEVICE * dev)
00228 {
00229 #if defined (MCU_AT91R40008)
00230     /* Enable UART clock. */
00231     outr(PS_PCER, _BV(US1_ID));
00232     /* Disable GPIO on UART tx/rx pins. */
00233     outr(PIO_PDR, _BV(21) | _BV(22));
00234 #elif defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM9260)
00235     /* Enable UART clock. */
00236     outr(PMC_PCER, _BV(US1_ID));
00237     /* Disable GPIO on UART tx/rx pins. */
00238     outr(PIOA_PDR, _BV(5) | _BV(6));
00239 #endif
00240     /* Reset UART. */
00241     outr(US1_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00242     /* Disable all UART interrupts. */
00243     outr(US1_IDR, 0xFFFFFFFF);
00244 #if defined (US1_RCR) && defined(US1_TCR)
00245     /* Clear UART counter registers. */
00246     outr(US1_RCR, 0);
00247     outr(US1_TCR, 0);
00248 #endif
00249     /* Set UART baud rate generator register. */
00250     outr(US1_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00251     /* Set UART mode to 8 data bits, no parity and 1 stop bit. */
00252     outr(US1_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00253     /* Enable UART receiver and transmitter. */
00254     outr(US1_CR, US_RXEN | US_TXEN);
00255 
00256     return 0;
00257 }
00258 
00259 #endif
00260 
00261 
00268 static void DebugPut(CONST NUTDEVICE * dev, char ch)
00269 {
00270     while ((inr(dev->dev_base + US_CSR_OFF) & US_TXRDY) == 0);
00271     outr(dev->dev_base + US_THR_OFF, ch);
00272     if (ch == '\n') {
00273         DebugPut(dev, '\r');
00274     }
00275 }
00276 
00285 static int DebugWrite(NUTFILE * fp, CONST void *buffer, int len)
00286 {
00287     int c = len;
00288     CONST char *cp = buffer;
00289 
00290     while (c--) {
00291         DebugPut(fp->nf_dev, *cp++);
00292     }
00293     return len;
00294 }
00295 
00301 static NUTFILE *DebugOpen(NUTDEVICE * dev, CONST char *name, int mode, int acc)
00302 {
00303     NUTFILE *fp = (NUTFILE *) (dev->dev_dcb);
00304 
00305     fp->nf_next = 0;
00306     fp->nf_dev = dev;
00307     fp->nf_fcb = 0;
00308 
00309     return fp;
00310 }
00311 
00317 static int DebugClose(NUTFILE * fp)
00318 {
00319     return 0;
00320 }
00321 
00322 #if defined(DBGU_BASE)
00323 
00327 NUTDEVICE devDebug = {
00328     0,                          
00329     {'d', 'b', 'g', 'u', 0, 0, 0, 0, 0}
00330     ,                           
00331     0,                          
00332     DBGU_BASE,                  
00333     0,                          
00334     0,                          
00335     &dbgfile,                   
00336     DebugInit,                  
00337     DebugIOCtl,                 
00338     0,                          
00339     DebugWrite,                 
00340     DebugOpen,                  
00341     DebugClose,                 
00342     0                           
00343 };
00344 
00345 #else   /* !DBGU_BASE */
00346 
00350 NUTDEVICE devDebug0 = {
00351     0,                          
00352     {'u', 'a', 'r', 't', '0', 0, 0, 0, 0}
00353     ,                           
00354     0,                          
00355     USART0_BASE,                
00356     0,                          
00357     0,                          
00358     &dbgfile0,                  
00359     Debug0Init,                 
00360     Debug0IOCtl,                
00361     0,                          
00362     DebugWrite,                 
00363     DebugOpen,                  
00364     DebugClose,                 
00365     0                           
00366 };
00367 
00371 NUTDEVICE devDebug1 = {
00372     0,                          
00373     {'u', 'a', 'r', 't', '1', 0, 0, 0, 0}
00374     ,                           
00375     0,                          
00376     USART1_BASE,                
00377     0,                          
00378     0,                          
00379     &dbgfile1,                  
00380     Debug1Init,                 
00381     Debug1IOCtl,                
00382     0,                          
00383     DebugWrite,                 
00384     DebugOpen,                  
00385     DebugClose,                 
00386     0                           
00387 };
00388 
00389 #endif  /* !DBGU_BASE */
00390 

© 2000-2007 by egnite Software GmbH - visit http://www.ethernut.de/