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00051 #include <arch/arm.h>
00052 #include <dev/irqreg.h>
00053
00054 #if defined (IRQ2_ID)
00055
00056 #ifndef NUT_IRQPRI_IRQ2
00057 #define NUT_IRQPRI_IRQ2 4
00058 #endif
00059
00060 static int Interrupt2Ctl(int cmd, void *param);
00061
00062 IRQ_HANDLER sig_INTERRUPT2 = {
00063 #ifdef NUT_PERFMON
00064 0,
00065 #endif
00066 NULL,
00067 NULL,
00068 Interrupt2Ctl
00069 };
00070
00074 static void Interrupt2Entry(void) __attribute__ ((naked));
00075 void Interrupt2Entry(void)
00076 {
00077 IRQ_ENTRY();
00078 #ifdef NUT_PERFMON
00079 sig_INTERRUPT2.ir_count++;
00080 #endif
00081 if (sig_INTERRUPT2.ir_handler) {
00082 (sig_INTERRUPT2.ir_handler) (sig_INTERRUPT2.ir_arg);
00083 }
00084 IRQ_EXIT();
00085 }
00086
00102 static int Interrupt2Ctl(int cmd, void *param)
00103 {
00104 int rc = 0;
00105 u_int *ival = (u_int *)param;
00106 int enabled = inr(AIC_IMR) & _BV(IRQ2_ID);
00107
00108
00109 if (enabled) {
00110 outr(AIC_IDCR, _BV(IRQ2_ID));
00111 }
00112
00113 switch(cmd) {
00114 case NUT_IRQCTL_INIT:
00115
00116 outr(AIC_SVR(IRQ2_ID), (unsigned int)Interrupt2Entry);
00117
00118 outr(AIC_SMR(IRQ2_ID), AIC_SRCTYPE_EXT_NEGATIVE_EDGE | NUT_IRQPRI_IRQ2);
00119
00120 outr(AIC_ICCR, _BV(IRQ2_ID));
00121 break;
00122 case NUT_IRQCTL_STATUS:
00123 if (enabled) {
00124 *ival |= 1;
00125 }
00126 else {
00127 *ival &= ~1;
00128 }
00129 break;
00130 case NUT_IRQCTL_ENABLE:
00131 enabled = 1;
00132 break;
00133 case NUT_IRQCTL_DISABLE:
00134 enabled = 0;
00135 break;
00136 case NUT_IRQCTL_GETMODE:
00137 {
00138 u_int val = inr(AIC_SMR(IRQ2_ID)) & AIC_SRCTYPE;
00139
00140 if (val == AIC_SRCTYPE_EXT_LOW_LEVEL) {
00141 *ival = NUT_IRQMODE_LOWLEVEL;
00142 } else if (val == AIC_SRCTYPE_EXT_HIGH_LEVEL) {
00143 *ival = NUT_IRQMODE_HIGHLEVEL;
00144 } else if (val == AIC_SRCTYPE_EXT_POSITIVE_EDGE) {
00145 *ival = NUT_IRQMODE_RISINGEDGE;
00146 } else {
00147 *ival = NUT_IRQMODE_FALLINGEDGE;
00148 }
00149 }
00150 break;
00151 case NUT_IRQCTL_SETMODE:
00152 if (*ival == NUT_IRQMODE_LOWLEVEL) {
00153 outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_LOW_LEVEL);
00154 } else if (*ival == NUT_IRQMODE_HIGHLEVEL) {
00155 outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_HIGH_LEVEL);
00156 } else if (*ival == NUT_IRQMODE_FALLINGEDGE) {
00157 outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_NEGATIVE_EDGE);
00158 } else if (*ival == NUT_IRQMODE_RISINGEDGE) {
00159 outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_POSITIVE_EDGE);
00160 } else {
00161 rc = -1;
00162 }
00163 break;
00164 case NUT_IRQCTL_GETPRIO:
00165 *ival = inr(AIC_SMR(IRQ2_ID)) & AIC_PRIOR;
00166 break;
00167 case NUT_IRQCTL_SETPRIO:
00168 outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_PRIOR) | *ival);
00169 break;
00170 #ifdef NUT_PERFMON
00171 case NUT_IRQCTL_GETCOUNT:
00172 *ival = (u_int)sig_INTERRUPT2.ir_count;
00173 sig_INTERRUPT2.ir_count = 0;
00174 break;
00175 #endif
00176 default:
00177 rc = -1;
00178 break;
00179 }
00180
00181
00182 if (enabled) {
00183 outr(AIC_IECR, _BV(IRQ2_ID));
00184 }
00185 return rc;
00186 }
00187
00188 #endif