00001 #ifndef _DEV_SBBIF0_H_
00002 #define _DEV_SBBIF0_H_
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00052 #include <cfg/arch/gpio.h>
00053 #include <stdint.h>
00054
00058 #ifndef SBBI0_MAX_DEVICES
00059 #define SBBI0_MAX_DEVICES 4
00060 #endif
00061
00062 #if defined(__AVR__)
00063
00064
00065
00066
00067
00068 #ifdef SBBI0_CS0_BIT
00069
00070 #if (SBBI0_CS0_AVRPORT == AVRPORTB)
00071 #define SBBI0_CS0_SOD_REG PORTB
00072 #define SBBI0_CS0_OE_REG DDRB
00073 #elif (SBBI0_CS0_AVRPORT == AVRPORTD)
00074 #define SBBI0_CS0_SOD_REG PORTD
00075 #define SBBI0_CS0_OE_REG DDRD
00076 #elif (SBBI0_CS0_AVRPORT == AVRPORTE)
00077 #define SBBI0_CS0_SOD_REG PORTE
00078 #define SBBI0_CS0_OE_REG DDRE
00079 #elif (SBBI0_CS0_AVRPORT == AVRPORTF)
00080 #define SBBI0_CS0_SOD_REG PORTF
00081 #define SBBI0_CS0_OE_REG DDRF
00082 #elif (SBBI0_CS0_AVRPORT == AVRPORTG)
00083 #define SBBI0_CS0_SOD_REG PORTG
00084 #define SBBI0_CS0_OE_REG DDRG
00085 #elif (SBBI0_CS0_AVRPORT == AVRPORTH)
00086 #define SBBI0_CS0_SOD_REG PORTH
00087 #define SBBI0_CS0_OE_REG DDRH
00088 #endif
00089
00091 #define SBBI0_CS0_ENA() sbi(SBBI0_CS0_OE_REG, SBBI0_CS0_BIT)
00092
00093 #define SBBI0_CS0_CLR() cbi(SBBI0_CS0_SOD_REG, SBBI0_CS0_BIT)
00094
00095 #define SBBI0_CS0_SET() sbi(SBBI0_CS0_SOD_REG, SBBI0_CS0_BIT)
00096
00097 #else
00098
00099 #define SBBI0_CS0_ENA()
00100 #define SBBI0_CS0_CLR()
00101 #define SBBI0_CS0_SET()
00102
00103 #endif
00104
00105 #ifdef SBBI0_CS1_BIT
00106
00107 #if (SBBI0_CS1_AVRPORT == AVRPORTB)
00108 #define SBBI0_CS1_SOD_REG PORTB
00109 #define SBBI0_CS1_OE_REG DDRB
00110 #elif (SBBI0_CS1_AVRPORT == AVRPORTD)
00111 #define SBBI0_CS1_SOD_REG PORTD
00112 #define SBBI0_CS1_OE_REG DDRD
00113 #elif (SBBI0_CS1_AVRPORT == AVRPORTE)
00114 #define SBBI0_CS1_SOD_REG PORTE
00115 #define SBBI0_CS1_OE_REG DDRE
00116 #elif (SBBI0_CS1_AVRPORT == AVRPORTF)
00117 #define SBBI0_CS1_SOD_REG PORTF
00118 #define SBBI0_CS1_OE_REG DDRF
00119 #elif (SBBI0_CS1_AVRPORT == AVRPORTG)
00120 #define SBBI0_CS1_SOD_REG PORTG
00121 #define SBBI0_CS1_OE_REG DDRG
00122 #elif (SBBI0_CS1_AVRPORT == AVRPORTH)
00123 #define SBBI0_CS1_SOD_REG PORTH
00124 #define SBBI0_CS1_OE_REG DDRH
00125 #endif
00126
00128 #define SBBI0_CS1_ENA() sbi(SBBI0_CS1_OE_REG, SBBI0_CS1_BIT)
00129
00130 #define SBBI0_CS1_CLR() cbi(SBBI0_CS1_SOD_REG, SBBI0_CS1_BIT)
00131
00132 #define SBBI0_CS1_SET() sbi(SBBI0_CS1_SOD_REG, SBBI0_CS1_BIT)
00133
00134 #else
00135
00136 #define SBBI0_CS1_ENA()
00137 #define SBBI0_CS1_CLR()
00138 #define SBBI0_CS1_SET()
00139
00140 #endif
00141
00142 #ifdef SBBI0_CS2_BIT
00143
00144 #if (SBBI0_CS2_AVRPORT == AVRPORTB)
00145 #define SBBI0_CS2_SOD_REG PORTB
00146 #define SBBI0_CS2_OE_REG DDRB
00147 #elif (SBBI0_CS2_AVRPORT == AVRPORTD)
00148 #define SBBI0_CS2_SOD_REG PORTD
00149 #define SBBI0_CS2_OE_REG DDRD
00150 #elif (SBBI0_CS2_AVRPORT == AVRPORTE)
00151 #define SBBI0_CS2_SOD_REG PORTE
00152 #define SBBI0_CS2_OE_REG DDRE
00153 #elif (SBBI0_CS2_AVRPORT == AVRPORTF)
00154 #define SBBI0_CS2_SOD_REG PORTF
00155 #define SBBI0_CS2_OE_REG DDRF
00156 #elif (SBBI0_CS2_AVRPORT == AVRPORTG)
00157 #define SBBI0_CS2_SOD_REG PORTG
00158 #define SBBI0_CS2_OE_REG DDRG
00159 #elif (SBBI0_CS2_AVRPORT == AVRPORTH)
00160 #define SBBI0_CS2_SOD_REG PORTH
00161 #define SBBI0_CS2_OE_REG DDRH
00162 #endif
00163
00165 #define SBBI0_CS2_ENA() sbi(SBBI0_CS2_OE_REG, SBBI0_CS2_BIT)
00166
00167 #define SBBI0_CS2_CLR() cbi(SBBI0_CS2_SOD_REG, SBBI0_CS2_BIT)
00168
00169 #define SBBI0_CS2_SET() sbi(SBBI0_CS2_SOD_REG, SBBI0_CS2_BIT)
00170
00171 #else
00172
00173 #define SBBI0_CS2_ENA()
00174 #define SBBI0_CS2_CLR()
00175 #define SBBI0_CS2_SET()
00176
00177 #endif
00178
00179 #ifdef SBBI0_CS3_BIT
00180
00181 #if (SBBI0_CS3_AVRPORT == AVRPORTB)
00182 #define SBBI0_CS3_SOD_REG PORTB
00183 #define SBBI0_CS3_OE_REG DDRB
00184 #elif (SBBI0_CS3_AVRPORT == AVRPORTD)
00185 #define SBBI0_CS3_SOD_REG PORTD
00186 #define SBBI0_CS3_OE_REG DDRD
00187 #elif (SBBI0_CS3_AVRPORT == AVRPORTE)
00188 #define SBBI0_CS3_SOD_REG PORTE
00189 #define SBBI0_CS3_OE_REG DDRE
00190 #elif (SBBI0_CS3_AVRPORT == AVRPORTF)
00191 #define SBBI0_CS3_SOD_REG PORTF
00192 #define SBBI0_CS3_OE_REG DDRF
00193 #elif (SBBI0_CS3_AVRPORT == AVRPORTG)
00194 #define SBBI0_CS3_SOD_REG PORTG
00195 #define SBBI0_CS3_OE_REG DDRG
00196 #elif (SBBI0_CS3_AVRPORT == AVRPORTH)
00197 #define SBBI0_CS3_SOD_REG PORTH
00198 #define SBBI0_CS3_OE_REG DDRH
00199 #endif
00200
00202 #define SBBI0_CS3_ENA() sbi(SBBI0_CS3_OE_REG, SBBI0_CS3_BIT)
00203
00204 #define SBBI0_CS3_CLR() cbi(SBBI0_CS3_SOD_REG, SBBI0_CS3_BIT)
00205
00206 #define SBBI0_CS3_SET() sbi(SBBI0_CS3_SOD_REG, SBBI0_CS3_BIT)
00207
00208 #else
00209
00210 #define SBBI0_CS3_ENA()
00211 #define SBBI0_CS3_CLR()
00212 #define SBBI0_CS3_SET()
00213
00214 #endif
00215
00216 #ifdef SBBI0_RST0_BIT
00217
00218 #if (SBBI0_RST0_AVRPORT == AVRPORTB)
00219 #define SBBI0_RST0_SOD_REG PORTB
00220 #define SBBI0_RST0_OE_REG DDRB
00221 #elif (SBBI0_RST0_AVRPORT == AVRPORTD)
00222 #define SBBI0_RST0_SOD_REG PORTD
00223 #define SBBI0_RST0_OE_REG DDRD
00224 #elif (SBBI0_RST0_AVRPORT == AVRPORTE)
00225 #define SBBI0_RST0_SOD_REG PORTE
00226 #define SBBI0_RST0_OE_REG DDRE
00227 #elif (SBBI0_RST0_AVRPORT == AVRPORTF)
00228 #define SBBI0_RST0_SOD_REG PORTF
00229 #define SBBI0_RST0_OE_REG DDRF
00230 #elif (SBBI0_RST0_AVRPORT == AVRPORTG)
00231 #define SBBI0_RST0_SOD_REG PORTG
00232 #define SBBI0_RST0_OE_REG DDRG
00233 #elif (SBBI0_RST0_AVRPORT == AVRPORTH)
00234 #define SBBI0_RST0_SOD_REG PORTH
00235 #define SBBI0_RST0_OE_REG DDRH
00236 #endif
00237
00239 #define SBBI0_RST0_ENA() sbi(SBBI0_RST0_OE_REG, SBBI0_RST0_BIT)
00240
00241 #define SBBI0_RST0_CLR() cbi(SBBI0_RST0_SOD_REG, SBBI0_RST0_BIT)
00242
00243 #define SBBI0_RST0_SET() sbi(SBBI0_RST0_SOD_REG, SBBI0_RST0_BIT)
00244
00245 #else
00246
00247 #define SBBI0_RST0_ENA()
00248 #define SBBI0_RST0_CLR()
00249 #define SBBI0_RST0_SET()
00250
00251 #endif
00252
00253 #ifdef SBBI0_RST1_BIT
00254
00255 #if (SBBI0_RST1_AVRPORT == AVRPORTB)
00256 #define SBBI0_RST1_SOD_REG PORTB
00257 #define SBBI0_RST1_OE_REG DDRB
00258 #elif (SBBI0_RST1_AVRPORT == AVRPORTD)
00259 #define SBBI0_RST1_SOD_REG PORTD
00260 #define SBBI0_RST1_OE_REG DDRD
00261 #elif (SBBI0_RST1_AVRPORT == AVRPORTE)
00262 #define SBBI0_RST1_SOD_REG PORTE
00263 #define SBBI0_RST1_OE_REG DDRE
00264 #elif (SBBI0_RST1_AVRPORT == AVRPORTF)
00265 #define SBBI0_RST1_SOD_REG PORTF
00266 #define SBBI0_RST1_OE_REG DDRF
00267 #elif (SBBI0_RST1_AVRPORT == AVRPORTG)
00268 #define SBBI0_RST1_SOD_REG PORTG
00269 #define SBBI0_RST1_OE_REG DDRG
00270 #elif (SBBI0_RST1_AVRPORT == AVRPORTH)
00271 #define SBBI0_RST1_SOD_REG PORTH
00272 #define SBBI0_RST1_OE_REG DDRH
00273 #endif
00274
00276 #define SBBI0_RST1_ENA() sbi(SBBI0_RST1_OE_REG, SBBI0_RST1_BIT)
00277
00278 #define SBBI0_RST1_CLR() cbi(SBBI0_RST1_SOD_REG, SBBI0_RST1_BIT)
00279
00280 #define SBBI0_RST1_SET() sbi(SBBI0_RST1_SOD_REG, SBBI0_RST1_BIT)
00281
00282 #else
00283
00284 #define SBBI0_RST1_ENA()
00285 #define SBBI0_RST1_CLR()
00286 #define SBBI0_RST1_SET()
00287
00288 #endif
00289
00290 #ifdef SBBI0_RST2_BIT
00291
00292 #if (SBBI0_RST2_AVRPORT == AVRPORTB)
00293 #define SBBI0_RST2_SOD_REG PORTB
00294 #define SBBI0_RST2_OE_REG DDRB
00295 #elif (SBBI0_RST2_AVRPORT == AVRPORTD)
00296 #define SBBI0_RST2_SOD_REG PORTD
00297 #define SBBI0_RST2_OE_REG DDRD
00298 #elif (SBBI0_RST2_AVRPORT == AVRPORTE)
00299 #define SBBI0_RST2_SOD_REG PORTE
00300 #define SBBI0_RST2_OE_REG DDRE
00301 #elif (SBBI0_RST2_AVRPORT == AVRPORTF)
00302 #define SBBI0_RST2_SOD_REG PORTF
00303 #define SBBI0_RST2_OE_REG DDRF
00304 #elif (SBBI0_RST2_AVRPORT == AVRPORTG)
00305 #define SBBI0_RST2_SOD_REG PORTG
00306 #define SBBI0_RST2_OE_REG DDRG
00307 #elif (SBBI0_RST2_AVRPORT == AVRPORTH)
00308 #define SBBI0_RST2_SOD_REG PORTH
00309 #define SBBI0_RST2_OE_REG DDRH
00310 #endif
00311
00313 #define SBBI0_RST2_ENA() sbi(SBBI0_RST2_OE_REG, SBBI0_RST2_BIT)
00314
00315 #define SBBI0_RST2_CLR() cbi(SBBI0_RST2_SOD_REG, SBBI0_RST2_BIT)
00316
00317 #define SBBI0_RST2_SET() sbi(SBBI0_RST2_SOD_REG, SBBI0_RST2_BIT)
00318
00319 #else
00320
00321 #define SBBI0_RST2_ENA()
00322 #define SBBI0_RST2_CLR()
00323 #define SBBI0_RST2_SET()
00324
00325 #endif
00326
00327 #ifdef SBBI0_RST3_BIT
00328
00329 #if (SBBI0_RST3_AVRPORT == AVRPORTB)
00330 #define SBBI0_RST3_SOD_REG PORTB
00331 #define SBBI0_RST3_OE_REG DDRB
00332 #elif (SBBI0_RST3_AVRPORT == AVRPORTD)
00333 #define SBBI0_RST3_SOD_REG PORTD
00334 #define SBBI0_RST3_OE_REG DDRD
00335 #elif (SBBI0_RST3_AVRPORT == AVRPORTE)
00336 #define SBBI0_RST3_SOD_REG PORTE
00337 #define SBBI0_RST3_OE_REG DDRE
00338 #elif (SBBI0_RST3_AVRPORT == AVRPORTF)
00339 #define SBBI0_RST3_SOD_REG PORTF
00340 #define SBBI0_RST3_OE_REG DDRF
00341 #elif (SBBI0_RST3_AVRPORT == AVRPORTG)
00342 #define SBBI0_RST3_SOD_REG PORTG
00343 #define SBBI0_RST3_OE_REG DDRG
00344 #elif (SBBI0_RST3_AVRPORT == AVRPORTH)
00345 #define SBBI0_RST3_SOD_REG PORTH
00346 #define SBBI0_RST3_OE_REG DDRH
00347 #endif
00348
00350 #define SBBI0_RST3_ENA() sbi(SBBI0_RST3_OE_REG, SBBI0_RST3_BIT)
00351
00352 #define SBBI0_RST3_CLR() cbi(SBBI0_RST3_SOD_REG, SBBI0_RST3_BIT)
00353
00354 #define SBBI0_RST3_SET() sbi(SBBI0_RST3_SOD_REG, SBBI0_RST3_BIT)
00355
00356 #else
00357
00358 #define SBBI0_RST3_ENA()
00359 #define SBBI0_RST3_CLR()
00360 #define SBBI0_RST3_SET()
00361
00362 #endif
00363
00364 #ifdef SBBI0_SCK_BIT
00365
00366 #if (SBBI0_SCK_AVRPORT == AVRPORTB)
00367 #define SBBI0_SCK_SOD_REG PORTB
00368 #define SBBI0_SCK_OE_REG DDRB
00369 #elif (SBBI0_SCK_AVRPORT == AVRPORTD)
00370 #define SBBI0_SCK_SOD_REG PORTD
00371 #define SBBI0_SCK_OE_REG DDRD
00372 #elif (SBBI0_SCK_AVRPORT == AVRPORTE)
00373 #define SBBI0_SCK_SOD_REG PORTE
00374 #define SBBI0_SCK_OE_REG DDRE
00375 #elif (SBBI0_SCK_AVRPORT == AVRPORTF)
00376 #define SBBI0_SCK_SOD_REG PORTF
00377 #define SBBI0_SCK_OE_REG DDRF
00378 #elif (SBBI0_SCK_AVRPORT == AVRPORTG)
00379 #define SBBI0_SCK_SOD_REG PORTG
00380 #define SBBI0_SCK_OE_REG DDRG
00381 #elif (SBBI0_SCK_AVRPORT == AVRPORTH)
00382 #define SBBI0_SCK_SOD_REG PORTH
00383 #define SBBI0_SCK_OE_REG DDRH
00384 #endif
00385
00387 #define SBBI0_SCK_ENA() sbi(SBBI0_SCK_OE_REG, SBBI0_SCK_BIT)
00388
00389 #define SBBI0_SCK_CLR() cbi(SBBI0_SCK_SOD_REG, SBBI0_SCK_BIT)
00390
00391 #define SBBI0_SCK_SET() sbi(SBBI0_SCK_SOD_REG, SBBI0_SCK_BIT)
00392
00393 #if defined(SBBI0_MOSI_BIT)
00394
00395 #if (SBBI0_MOSI_AVRPORT == AVRPORTB)
00396 #define SBBI0_MOSI_SOD_REG PORTB
00397 #define SBBI0_MOSI_OE_REG DDRB
00398 #elif (SBBI0_MOSI_AVRPORT == AVRPORTD)
00399 #define SBBI0_MOSI_SOD_REG PORTD
00400 #define SBBI0_MOSI_OE_REG DDRD
00401 #elif (SBBI0_MOSI_AVRPORT == AVRPORTE)
00402 #define SBBI0_MOSI_SOD_REG PORTE
00403 #define SBBI0_MOSI_OE_REG DDRE
00404 #elif (SBBI0_MOSI_AVRPORT == AVRPORTF)
00405 #define SBBI0_MOSI_SOD_REG PORTF
00406 #define SBBI0_MOSI_OE_REG DDRF
00407 #elif (SBBI0_MOSI_AVRPORT == AVRPORTG)
00408 #define SBBI0_MOSI_SOD_REG PORTG
00409 #define SBBI0_MOSI_OE_REG DDRG
00410 #elif (SBBI0_MOSI_AVRPORT == AVRPORTH)
00411 #define SBBI0_MOSI_SOD_REG PORTH
00412 #define SBBI0_MOSI_OE_REG DDRH
00413 #endif
00414
00416 #define SBBI0_MOSI_ENA() sbi(SBBI0_MOSI_OE_REG, SBBI0_MOSI_BIT)
00417
00418 #define SBBI0_MOSI_CLR() cbi(SBBI0_MOSI_SOD_REG, SBBI0_MOSI_BIT)
00419
00420 #define SBBI0_MOSI_SET() sbi(SBBI0_MOSI_SOD_REG, SBBI0_MOSI_BIT)
00421
00422 #else
00423
00424 #define SBBI0_MOSI_ENA()
00425 #define SBBI0_MOSI_CLR()
00426 #define SBBI0_MOSI_SET()
00427
00428 #endif
00429
00430 #if defined(SBBI0_MISO_BIT)
00431
00432 #if (SBBI0_MISO_AVRPORT == AVRPORTB)
00433 #define SBBI0_MISO_PDS_REG PINB
00434 #define SBBI0_MISO_PUE_REG PORTB
00435 #define SBBI0_MISO_OE_REG DDRB
00436 #elif (SBBI0_MISO_AVRPORT == AVRPORTD)
00437 #define SBBI0_MISO_PDS_REG PIND
00438 #define SBBI0_MISO_PUE_REG PORTD
00439 #define SBBI0_MISO_OE_REG DDRD
00440 #elif (SBBI0_MISO_AVRPORT == AVRPORTE)
00441 #define SBBI0_MISO_PDS_REG PINE
00442 #define SBBI0_MISO_PUE_REG PORTE
00443 #define SBBI0_MISO_OE_REG DDRE
00444 #elif (SBBI0_MISO_AVRPORT == AVRPORTF)
00445 #define SBBI0_MISO_PDS_REG PINF
00446 #define SBBI0_MISO_PUE_REG PORTF
00447 #define SBBI0_MISO_OE_REG DDRF
00448 #elif (SBBI0_MISO_AVRPORT == AVRPORTG)
00449 #define SBBI0_MISO_PDS_REG PING
00450 #define SBBI0_MISO_PUE_REG PORTG
00451 #define SBBI0_MISO_OE_REG DDRG
00452 #elif (SBBI0_MISO_AVRPORT == AVRPORTH)
00453 #define SBBI0_MISO_PDS_REG PINH
00454 #define SBBI0_MISO_PUE_REG PORTH
00455 #define SBBI0_MISO_OE_REG DDRH
00456 #endif
00457
00459 #define SBBI0_MISO_ENA() \
00460 cbi(SBBI0_MISO_OE_REG, SBBI0_MISO_BIT); \
00461 sbi(SBBI0_MISO_PUE_REG, SBBI0_MISO_BIT)
00462
00463 #define SBBI0_MISO_TST() ((inb(SBBI0_MISO_PDS_REG) & _BV(SBBI0_MISO_BIT)) == _BV(SBBI0_MISO_BIT))
00464
00465 #else
00466
00467 #define SBBI0_MISO_ENA()
00468 #define SBBI0_MISO_TST() 0
00469
00470 #endif
00471
00472 #else
00473
00474 #define SBBI0_SCK_ENA()
00475 #define SBBI0_SCK_CLR()
00476 #define SBBI0_SCK_SET()
00477
00478 #define SBBI0_MOSI_ENA()
00479 #define SBBI0_MOSI_CLR()
00480 #define SBBI0_MOSI_SET()
00481
00482 #define SBBI0_MISO_ENA()
00483 #define SBBI0_MISO_TST() 0
00484
00485 #endif
00486
00487 #else
00488
00489
00490
00491
00492
00493 #ifdef SBBI0_CS0_BIT
00494
00495 #if !defined(SBBI0_CS0_PIO_ID)
00496 #define SBBI0_CS0_PE_REG PIO_PER
00497 #define SBBI0_CS0_OE_REG PIO_OER
00498 #define SBBI0_CS0_COD_REG PIO_CODR
00499 #define SBBI0_CS0_SOD_REG PIO_SODR
00500 #elif SBBI0_CS0_PIO_ID == PIO_ID
00501 #define SBBI0_CS0_PE_REG PIO_PER
00502 #define SBBI0_CS0_OE_REG PIO_OER
00503 #define SBBI0_CS0_COD_REG PIO_CODR
00504 #define SBBI0_CS0_SOD_REG PIO_SODR
00505 #elif SBBI0_CS0_PIO_ID == PIOA_ID
00506 #define SBBI0_CS0_PE_REG PIOA_PER
00507 #define SBBI0_CS0_OE_REG PIOA_OER
00508 #define SBBI0_CS0_COD_REG PIOA_CODR
00509 #define SBBI0_CS0_SOD_REG PIOA_SODR
00510 #elif SBBI0_CS0_PIO_ID == PIOB_ID
00511 #define SBBI0_CS0_PE_REG PIOB_PER
00512 #define SBBI0_CS0_OE_REG PIOB_OER
00513 #define SBBI0_CS0_COD_REG PIOB_CODR
00514 #define SBBI0_CS0_SOD_REG PIOB_SODR
00515 #elif SBBI0_CS0_PIO_ID == PIOC_ID
00516 #define SBBI0_CS0_PE_REG PIOC_PER
00517 #define SBBI0_CS0_OE_REG PIOC_OER
00518 #define SBBI0_CS0_COD_REG PIOC_CODR
00519 #define SBBI0_CS0_SOD_REG PIOC_SODR
00520 #endif
00521
00523 #define SBBI0_CS0_ENA() \
00524 outr(SBBI0_CS0_PE_REG, _BV(SBBI0_CS0_BIT)); \
00525 outr(SBBI0_CS0_OE_REG, _BV(SBBI0_CS0_BIT))
00526
00527 #define SBBI0_CS0_CLR() outr(SBBI0_CS0_COD_REG, _BV(SBBI0_CS0_BIT))
00528
00529 #define SBBI0_CS0_SET() outr(SBBI0_CS0_SOD_REG, _BV(SBBI0_CS0_BIT))
00530
00531 #else
00532
00533 #define SBBI0_CS0_ENA()
00534 #define SBBI0_CS0_CLR()
00535 #define SBBI0_CS0_SET()
00536
00537 #endif
00538
00539 #ifdef SBBI0_CS1_BIT
00540
00541 #if !defined(SBBI0_CS1_PIO_ID)
00542 #define SBBI0_CS1_PE_REG PIO_PER
00543 #define SBBI0_CS1_OE_REG PIO_OER
00544 #define SBBI0_CS1_COD_REG PIO_CODR
00545 #define SBBI0_CS1_SOD_REG PIO_SODR
00546 #elif SBBI0_CS1_PIO_ID == PIO_ID
00547 #define SBBI0_CS1_PE_REG PIO_PER
00548 #define SBBI0_CS1_OE_REG PIO_OER
00549 #define SBBI0_CS1_COD_REG PIO_CODR
00550 #define SBBI0_CS1_SOD_REG PIO_SODR
00551 #elif SBBI0_CS1_PIO_ID == PIOA_ID
00552 #define SBBI0_CS1_PE_REG PIOA_PER
00553 #define SBBI0_CS1_OE_REG PIOA_OER
00554 #define SBBI0_CS1_COD_REG PIOA_CODR
00555 #define SBBI0_CS1_SOD_REG PIOA_SODR
00556 #elif SBBI0_CS1_PIO_ID == PIOB_ID
00557 #define SBBI0_CS1_PE_REG PIOB_PER
00558 #define SBBI0_CS1_OE_REG PIOB_OER
00559 #define SBBI0_CS1_COD_REG PIOB_CODR
00560 #define SBBI0_CS1_SOD_REG PIOB_SODR
00561 #elif SBBI0_CS1_PIO_ID == PIOC_ID
00562 #define SBBI0_CS1_PE_REG PIOC_PER
00563 #define SBBI0_CS1_OE_REG PIOC_OER
00564 #define SBBI0_CS1_COD_REG PIOC_CODR
00565 #define SBBI0_CS1_SOD_REG PIOC_SODR
00566 #endif
00567
00569 #define SBBI0_CS1_ENA() \
00570 outr(SBBI0_CS1_PE_REG, _BV(SBBI0_CS1_BIT)); \
00571 outr(SBBI0_CS1_OE_REG, _BV(SBBI0_CS1_BIT))
00572
00573 #define SBBI0_CS1_CLR() outr(SBBI0_CS1_COD_REG, _BV(SBBI0_CS1_BIT))
00574
00575 #define SBBI0_CS1_SET() outr(SBBI0_CS1_SOD_REG, _BV(SBBI0_CS1_BIT))
00576
00577 #else
00578
00579 #define SBBI0_CS1_ENA()
00580 #define SBBI0_CS1_CLR()
00581 #define SBBI0_CS1_SET()
00582
00583 #endif
00584
00585 #ifdef SBBI0_CS2_BIT
00586
00587 #if !defined(SBBI0_CS2_PIO_ID)
00588 #define SBBI0_CS2_PE_REG PIO_PER
00589 #define SBBI0_CS2_OE_REG PIO_OER
00590 #define SBBI0_CS2_COD_REG PIO_CODR
00591 #define SBBI0_CS2_SOD_REG PIO_SODR
00592 #elif SBBI0_CS2_PIO_ID == PIO_ID
00593 #define SBBI0_CS2_PE_REG PIO_PER
00594 #define SBBI0_CS2_OE_REG PIO_OER
00595 #define SBBI0_CS2_COD_REG PIO_CODR
00596 #define SBBI0_CS2_SOD_REG PIO_SODR
00597 #elif SBBI0_CS2_PIO_ID == PIOA_ID
00598 #define SBBI0_CS2_PE_REG PIOA_PER
00599 #define SBBI0_CS2_OE_REG PIOA_OER
00600 #define SBBI0_CS2_COD_REG PIOA_CODR
00601 #define SBBI0_CS2_SOD_REG PIOA_SODR
00602 #elif SBBI0_CS2_PIO_ID == PIOB_ID
00603 #define SBBI0_CS2_PE_REG PIOB_PER
00604 #define SBBI0_CS2_OE_REG PIOB_OER
00605 #define SBBI0_CS2_COD_REG PIOB_CODR
00606 #define SBBI0_CS2_SOD_REG PIOB_SODR
00607 #elif SBBI0_CS2_PIO_ID == PIOC_ID
00608 #define SBBI0_CS2_PE_REG PIOC_PER
00609 #define SBBI0_CS2_OE_REG PIOC_OER
00610 #define SBBI0_CS2_COD_REG PIOC_CODR
00611 #define SBBI0_CS2_SOD_REG PIOC_SODR
00612 #endif
00613
00615 #define SBBI0_CS2_ENA() \
00616 outr(SBBI0_CS2_PE_REG, _BV(SBBI0_CS2_BIT)); \
00617 outr(SBBI0_CS2_OE_REG, _BV(SBBI0_CS2_BIT))
00618
00619 #define SBBI0_CS2_CLR() outr(SBBI0_CS2_COD_REG, _BV(SBBI0_CS2_BIT))
00620
00621 #define SBBI0_CS2_SET() outr(SBBI0_CS2_SOD_REG, _BV(SBBI0_CS2_BIT))
00622
00623 #else
00624
00625 #define SBBI0_CS2_ENA()
00626 #define SBBI0_CS2_CLR()
00627 #define SBBI0_CS2_SET()
00628
00629 #endif
00630
00631 #ifdef SBBI0_CS3_BIT
00632
00633 #if !defined(SBBI0_CS3_PIO_ID)
00634 #define SBBI0_CS3_PE_REG PIO_PER
00635 #define SBBI0_CS3_OE_REG PIO_OER
00636 #define SBBI0_CS3_COD_REG PIO_CODR
00637 #define SBBI0_CS3_SOD_REG PIO_SODR
00638 #elif SBBI0_CS3_PIO_ID == PIO_ID
00639 #define SBBI0_CS3_PE_REG PIO_PER
00640 #define SBBI0_CS3_OE_REG PIO_OER
00641 #define SBBI0_CS3_COD_REG PIO_CODR
00642 #define SBBI0_CS3_SOD_REG PIO_SODR
00643 #elif SBBI0_CS3_PIO_ID == PIOA_ID
00644 #define SBBI0_CS3_PE_REG PIOA_PER
00645 #define SBBI0_CS3_OE_REG PIOA_OER
00646 #define SBBI0_CS3_COD_REG PIOA_CODR
00647 #define SBBI0_CS3_SOD_REG PIOA_SODR
00648 #elif SBBI0_CS3_PIO_ID == PIOB_ID
00649 #define SBBI0_CS3_PE_REG PIOB_PER
00650 #define SBBI0_CS3_OE_REG PIOB_OER
00651 #define SBBI0_CS3_COD_REG PIOB_CODR
00652 #define SBBI0_CS3_SOD_REG PIOB_SODR
00653 #elif SBBI0_CS3_PIO_ID == PIOC_ID
00654 #define SBBI0_CS3_PE_REG PIOC_PER
00655 #define SBBI0_CS3_OE_REG PIOC_OER
00656 #define SBBI0_CS3_COD_REG PIOC_CODR
00657 #define SBBI0_CS3_SOD_REG PIOC_SODR
00658 #endif
00659
00661 #define SBBI0_CS3_ENA() \
00662 outr(SBBI0_CS3_PE_REG, _BV(SBBI0_CS3_BIT)); \
00663 outr(SBBI0_CS3_OE_REG, _BV(SBBI0_CS3_BIT))
00664
00665 #define SBBI0_CS3_CLR() outr(SBBI0_CS3_COD_REG, _BV(SBBI0_CS3_BIT))
00666
00667 #define SBBI0_CS3_SET() outr(SBBI0_CS3_SOD_REG, _BV(SBBI0_CS3_BIT))
00668
00669 #else
00670
00671 #define SBBI0_CS3_ENA()
00672 #define SBBI0_CS3_CLR()
00673 #define SBBI0_CS3_SET()
00674
00675 #endif
00676
00677 #ifdef SBBI0_RST0_BIT
00678
00679 #if !defined(SBBI0_RST0_PIO_ID)
00680 #define SBBI0_RST0_PE_REG PIO_PER
00681 #define SBBI0_RST0_OE_REG PIO_OER
00682 #define SBBI0_RST0_COD_REG PIO_CODR
00683 #define SBBI0_RST0_SOD_REG PIO_SODR
00684 #elif SBBI0_RST0_PIO_ID == PIO_ID
00685 #define SBBI0_RST0_PE_REG PIO_PER
00686 #define SBBI0_RST0_OE_REG PIO_OER
00687 #define SBBI0_RST0_COD_REG PIO_CODR
00688 #define SBBI0_RST0_SOD_REG PIO_SODR
00689 #elif SBBI0_RST0_PIO_ID == PIOA_ID
00690 #define SBBI0_RST0_PE_REG PIOA_PER
00691 #define SBBI0_RST0_OE_REG PIOA_OER
00692 #define SBBI0_RST0_COD_REG PIOA_CODR
00693 #define SBBI0_RST0_SOD_REG PIOA_SODR
00694 #elif SBBI0_RST0_PIO_ID == PIOB_ID
00695 #define SBBI0_RST0_PE_REG PIOB_PER
00696 #define SBBI0_RST0_OE_REG PIOB_OER
00697 #define SBBI0_RST0_COD_REG PIOB_CODR
00698 #define SBBI0_RST0_SOD_REG PIOB_SODR
00699 #elif SBBI0_RST0_PIO_ID == PIOC_ID
00700 #define SBBI0_RST0_PE_REG PIOC_PER
00701 #define SBBI0_RST0_OE_REG PIOC_OER
00702 #define SBBI0_RST0_COD_REG PIOC_CODR
00703 #define SBBI0_RST0_SOD_REG PIOC_SODR
00704 #endif
00705
00707 #define SBBI0_RST0_ENA() \
00708 outr(SBBI0_RST0_PE_REG, _BV(SBBI0_RST0_BIT)); \
00709 outr(SBBI0_RST0_OE_REG, _BV(SBBI0_RST0_BIT))
00710
00711 #define SBBI0_RST0_CLR() outr(SBBI0_RST0_COD_REG, _BV(SBBI0_RST0_BIT))
00712
00713 #define SBBI0_RST0_SET() outr(SBBI0_RST0_SOD_REG, _BV(SBBI0_RST0_BIT))
00714
00715 #else
00716
00717 #define SBBI0_RST0_ENA()
00718 #define SBBI0_RST0_CLR()
00719 #define SBBI0_RST0_SET()
00720
00721 #endif
00722
00723 #ifdef SBBI0_RST1_BIT
00724
00725 #if !defined(SBBI0_RST1_PIO_ID)
00726 #define SBBI0_RST1_PE_REG PIO_PER
00727 #define SBBI0_RST1_OE_REG PIO_OER
00728 #define SBBI0_RST1_COD_REG PIO_CODR
00729 #define SBBI0_RST1_SOD_REG PIO_SODR
00730 #elif SBBI0_RST1_PIO_ID == PIO_ID
00731 #define SBBI0_RST1_PE_REG PIO_PER
00732 #define SBBI0_RST1_OE_REG PIO_OER
00733 #define SBBI0_RST1_COD_REG PIO_CODR
00734 #define SBBI0_RST1_SOD_REG PIO_SODR
00735 #elif SBBI0_RST1_PIO_ID == PIOA_ID
00736 #define SBBI0_RST1_PE_REG PIOA_PER
00737 #define SBBI0_RST1_OE_REG PIOA_OER
00738 #define SBBI0_RST1_COD_REG PIOA_CODR
00739 #define SBBI0_RST1_SOD_REG PIOA_SODR
00740 #elif SBBI0_RST1_PIO_ID == PIOB_ID
00741 #define SBBI0_RST1_PE_REG PIOB_PER
00742 #define SBBI0_RST1_OE_REG PIOB_OER
00743 #define SBBI0_RST1_COD_REG PIOB_CODR
00744 #define SBBI0_RST1_SOD_REG PIOB_SODR
00745 #elif SBBI0_RST1_PIO_ID == PIOC_ID
00746 #define SBBI0_RST1_PE_REG PIOC_PER
00747 #define SBBI0_RST1_OE_REG PIOC_OER
00748 #define SBBI0_RST1_COD_REG PIOC_CODR
00749 #define SBBI0_RST1_SOD_REG PIOC_SODR
00750 #endif
00751
00753 #define SBBI0_RST1_ENA() \
00754 outr(SBBI0_RST1_PE_REG, _BV(SBBI0_RST1_BIT)); \
00755 outr(SBBI0_RST1_OE_REG, _BV(SBBI0_RST1_BIT))
00756
00757 #define SBBI0_RST1_CLR() outr(SBBI0_RST1_COD_REG, _BV(SBBI0_RST1_BIT))
00758
00759 #define SBBI0_RST1_SET() outr(SBBI0_RST1_SOD_REG, _BV(SBBI0_RST1_BIT))
00760
00761 #else
00762
00763 #define SBBI0_RST1_ENA()
00764 #define SBBI0_RST1_CLR()
00765 #define SBBI0_RST1_SET()
00766
00767 #endif
00768
00769 #ifdef SBBI0_RST2_BIT
00770
00771 #if !defined(SBBI0_RST2_PIO_ID)
00772 #define SBBI0_RST2_PE_REG PIO_PER
00773 #define SBBI0_RST2_OE_REG PIO_OER
00774 #define SBBI0_RST2_COD_REG PIO_CODR
00775 #define SBBI0_RST2_SOD_REG PIO_SODR
00776 #elif SBBI0_RST2_PIO_ID == PIO_ID
00777 #define SBBI0_RST2_PE_REG PIO_PER
00778 #define SBBI0_RST2_OE_REG PIO_OER
00779 #define SBBI0_RST2_COD_REG PIO_CODR
00780 #define SBBI0_RST2_SOD_REG PIO_SODR
00781 #elif SBBI0_RST2_PIO_ID == PIOA_ID
00782 #define SBBI0_RST2_PE_REG PIOA_PER
00783 #define SBBI0_RST2_OE_REG PIOA_OER
00784 #define SBBI0_RST2_COD_REG PIOA_CODR
00785 #define SBBI0_RST2_SOD_REG PIOA_SODR
00786 #elif SBBI0_RST2_PIO_ID == PIOB_ID
00787 #define SBBI0_RST2_PE_REG PIOB_PER
00788 #define SBBI0_RST2_OE_REG PIOB_OER
00789 #define SBBI0_RST2_COD_REG PIOB_CODR
00790 #define SBBI0_RST2_SOD_REG PIOB_SODR
00791 #elif SBBI0_RST2_PIO_ID == PIOC_ID
00792 #define SBBI0_RST2_PE_REG PIOC_PER
00793 #define SBBI0_RST2_OE_REG PIOC_OER
00794 #define SBBI0_RST2_COD_REG PIOC_CODR
00795 #define SBBI0_RST2_SOD_REG PIOC_SODR
00796 #endif
00797
00799 #define SBBI0_RST2_ENA() \
00800 outr(SBBI0_RST2_PE_REG, _BV(SBBI0_RST2_BIT)); \
00801 outr(SBBI0_RST2_OE_REG, _BV(SBBI0_RST2_BIT))
00802
00803 #define SBBI0_RST2_CLR() outr(SBBI0_RST2_COD_REG, _BV(SBBI0_RST2_BIT))
00804
00805 #define SBBI0_RST2_SET() outr(SBBI0_RST2_SOD_REG, _BV(SBBI0_RST2_BIT))
00806
00807 #else
00808
00809 #define SBBI0_RST2_ENA()
00810 #define SBBI0_RST2_CLR()
00811 #define SBBI0_RST2_SET()
00812
00813 #endif
00814
00815 #ifdef SBBI0_RST3_BIT
00816
00817 #if !defined(SBBI0_RST3_PIO_ID)
00818 #define SBBI0_RST3_PE_REG PIO_PER
00819 #define SBBI0_RST3_OE_REG PIO_OER
00820 #define SBBI0_RST3_COD_REG PIO_CODR
00821 #define SBBI0_RST3_SOD_REG PIO_SODR
00822 #elif SBBI0_RST3_PIO_ID == PIO_ID
00823 #define SBBI0_RST3_PE_REG PIO_PER
00824 #define SBBI0_RST3_OE_REG PIO_OER
00825 #define SBBI0_RST3_COD_REG PIO_CODR
00826 #define SBBI0_RST3_SOD_REG PIO_SODR
00827 #elif SBBI0_RST3_PIO_ID == PIOA_ID
00828 #define SBBI0_RST3_PE_REG PIOA_PER
00829 #define SBBI0_RST3_OE_REG PIOA_OER
00830 #define SBBI0_RST3_COD_REG PIOA_CODR
00831 #define SBBI0_RST3_SOD_REG PIOA_SODR
00832 #elif SBBI0_RST3_PIO_ID == PIOB_ID
00833 #define SBBI0_RST3_PE_REG PIOB_PER
00834 #define SBBI0_RST3_OE_REG PIOB_OER
00835 #define SBBI0_RST3_COD_REG PIOB_CODR
00836 #define SBBI0_RST3_SOD_REG PIOB_SODR
00837 #elif SBBI0_RST3_PIO_ID == PIOC_ID
00838 #define SBBI0_RST3_PE_REG PIOC_PER
00839 #define SBBI0_RST3_OE_REG PIOC_OER
00840 #define SBBI0_RST3_COD_REG PIOC_CODR
00841 #define SBBI0_RST3_SOD_REG PIOC_SODR
00842 #endif
00843
00845 #define SBBI0_RST3_ENA() \
00846 outr(SBBI0_RST3_PE_REG, _BV(SBBI0_RST3_BIT)); \
00847 outr(SBBI0_RST3_OE_REG, _BV(SBBI0_RST3_BIT))
00848
00849 #define SBBI0_RST3_CLR() outr(SBBI0_RST3_COD_REG, _BV(SBBI0_RST3_BIT))
00850
00851 #define SBBI0_RST3_SET() outr(SBBI0_RST3_SOD_REG, _BV(SBBI0_RST3_BIT))
00852
00853 #else
00854
00855 #define SBBI0_RST3_ENA()
00856 #define SBBI0_RST3_CLR()
00857 #define SBBI0_RST3_SET()
00858
00859 #endif
00860
00861 #ifdef SBBI0_SCK_BIT
00862
00863 #if !defined(SBBI0_SCK_PIO_ID)
00864 #define SBBI0_SCK_PE_REG PIO_PER
00865 #define SBBI0_SCK_OE_REG PIO_OER
00866 #define SBBI0_SCK_COD_REG PIO_CODR
00867 #define SBBI0_SCK_SOD_REG PIO_SODR
00868 #elif SBBI0_SCK_PIO_ID == PIO_ID
00869 #define SBBI0_SCK_PE_REG PIO_PER
00870 #define SBBI0_SCK_OE_REG PIO_OER
00871 #define SBBI0_SCK_COD_REG PIO_CODR
00872 #define SBBI0_SCK_SOD_REG PIO_SODR
00873 #elif SBBI0_SCK_PIO_ID == PIOA_ID
00874 #define SBBI0_SCK_PE_REG PIOA_PER
00875 #define SBBI0_SCK_OE_REG PIOA_OER
00876 #define SBBI0_SCK_COD_REG PIOA_CODR
00877 #define SBBI0_SCK_SOD_REG PIOA_SODR
00878 #elif SBBI0_SCK_PIO_ID == PIOB_ID
00879 #define SBBI0_SCK_PE_REG PIOB_PER
00880 #define SBBI0_SCK_OE_REG PIOB_OER
00881 #define SBBI0_SCK_COD_REG PIOB_CODR
00882 #define SBBI0_SCK_SOD_REG PIOB_SODR
00883 #elif SBBI0_SCK_PIO_ID == PIOC_ID
00884 #define SBBI0_SCK_PE_REG PIOC_PER
00885 #define SBBI0_SCK_OE_REG PIOC_OER
00886 #define SBBI0_SCK_COD_REG PIOC_CODR
00887 #define SBBI0_SCK_SOD_REG PIOC_SODR
00888 #endif
00889
00891 #define SBBI0_SCK_ENA() \
00892 outr(SBBI0_SCK_PE_REG, _BV(SBBI0_SCK_BIT)); \
00893 outr(SBBI0_SCK_OE_REG, _BV(SBBI0_SCK_BIT))
00894
00895 #define SBBI0_SCK_CLR() outr(SBBI0_SCK_COD_REG, _BV(SBBI0_SCK_BIT))
00896
00897 #define SBBI0_SCK_SET() outr(SBBI0_SCK_SOD_REG, _BV(SBBI0_SCK_BIT))
00898
00899 #ifdef SBBI0_MOSI_BIT
00900
00901 #if !defined(SBBI0_MOSI_PIO_ID)
00902 #define SBBI0_MOSI_PE_REG PIO_PER
00903 #define SBBI0_MOSI_OE_REG PIO_OER
00904 #define SBBI0_MOSI_COD_REG PIO_CODR
00905 #define SBBI0_MOSI_SOD_REG PIO_SODR
00906 #elif SBBI0_MOSI_PIO_ID == PIO_ID
00907 #define SBBI0_MOSI_PE_REG PIO_PER
00908 #define SBBI0_MOSI_OE_REG PIO_OER
00909 #define SBBI0_MOSI_COD_REG PIO_CODR
00910 #define SBBI0_MOSI_SOD_REG PIO_SODR
00911 #elif SBBI0_MOSI_PIO_ID == PIOA_ID
00912 #define SBBI0_MOSI_PE_REG PIOA_PER
00913 #define SBBI0_MOSI_OE_REG PIOA_OER
00914 #define SBBI0_MOSI_COD_REG PIOA_CODR
00915 #define SBBI0_MOSI_SOD_REG PIOA_SODR
00916 #elif SBBI0_MOSI_PIO_ID == PIOB_ID
00917 #define SBBI0_MOSI_PE_REG PIOB_PER
00918 #define SBBI0_MOSI_OE_REG PIOB_OER
00919 #define SBBI0_MOSI_COD_REG PIOB_CODR
00920 #define SBBI0_MOSI_SOD_REG PIOB_SODR
00921 #elif SBBI0_MOSI_PIO_ID == PIOC_ID
00922 #define SBBI0_MOSI_PE_REG PIOC_PER
00923 #define SBBI0_MOSI_OE_REG PIOC_OER
00924 #define SBBI0_MOSI_COD_REG PIOC_CODR
00925 #define SBBI0_MOSI_SOD_REG PIOC_SODR
00926 #endif
00927
00929 #define SBBI0_MOSI_ENA() \
00930 outr(SBBI0_MOSI_PE_REG, _BV(SBBI0_MOSI_BIT)); \
00931 outr(SBBI0_MOSI_OE_REG, _BV(SBBI0_MOSI_BIT))
00932
00933 #define SBBI0_MOSI_CLR() outr(SBBI0_MOSI_COD_REG, _BV(SBBI0_MOSI_BIT))
00934
00935 #define SBBI0_MOSI_SET() outr(SBBI0_MOSI_SOD_REG, _BV(SBBI0_MOSI_BIT))
00936
00937 #else
00938
00939 #define SBBI0_MOSI_ENA()
00940 #define SBBI0_MOSI_CLR()
00941 #define SBBI0_MOSI_SET()
00942
00943 #endif
00944
00945 #ifdef SBBI0_MISO_BIT
00946
00947 #if !defined(SBBI0_MISO_PIO_ID)
00948 #define SBBI0_MISO_PE_REG PIO_PER
00949 #define SBBI0_MISO_OD_REG PIO_ODR
00950 #define SBBI0_MISO_PDS_REG PIO_PDSR
00951 #elif SBBI0_MISO_PIO_ID == PIO_ID
00952 #define SBBI0_MISO_PE_REG PIO_PER
00953 #define SBBI0_MISO_OD_REG PIO_ODR
00954 #define SBBI0_MISO_PDS_REG PIO_PDSR
00955 #elif SBBI0_MISO_PIO_ID == PIOA_ID
00956 #define SBBI0_MISO_PE_REG PIOA_PER
00957 #define SBBI0_MISO_OD_REG PIOA_ODR
00958 #define SBBI0_MISO_PDS_REG PIOA_PDSR
00959 #elif SBBI0_MISO_PIO_ID == PIOB_ID
00960 #define SBBI0_MISO_PE_REG PIOB_PER
00961 #define SBBI0_MISO_OD_REG PIOB_ODR
00962 #define SBBI0_MISO_PDS_REG PIOB_PDSR
00963 #elif SBBI0_MISO_PIO_ID == PIOC_ID
00964 #define SBBI0_MISO_PE_REG PIOC_PER
00965 #define SBBI0_MISO_OD_REG PIOC_ODR
00966 #define SBBI0_MISO_PDS_REG PIOC_PDSR
00967 #endif
00968
00970 #define SBBI0_MISO_ENA() \
00971 outr(SBBI0_MISO_PE_REG, _BV(SBBI0_MISO_BIT)); \
00972 outr(SBBI0_MISO_OD_REG, _BV(SBBI0_MISO_BIT))
00973
00974 #define SBBI0_MISO_TST() ((inr(SBBI0_MISO_PDS_REG) & _BV(SBBI0_MISO_BIT)) == _BV(SBBI0_MISO_BIT))
00975
00976 #else
00977
00978 #define SBBI0_MISO_ENA()
00979 #define SBBI0_MISO_TST() 0
00980
00981 #endif
00982
00983 #else
00984
00985 #define SBBI0_SCK_ENA()
00986 #define SBBI0_SCK_CLR()
00987 #define SBBI0_SCK_SET()
00988
00989 #define SBBI0_MOSI_ENA()
00990 #define SBBI0_MOSI_CLR()
00991 #define SBBI0_MOSI_SET()
00992
00993 #define SBBI0_MISO_ENA()
00994 #define SBBI0_MISO_TST() 0
00995
00996 #endif
00997
00998 #endif
00999
01000 #define SBBI0_INIT() \
01001 { \
01002 SBBI0_SCK_CLR(); \
01003 SBBI0_SCK_ENA(); \
01004 SBBI0_MOSI_CLR(); \
01005 SBBI0_MOSI_ENA(); \
01006 SBBI0_MISO_ENA(); \
01007 }
01008
01009 __BEGIN_DECLS
01010
01011
01012 extern int Sbbi0SetMode(ureg_t ix, ureg_t mode);
01013 extern void Sbbi0SetSpeed(ureg_t ix, uint32_t rate);
01014 extern void Sbbi0Enable(ureg_t ix);
01015 extern void Sbbi0ChipReset(ureg_t ix, ureg_t hi);
01016 extern void Sbbi0ChipSelect(ureg_t ix, ureg_t hi);
01017 extern void Sbbi0SelectDevice(ureg_t ix);
01018 extern void Sbbi0DeselectDevice(ureg_t ix);
01019 extern void Sbbi0NegSelectDevice(ureg_t ix);
01020 extern void Sbbi0NegDeselectDevice(ureg_t ix);
01021 extern uint8_t Sbbi0Byte(uint8_t data);
01022 extern void Sbbi0Transact(CONST void *wdata, void *rdata, size_t len);
01023
01024 __END_DECLS
01025
01026
01027 #endif