ih_at91fiq.c

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00001 /*
00002  * Copyright (C) 2005 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  *
00032  */
00033 
00034 /*
00035  * $Log: ih_at91fiq.c,v $
00036  * Revision 1.5  2008/08/11 06:59:09  haraldkipp
00037  * BSD types replaced by stdint types (feature request #1282721).
00038  *
00039  * Revision 1.4  2008/07/26 09:43:01  haraldkipp
00040  * Added support for retrieving and setting the interrupt mode.
00041  *
00042  * Revision 1.3  2006/06/28 17:10:15  haraldkipp
00043  * Include more general header file for ARM.
00044  *
00045  * Revision 1.2  2006/04/07 12:19:51  haraldkipp
00046  * Fast interrupts are now enabled correctly.
00047  * Mode set/get ioctl added and priority set/get removed.
00048  * Interrupt entry will no longer push R8-R12 on stack.
00049  *
00050  * Revision 1.1  2005/10/24 08:56:09  haraldkipp
00051  * First check in.
00052  *
00053  */
00054 
00055 #include <arch/arm.h>
00056 #include <dev/irqreg.h>
00057 
00058 #ifndef NUT_IRQPRI_FIQ
00059 #define NUT_IRQPRI_FIQ  4
00060 #endif
00061 
00062 static int FastIrqCtl(int cmd, void *param);
00063 
00064 IRQ_HANDLER sig_FIQ = {
00065 #ifdef NUT_PERFMON
00066     0,              /* Interrupt counter, ir_count. */
00067 #endif
00068     NULL,           /* Passed argument, ir_arg. */
00069     NULL,           /* Handler subroutine, ir_handler. */
00070     FastIrqCtl      /* Interrupt control, ir_ctl. */
00071 };
00072 
00078 static void FastIrqEntry(void) __attribute__ ((naked));
00079 void FastIrqEntry(void)
00080 {
00081     FIQ_ENTRY();
00082 #ifdef NUT_PERFMON
00083     sig_FIQ.ir_count++;
00084 #endif
00085     if (sig_FIQ.ir_handler) {
00086         (sig_FIQ.ir_handler) (sig_FIQ.ir_arg);
00087     }
00088     FIQ_EXIT();
00089 }
00090 
00106 static int FastIrqCtl(int cmd, void *param)
00107 {
00108     int rc = 0;
00109     unsigned int *ival = (unsigned int *)param;
00110     int_fast8_t enabled = inr(AIC_IMR) & _BV(FIQ_ID);
00111 
00112     /* Disable interrupt. */
00113     if (enabled) {
00114         outr(AIC_IDCR, _BV(FIQ_ID));
00115     }
00116 
00117     switch(cmd) {
00118     case NUT_IRQCTL_INIT:
00119         /* Set the vector. */
00120         outr(AIC_SVR(FIQ_ID), (unsigned int)FastIrqEntry);
00121         /* Initialize to edge triggered with defined priority. */
00122         outr(AIC_SMR(FIQ_ID), AIC_SRCTYPE_EXT_NEGATIVE_EDGE | NUT_IRQPRI_FIQ);
00123         /* Clear interrupt */
00124         outr(AIC_ICCR, _BV(FIQ_ID));
00125         break;
00126     case NUT_IRQCTL_STATUS:
00127         if (enabled) {
00128             *ival |= 1;
00129         }
00130         else {
00131             *ival &= ~1;
00132         }
00133         break;
00134     case NUT_IRQCTL_ENABLE:
00135         enabled = 1;
00136         break;
00137     case NUT_IRQCTL_DISABLE:
00138         enabled = 0;
00139         break;
00140     case NUT_IRQCTL_GETMODE:
00141         {
00142             unsigned int val = inr(AIC_SMR(FIQ_ID)) & AIC_SRCTYPE;
00143             if (val == AIC_SRCTYPE_EXT_LOW_LEVEL) {
00144                 *ival = NUT_IRQMODE_LOWLEVEL;
00145             } else if (val == AIC_SRCTYPE_EXT_HIGH_LEVEL) {
00146                 *ival = NUT_IRQMODE_HIGHLEVEL;
00147             } else if (val == AIC_SRCTYPE_EXT_POSITIVE_EDGE) {
00148                 *ival = NUT_IRQMODE_RISINGEDGE;
00149             } else  {
00150                 *ival = NUT_IRQMODE_FALLINGEDGE;
00151             }
00152         }
00153         break;
00154     case NUT_IRQCTL_SETMODE:
00155         if (*ival == NUT_IRQMODE_LOWLEVEL) {
00156             outr(AIC_SMR(FIQ_ID), (inr(AIC_SMR(FIQ_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_LOW_LEVEL);
00157         } else if (*ival == NUT_IRQMODE_HIGHLEVEL) {
00158             outr(AIC_SMR(FIQ_ID), (inr(AIC_SMR(FIQ_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_HIGH_LEVEL);
00159         } else if (*ival == NUT_IRQMODE_FALLINGEDGE) {
00160             outr(AIC_SMR(FIQ_ID), (inr(AIC_SMR(FIQ_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_NEGATIVE_EDGE);
00161         } else  if (*ival == NUT_IRQMODE_RISINGEDGE) {
00162             outr(AIC_SMR(FIQ_ID), (inr(AIC_SMR(FIQ_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_POSITIVE_EDGE);
00163         } else  {
00164             rc = -1;
00165         }
00166         break;
00167 #ifdef NUT_PERFMON
00168     case NUT_IRQCTL_GETCOUNT:
00169         *ival = (unsigned int)sig_FIQ.ir_count;
00170         sig_FIQ.ir_count = 0;
00171         break;
00172 #endif
00173     default:
00174         rc = -1;
00175         break;
00176     }
00177 
00178     /* Enable interrupt. */
00179     if (enabled) {
00180         outr(AIC_IECR, _BV(FIQ_ID));
00181     }
00182     return rc;
00183 }

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