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00057 #include <arch/arm.h>
00058 #include <dev/irqreg.h>
00059
00060 #include <sys/event.h>
00061 #include <sys/atom.h>
00062 #include <sys/timer.h>
00063 #include <sys/thread.h>
00064 #include <sys/heap.h>
00065
00066 #include <dev/twif.h>
00067
00072
00073 HANDLE tw_mm_mutex;
00074 HANDLE tw_mm_que;
00075
00076 static uint8_t tw_mm_sla;
00077 static volatile uint8_t tw_mm_err;
00078 static uint8_t tw_mm_error;
00079
00080 static CONST uint8_t *tw_mt_buf;
00081 static volatile uint16_t tw_mt_len;
00082 static volatile uint16_t tw_mt_idx;
00083
00084 static uint8_t *tw_mr_buf;
00085 static volatile uint16_t tw_mr_siz;
00086 static volatile uint16_t tw_mr_idx;
00087
00088 #if defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00089
00090 #define TWI_PIO_ASR PIOA_ASR
00091 #define TWI_PIO_PDR PIOA_PDR
00092 #define TWI_PIO_MDER PIOA_MDER
00093
00094 #if defined (MCU_AT91SAM7X256)
00095 #define TWI_TWD PA10_TWD_A
00096 #define TWI_TWCK PA11_TWCK_A
00097 #elif defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00098 #define TWI_TWD PA3_TWD_A
00099 #define TWI_TWCK PA4_TWCK_A
00100 #endif
00101 #endif
00102
00103
00104
00105
00106 static void TwInterrupt(void *arg)
00107 {
00108 register u_int twsr = inr(TWI_SR) & (TWI_NACK | TWI_RXRDY | TWI_TXRDY | TWI_TXCOMP);;
00109
00110
00111 if (twsr & TWI_TXCOMP) {
00112 outr(TWI_IDR, 0xFFFFFFFF);
00113 NutEventPostFromIrq(&tw_mm_que);
00114 }
00115
00116 if (twsr & TWI_RXRDY) {
00117 if (tw_mr_idx < tw_mr_siz) {
00118 tw_mr_buf[tw_mr_idx++] = inb(TWI_RHR);
00119
00120 if (tw_mr_idx == tw_mr_siz - 1) {
00121 outr(TWI_CR, TWI_STOP);
00122 }
00123
00124 if (tw_mr_idx == tw_mr_siz) {
00125
00126 outr(TWI_IDR, TWI_RXRDY);
00127 outr(TWI_IER, TWI_TXCOMP);
00128 }
00129 }
00130 }
00131
00132 if (twsr & TWI_TXRDY) {
00133 if (tw_mt_idx < tw_mt_len) {
00134 outb(TWI_THR, tw_mt_buf[tw_mt_idx++]);
00135
00136 if (tw_mt_idx == tw_mt_len) {
00137 if (tw_mr_siz == 0) {
00138 outr(TWI_CR, TWI_STOP);
00139 outr(TWI_IDR, TWI_TXRDY);
00140 outr(TWI_IER, TWI_TXCOMP);
00141 } else {
00142
00143 outr(TWI_MMR, inb(TWI_MMR) | TWI_MREAD);
00144 outr(TWI_CR, TWI_START | (tw_mr_siz == 1) ? TWI_STOP : 0);
00145 outr(TWI_IDR, TWI_TXRDY);
00146 outr(TWI_IER, TWI_RXRDY);
00147 }
00148 }
00149 }
00150 }
00151
00152
00153 if (twsr & TWI_NACK) {;
00154
00155 outr(TWI_CR, TWI_STOP);
00156 tw_mm_err = TWERR_DATA_NACK;
00157 tw_mt_idx = 0;
00158 tw_mt_len = 0;
00159 tw_mr_siz = 0;
00160 outr(TWI_IDR, 0xFFFFFFFF);
00161
00162 NutEventPostFromIrq(&tw_mm_que);
00163 }
00164 }
00165
00192 int TwMasterTransact(uint8_t sla, CONST void *txdata, uint16_t txlen, void *rxdata, uint16_t rxsiz, uint32_t tmo)
00193 {
00194 int rc = -1;
00195
00196
00197 if(NutEventWait(&tw_mm_mutex, 500)) {
00198 tw_mm_err = TWERR_IF_LOCKED;
00199 NutEventPost(&tw_mm_mutex);
00200 return -1;
00201 }
00202 NutIrqEnable(&sig_TWI);
00203
00204 NutEnterCritical();
00205
00206 tw_mm_sla = sla;
00207 tw_mm_err = 0;
00208 tw_mt_len = txlen;
00209 tw_mt_idx = 0;
00210 tw_mt_buf = txdata;
00211 tw_mr_siz = rxsiz;
00212 tw_mr_buf = rxdata;
00213 tw_mr_idx = 0;
00214
00215 if ((tw_mt_len == 0) && (tw_mr_siz == 0)) return -1;
00216
00217
00218
00219 outr(TWI_MMR, (tw_mm_sla << 16) | (tw_mt_len == 0 ? TWI_MREAD : 0));
00220
00221
00222 if (tw_mt_len == 0) {
00223 outr(TWI_IDR, TWI_TXRDY | TWI_TXCOMP);
00224 outr(TWI_IER, TWI_RXRDY | TWI_NACK);
00225 } else {
00226 outr(TWI_IDR, TWI_RXRDY);
00227 if ((tw_mt_len == 1) && (tw_mr_siz == 0)) {
00228 outr(TWI_IDR, TWI_TXRDY);
00229 outr(TWI_IER, TWI_TXCOMP);
00230 } else {
00231 outr(TWI_IER, TWI_TXRDY);
00232 outr(TWI_IDR, TWI_TXCOMP);
00233 }
00234 outr(TWI_IER, TWI_NACK);
00235 }
00236
00237
00238 if (tw_mt_len > 0) {
00239 outb(TWI_THR, tw_mt_buf[tw_mt_idx++]);
00240 }
00241
00242
00243 outr(TWI_CR, TWI_START | (((tw_mt_len == 1) && (tw_mr_siz == 0)) ||
00244 ((tw_mt_len == 0) && (tw_mr_siz == 1))) ? TWI_STOP : 0);
00245
00246 NutExitCritical();
00247
00248
00249 rc = -1;
00250 if (NutEventWait(&tw_mm_que, tmo)) {
00251 tw_mm_error = TWERR_TIMEOUT;
00252 } else {
00253 NutEnterCritical();
00254 if (tw_mm_err) {
00255 tw_mm_error = tw_mm_err;
00256 } else {
00257 rc = tw_mr_idx;
00258 }
00259 NutExitCritical();
00260 }
00261
00262 NutIrqDisable(&sig_TWI);
00263
00264
00265 NutEventPost(&tw_mm_mutex);
00266
00267 return rc;
00268 }
00269
00279 int TwMasterError(void)
00280 {
00281 int rc = (int) tw_mm_error;
00282 tw_mm_error = 0;
00283 return rc;
00284 }
00285
00301 int TwIOCtl(int req, void *conf)
00302 {
00303 int rc = 0;
00304 unsigned int cldiv, ckdiv;
00305 unsigned int twi_clk;
00306 switch (req) {
00307
00308 case TWI_SETSPEED:
00309 ckdiv=1 ;
00310 twi_clk = *((uint32_t *) conf);
00311
00312 if (twi_clk > 400000) return -1;
00313
00314
00315
00316
00317
00318
00319
00320 while ((cldiv = ((NutGetCpuClock() / (2*twi_clk))-3 ) / (1 << ckdiv)) > 255) {
00321 ckdiv++;
00322 }
00323
00324
00325 if (cldiv * (2 << ckdiv) > 8191) return -1;
00326
00327 outr(TWI_CWGR, (ckdiv << 16) | ((u_int) cldiv << 8) | (u_int) cldiv);
00328 break;
00329
00330 case TWI_GETSPEED:
00331 ckdiv=1 ;
00332 twi_clk = *((uint32_t *) conf);
00333
00334 cldiv = inr(TWI_CWGR) & 0x000000FF;
00335 ckdiv = (inr(TWI_CWGR) >> 16) & 0x00000007;
00336
00337 *((uint32_t *) conf) = NutGetCpuClock() * ((cldiv * 2 << ckdiv) - 3);
00338 break;
00339
00340 case TWI_GETSTATUS:
00341 break;
00342
00343 case TWI_SETSTATUS:
00344 break;
00345
00346 default:
00347 rc = -1;
00348 break;
00349 }
00350 return rc;
00351 }
00352
00365 int TwInit(uint8_t sla)
00366 {
00367 uint32_t speed = 2400;
00368
00369 if (NutRegisterIrqHandler(&sig_TWI, TwInterrupt, 0)) {
00370 return -1;
00371 }
00372
00373 outr(TWI_PIO_ASR, _BV(TWI_TWD) | _BV(TWI_TWCK));
00374 outr(TWI_PIO_PDR, _BV(TWI_TWD) | _BV(TWI_TWCK));
00375
00376 outr(TWI_PIO_MDER, _BV(TWI_TWD) | _BV(TWI_TWCK));
00377
00378 outr(PMC_PCER, _BV(TWI_ID));
00379
00380 outr(TWI_IDR, 0xFFFFFFFF);
00381 outr(TWI_CR, TWI_SWRST);
00382 outr(TWI_CR, TWI_MSEN | TWI_SVDIS);
00383
00384 TwIOCtl(TWI_SETSPEED, &speed);
00385
00386
00387 NutEventPost(&tw_mm_mutex);
00388
00389 return 0;
00390 }