ih_timer2_comp.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (C) 2001-2005 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  *
00032  */
00033 
00084 #include <dev/irqreg.h>
00085 
00086 #if defined(MCU_AT90CAN128) || defined(MCU_ATMEGA2560) || defined(MCU_ATMEGA2561)
00087 #define INT_MASK_REG    TIMSK2
00088 #define INT_STATUS_REG  TIFR2
00089 #define INT_ENABLE_BIT  OCIE2A
00090 #define INT_STATUS_BIT  OCF2A
00091 #define INT_PRIORITY    8
00092 #else
00093 #define INT_MASK_REG    TIMSK
00094 #define INT_STATUS_REG  TIFR
00095 #define INT_ENABLE_BIT  OCIE2
00096 #define INT_STATUS_BIT  OCF2
00097 #define INT_PRIORITY    8
00098 #endif
00099 
00104 
00105 static int AvrTimer2CompIrqCtl(int cmd, void *param);
00106 
00107 IRQ_HANDLER sig_OUTPUT_COMPARE2 = {
00108 #ifdef NUT_PERFMON
00109     0,                          /* Interrupt counter, ir_count. */
00110 #endif
00111     NULL,                       /* Passed argument, ir_arg. */
00112     NULL,                       /* Handler subroutine, ir_handler. */
00113     AvrTimer2CompIrqCtl         /* Interrupt control, ir_ctl. */
00114 };
00115 
00131 static int AvrTimer2CompIrqCtl(int cmd, void *param)
00132 {
00133     int rc = 0;
00134     u_int *ival = (u_int *) param;
00135     int_fast8_t enabled = bit_is_set(INT_MASK_REG, INT_ENABLE_BIT);
00136 
00137     /* Disable interrupt. */
00138     cbi(INT_MASK_REG, INT_ENABLE_BIT);
00139 
00140     switch (cmd) {
00141     case NUT_IRQCTL_INIT:
00142         enabled = 0;
00143     case NUT_IRQCTL_CLEAR:
00144         /* Clear any pending interrupt. */
00145         outb(INT_STATUS_REG, _BV(INT_STATUS_BIT));
00146         break;
00147     case NUT_IRQCTL_STATUS:
00148         if (bit_is_set(INT_STATUS_REG, INT_STATUS_BIT)) {
00149             *ival = 1;
00150         } else {
00151             *ival = 0;
00152         }
00153         if (enabled) {
00154             *ival |= 0x80;
00155         }
00156         break;
00157     case NUT_IRQCTL_ENABLE:
00158         enabled = 1;
00159         break;
00160     case NUT_IRQCTL_DISABLE:
00161         enabled = 0;
00162         break;
00163     case NUT_IRQCTL_GETPRIO:
00164         *ival = INT_PRIORITY;
00165         break;
00166 #ifdef NUT_PERFMON
00167     case NUT_IRQCTL_GETCOUNT:
00168         *ival = (u_int) sig_OUTPUT_COMPARE2.ir_count;
00169         sig_OUTPUT_COMPARE2.ir_count = 0;
00170         break;
00171 #endif
00172     default:
00173         rc = -1;
00174         break;
00175     }
00176 
00177     /* Enable interrupt. */
00178     if (enabled) {
00179         sbi(INT_MASK_REG, INT_ENABLE_BIT);
00180     }
00181     return rc;
00182 }
00183 
00187 #ifdef __IMAGECRAFT__
00188 #if defined(ATMega2560) || defined(ATMega2561)
00189 #pragma interrupt_handler SIG_OUTPUT_COMPARE2:iv_TIMER2_COMPA
00190 #else
00191 #pragma interrupt_handler SIG_OUTPUT_COMPARE2:iv_TIMER2_COMP
00192 #endif
00193 NUTSIGNAL(SIG_OUTPUT_COMPARE2, sig_OUTPUT_COMPARE2)
00194 #else
00195 #if defined(MCU_ATMEGA2560) || defined(MCU_ATMEGA2561)
00196 NUTSIGNAL(SIG_OUTPUT_COMPARE2A, sig_OUTPUT_COMPARE2)
00197 #else
00198 NUTSIGNAL(SIG_OUTPUT_COMPARE2, sig_OUTPUT_COMPARE2)
00199 #endif
00200 #endif
00201 

© 2000-2007 by egnite Software GmbH - visit http://www.ethernut.de/