00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032
00033
00034
00035
00036
00037
00038
00039
00040
00041
00042
00043
00044
00045
00046
00047
00048
00049
00050
00051
00052
00053
00054
00055 #include <arch/arm.h>
00056 #include <dev/irqreg.h>
00057
00058 #ifndef NUT_IRQPRI_FIQ
00059 #define NUT_IRQPRI_FIQ 4
00060 #endif
00061
00062 static int FastIrqCtl(int cmd, void *param);
00063
00064 IRQ_HANDLER sig_FIQ = {
00065 #ifdef NUT_PERFMON
00066 0,
00067 #endif
00068 NULL,
00069 NULL,
00070 FastIrqCtl
00071 };
00072
00078 static void FastIrqEntry(void) __attribute__ ((naked));
00079 void FastIrqEntry(void)
00080 {
00081 FIQ_ENTRY();
00082 #ifdef NUT_PERFMON
00083 sig_FIQ.ir_count++;
00084 #endif
00085 if (sig_FIQ.ir_handler) {
00086 (sig_FIQ.ir_handler) (sig_FIQ.ir_arg);
00087 }
00088 FIQ_EXIT();
00089 }
00090
00106 static int FastIrqCtl(int cmd, void *param)
00107 {
00108 int rc = 0;
00109 unsigned int *ival = (unsigned int *)param;
00110 int_fast8_t enabled = inr(AIC_IMR) & _BV(FIQ_ID);
00111
00112
00113 if (enabled) {
00114 outr(AIC_IDCR, _BV(FIQ_ID));
00115 }
00116
00117 switch(cmd) {
00118 case NUT_IRQCTL_INIT:
00119
00120 outr(AIC_SVR(FIQ_ID), (unsigned int)FastIrqEntry);
00121
00122 outr(AIC_SMR(FIQ_ID), AIC_SRCTYPE_EXT_NEGATIVE_EDGE | NUT_IRQPRI_FIQ);
00123
00124 outr(AIC_ICCR, _BV(FIQ_ID));
00125 break;
00126 case NUT_IRQCTL_STATUS:
00127 if (enabled) {
00128 *ival |= 1;
00129 }
00130 else {
00131 *ival &= ~1;
00132 }
00133 break;
00134 case NUT_IRQCTL_ENABLE:
00135 enabled = 1;
00136 break;
00137 case NUT_IRQCTL_DISABLE:
00138 enabled = 0;
00139 break;
00140 case NUT_IRQCTL_GETMODE:
00141 {
00142 unsigned int val = inr(AIC_SMR(FIQ_ID)) & AIC_SRCTYPE;
00143 if (val == AIC_SRCTYPE_EXT_LOW_LEVEL) {
00144 *ival = NUT_IRQMODE_LOWLEVEL;
00145 } else if (val == AIC_SRCTYPE_EXT_HIGH_LEVEL) {
00146 *ival = NUT_IRQMODE_HIGHLEVEL;
00147 } else if (val == AIC_SRCTYPE_EXT_POSITIVE_EDGE) {
00148 *ival = NUT_IRQMODE_RISINGEDGE;
00149 } else {
00150 *ival = NUT_IRQMODE_FALLINGEDGE;
00151 }
00152 }
00153 break;
00154 case NUT_IRQCTL_SETMODE:
00155 if (*ival == NUT_IRQMODE_LOWLEVEL) {
00156 outr(AIC_SMR(FIQ_ID), (inr(AIC_SMR(FIQ_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_LOW_LEVEL);
00157 } else if (*ival == NUT_IRQMODE_HIGHLEVEL) {
00158 outr(AIC_SMR(FIQ_ID), (inr(AIC_SMR(FIQ_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_HIGH_LEVEL);
00159 } else if (*ival == NUT_IRQMODE_FALLINGEDGE) {
00160 outr(AIC_SMR(FIQ_ID), (inr(AIC_SMR(FIQ_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_NEGATIVE_EDGE);
00161 } else if (*ival == NUT_IRQMODE_RISINGEDGE) {
00162 outr(AIC_SMR(FIQ_ID), (inr(AIC_SMR(FIQ_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_POSITIVE_EDGE);
00163 } else {
00164 rc = -1;
00165 }
00166 break;
00167 #ifdef NUT_PERFMON
00168 case NUT_IRQCTL_GETCOUNT:
00169 *ival = (unsigned int)sig_FIQ.ir_count;
00170 sig_FIQ.ir_count = 0;
00171 break;
00172 #endif
00173 default:
00174 rc = -1;
00175 break;
00176 }
00177
00178
00179 if (enabled) {
00180 outr(AIC_IECR, _BV(FIQ_ID));
00181 }
00182 return rc;
00183 }