sbbif1.h

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00001 #ifndef _DEV_SBBIF1_H_
00002 #define _DEV_SBBIF1_H_
00003 /*
00004  * Copyright (C) 2007 by egnite Software GmbH. All rights reserved.
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  *
00010  * 1. Redistributions of source code must retain the above copyright
00011  *    notice, this list of conditions and the following disclaimer.
00012  * 2. Redistributions in binary form must reproduce the above copyright
00013  *    notice, this list of conditions and the following disclaimer in the
00014  *    documentation and/or other materials provided with the distribution.
00015  * 3. Neither the name of the copyright holders nor the names of
00016  *    contributors may be used to endorse or promote products derived
00017  *    from this software without specific prior written permission.
00018  *
00019  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00020  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00021  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00022  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00023  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00024  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00025  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00026  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00027  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00028  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00029  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00030  * SUCH DAMAGE.
00031  *
00032  * For additional information see http://www.ethernut.de/
00033  */
00034 
00052 #include <cfg/arch/gpio.h>
00053 
00057 #ifndef SBBI1_MAX_DEVICES
00058 #define SBBI1_MAX_DEVICES   4
00059 #endif
00060 
00061 #if defined(__AVR__)            /* MCU */
00062 /*
00063  * AVR implementation.
00064  * ======================================
00065  */
00066 
00067 #ifdef SBBI1_CS0_BIT
00068 
00069 #if (SBBI1_CS0_PORT == AVRPORTB)
00070 #define SBBI1_CS0_SOD_REG PORTB
00071 #define SBBI1_CS0_OE_REG  DDRB
00072 #elif (SBBI1_CS0_PORT == AVRPORTD)
00073 #define SBBI1_CS0_SOD_REG PORTD
00074 #define SBBI1_CS0_OE_REG  DDRD
00075 #elif (SBBI1_CS0_PORT == AVRPORTE)
00076 #define SBBI1_CS0_SOD_REG PORTE
00077 #define SBBI1_CS0_OE_REG  DDRE
00078 #elif (SBBI1_CS0_PORT == AVRPORTF)
00079 #define SBBI1_CS0_SOD_REG PORTF
00080 #define SBBI1_CS0_OE_REG  DDRF
00081 #elif (SBBI1_CS0_PORT == AVRPORTG)
00082 #define SBBI1_CS0_SOD_REG PORTG
00083 #define SBBI1_CS0_OE_REG  DDRG
00084 #elif (SBBI1_CS0_PORT == AVRPORTH)
00085 #define SBBI1_CS0_SOD_REG PORTH
00086 #define SBBI1_CS0_OE_REG  DDRH
00087 #endif
00088 
00090 #define SBBI1_CS0_ENA()      sbi(SBBI1_CS0_OE_REG, SBBI1_CS0_BIT)
00091 
00092 #define SBBI1_CS0_CLR()      cbi(SBBI1_CS0_SOD_REG, SBBI1_CS0_BIT)
00093 
00094 #define SBBI1_CS0_SET()      sbi(SBBI1_CS0_SOD_REG, SBBI1_CS0_BIT)
00095 
00096 #endif                          /* SBBI1_CS0_BIT */
00097 
00098 #ifdef SBBI1_CS1_BIT
00099 
00100 #if (SBBI1_CS1_PORT == AVRPORTB)
00101 #define SBBI1_CS1_SOD_REG PORTB
00102 #define SBBI1_CS1_OE_REG  DDRB
00103 #elif (SBBI1_CS1_PORT == AVRPORTD)
00104 #define SBBI1_CS1_SOD_REG PORTD
00105 #define SBBI1_CS1_OE_REG  DDRD
00106 #elif (SBBI1_CS1_PORT == AVRPORTE)
00107 #define SBBI1_CS1_SOD_REG PORTE
00108 #define SBBI1_CS1_OE_REG  DDRE
00109 #elif (SBBI1_CS1_PORT == AVRPORTF)
00110 #define SBBI1_CS1_SOD_REG PORTF
00111 #define SBBI1_CS1_OE_REG  DDRF
00112 #elif (SBBI1_CS1_PORT == AVRPORTG)
00113 #define SBBI1_CS1_SOD_REG PORTG
00114 #define SBBI1_CS1_OE_REG  DDRG
00115 #elif (SBBI1_CS1_PORT == AVRPORTH)
00116 #define SBBI1_CS1_SOD_REG PORTH
00117 #define SBBI1_CS1_OE_REG  DDRH
00118 #endif
00119 
00121 #define SBBI1_CS1_ENA()      sbi(SBBI1_CS1_OE_REG, SBBI1_CS1_BIT)
00122 
00123 #define SBBI1_CS1_CLR()      cbi(SBBI1_CS1_SOD_REG, SBBI1_CS1_BIT)
00124 
00125 #define SBBI1_CS1_SET()      sbi(SBBI1_CS1_SOD_REG, SBBI1_CS1_BIT)
00126 
00127 #endif                          /* SBBI1_CS1_BIT */
00128 
00129 #ifdef SBBI1_CS2_BIT
00130 
00131 #if (SBBI1_CS2_PORT == AVRPORTB)
00132 #define SBBI1_CS2_SOD_REG PORTB
00133 #define SBBI1_CS2_OE_REG  DDRB
00134 #elif (SBBI1_CS2_PORT == AVRPORTD)
00135 #define SBBI1_CS2_SOD_REG PORTD
00136 #define SBBI1_CS2_OE_REG  DDRD
00137 #elif (SBBI1_CS2_PORT == AVRPORTE)
00138 #define SBBI1_CS2_SOD_REG PORTE
00139 #define SBBI1_CS2_OE_REG  DDRE
00140 #elif (SBBI1_CS2_PORT == AVRPORTF)
00141 #define SBBI1_CS2_SOD_REG PORTF
00142 #define SBBI1_CS2_OE_REG  DDRF
00143 #elif (SBBI1_CS2_PORT == AVRPORTG)
00144 #define SBBI1_CS2_SOD_REG PORTG
00145 #define SBBI1_CS2_OE_REG  DDRG
00146 #elif (SBBI1_CS2_PORT == AVRPORTH)
00147 #define SBBI1_CS2_SOD_REG PORTH
00148 #define SBBI1_CS2_OE_REG  DDRH
00149 #endif
00150 
00152 #define SBBI1_CS2_ENA()      sbi(SBBI1_CS2_OE_REG, SBBI1_CS2_BIT)
00153 
00154 #define SBBI1_CS2_CLR()      cbi(SBBI1_CS2_SOD_REG, SBBI1_CS2_BIT)
00155 
00156 #define SBBI1_CS2_SET()      sbi(SBBI1_CS2_SOD_REG, SBBI1_CS2_BIT)
00157 
00158 #endif                          /* SBBI1_CS2_BIT */
00159 
00160 #ifdef SBBI1_CS3_BIT
00161 
00162 #if (SBBI1_CS3_PORT == AVRPORTB)
00163 #define SBBI1_CS3_SOD_REG PORTB
00164 #define SBBI1_CS3_OE_REG  DDRB
00165 #elif (SBBI1_CS3_PORT == AVRPORTD)
00166 #define SBBI1_CS3_SOD_REG PORTD
00167 #define SBBI1_CS3_OE_REG  DDRD
00168 #elif (SBBI1_CS3_PORT == AVRPORTE)
00169 #define SBBI1_CS3_SOD_REG PORTE
00170 #define SBBI1_CS3_OE_REG  DDRE
00171 #elif (SBBI1_CS3_PORT == AVRPORTF)
00172 #define SBBI1_CS3_SOD_REG PORTF
00173 #define SBBI1_CS3_OE_REG  DDRF
00174 #elif (SBBI1_CS3_PORT == AVRPORTG)
00175 #define SBBI1_CS3_SOD_REG PORTG
00176 #define SBBI1_CS3_OE_REG  DDRG
00177 #elif (SBBI1_CS3_PORT == AVRPORTH)
00178 #define SBBI1_CS3_SOD_REG PORTH
00179 #define SBBI1_CS3_OE_REG  DDRH
00180 #endif
00181 
00183 #define SBBI1_CS3_ENA()      sbi(SBBI1_CS3_OE_REG, SBBI1_CS3_BIT)
00184 
00185 #define SBBI1_CS3_CLR()      cbi(SBBI1_CS3_SOD_REG, SBBI1_CS3_BIT)
00186 
00187 #define SBBI1_CS3_SET()      sbi(SBBI1_CS3_SOD_REG, SBBI1_CS3_BIT)
00188 
00189 #endif                          /* SBBI1_CS3_BIT */
00190 
00191 #ifdef SBBI1_RST0_BIT
00192 
00193 #if (SBBI1_RST0_PORT == AVRPORTB)
00194 #define SBBI1_RST0_SOD_REG PORTB
00195 #define SBBI1_RST0_OE_REG  DDRB
00196 #elif (SBBI1_RST0_PORT == AVRPORTD)
00197 #define SBBI1_RST0_SOD_REG PORTD
00198 #define SBBI1_RST0_OE_REG  DDRD
00199 #elif (SBBI1_RST0_PORT == AVRPORTE)
00200 #define SBBI1_RST0_SOD_REG PORTE
00201 #define SBBI1_RST0_OE_REG  DDRE
00202 #elif (SBBI1_RST0_PORT == AVRPORTF)
00203 #define SBBI1_RST0_SOD_REG PORTF
00204 #define SBBI1_RST0_OE_REG  DDRF
00205 #elif (SBBI1_RST0_PORT == AVRPORTG)
00206 #define SBBI1_RST0_SOD_REG PORTG
00207 #define SBBI1_RST0_OE_REG  DDRG
00208 #elif (SBBI1_RST0_PORT == AVRPORTH)
00209 #define SBBI1_RST0_SOD_REG PORTH
00210 #define SBBI1_RST0_OE_REG  DDRH
00211 #endif
00212 
00214 #define SBBI1_RST0_ENA()      sbi(SBBI1_RST0_OE_REG, SBBI1_RST0_BIT)
00215 
00216 #define SBBI1_RST0_CLR()      cbi(SBBI1_RST0_SOD_REG, SBBI1_RST0_BIT)
00217 
00218 #define SBBI1_RST0_SET()      sbi(SBBI1_RST0_SOD_REG, SBBI1_RST0_BIT)
00219 
00220 #endif                          /* SBBI1_RST0_BIT */
00221 
00222 #ifdef SBBI1_RST1_BIT
00223 
00224 #if (SBBI1_RST1_PORT == AVRPORTB)
00225 #define SBBI1_RST1_SOD_REG PORTB
00226 #define SBBI1_RST1_OE_REG  DDRB
00227 #elif (SBBI1_RST1_PORT == AVRPORTD)
00228 #define SBBI1_RST1_SOD_REG PORTD
00229 #define SBBI1_RST1_OE_REG  DDRD
00230 #elif (SBBI1_RST1_PORT == AVRPORTE)
00231 #define SBBI1_RST1_SOD_REG PORTE
00232 #define SBBI1_RST1_OE_REG  DDRE
00233 #elif (SBBI1_RST1_PORT == AVRPORTF)
00234 #define SBBI1_RST1_SOD_REG PORTF
00235 #define SBBI1_RST1_OE_REG  DDRF
00236 #elif (SBBI1_RST1_PORT == AVRPORTG)
00237 #define SBBI1_RST1_SOD_REG PORTG
00238 #define SBBI1_RST1_OE_REG  DDRG
00239 #elif (SBBI1_RST1_PORT == AVRPORTH)
00240 #define SBBI1_RST1_SOD_REG PORTH
00241 #define SBBI1_RST1_OE_REG  DDRH
00242 #endif
00243 
00245 #define SBBI1_RST1_ENA()      sbi(SBBI1_RST1_OE_REG, SBBI1_RST1_BIT)
00246 
00247 #define SBBI1_RST1_CLR()      cbi(SBBI1_RST1_SOD_REG, SBBI1_RST1_BIT)
00248 
00249 #define SBBI1_RST1_SET()      sbi(SBBI1_RST1_SOD_REG, SBBI1_RST1_BIT)
00250 
00251 #endif                          /* SBBI1_RST1_BIT */
00252 
00253 #ifdef SBBI1_RST2_BIT
00254 
00255 #if (SBBI1_RST2_PORT == AVRPORTB)
00256 #define SBBI1_RST2_SOD_REG PORTB
00257 #define SBBI1_RST2_OE_REG  DDRB
00258 #elif (SBBI1_RST2_PORT == AVRPORTD)
00259 #define SBBI1_RST2_SOD_REG PORTD
00260 #define SBBI1_RST2_OE_REG  DDRD
00261 #elif (SBBI1_RST2_PORT == AVRPORTE)
00262 #define SBBI1_RST2_SOD_REG PORTE
00263 #define SBBI1_RST2_OE_REG  DDRE
00264 #elif (SBBI1_RST2_PORT == AVRPORTF)
00265 #define SBBI1_RST2_SOD_REG PORTF
00266 #define SBBI1_RST2_OE_REG  DDRF
00267 #elif (SBBI1_RST2_PORT == AVRPORTG)
00268 #define SBBI1_RST2_SOD_REG PORTG
00269 #define SBBI1_RST2_OE_REG  DDRG
00270 #elif (SBBI1_RST2_PORT == AVRPORTH)
00271 #define SBBI1_RST2_SOD_REG PORTH
00272 #define SBBI1_RST2_OE_REG  DDRH
00273 #endif
00274 
00276 #define SBBI1_RST2_ENA()      sbi(SBBI1_RST2_OE_REG, SBBI1_RST2_BIT)
00277 
00278 #define SBBI1_RST2_CLR()      cbi(SBBI1_RST2_SOD_REG, SBBI1_RST2_BIT)
00279 
00280 #define SBBI1_RST2_SET()      sbi(SBBI1_RST2_SOD_REG, SBBI1_RST2_BIT)
00281 
00282 #endif                          /* SBBI1_RST2_BIT */
00283 
00284 #ifdef SBBI1_RST3_BIT
00285 
00286 #if (SBBI1_RST3_PORT == AVRPORTB)
00287 #define SBBI1_RST3_SOD_REG PORTB
00288 #define SBBI1_RST3_OE_REG  DDRB
00289 #elif (SBBI1_RST3_PORT == AVRPORTD)
00290 #define SBBI1_RST3_SOD_REG PORTD
00291 #define SBBI1_RST3_OE_REG  DDRD
00292 #elif (SBBI1_RST3_PORT == AVRPORTE)
00293 #define SBBI1_RST3_SOD_REG PORTE
00294 #define SBBI1_RST3_OE_REG  DDRE
00295 #elif (SBBI1_RST3_PORT == AVRPORTF)
00296 #define SBBI1_RST3_SOD_REG PORTF
00297 #define SBBI1_RST3_OE_REG  DDRF
00298 #elif (SBBI1_RST3_PORT == AVRPORTG)
00299 #define SBBI1_RST3_SOD_REG PORTG
00300 #define SBBI1_RST3_OE_REG  DDRG
00301 #elif (SBBI1_RST3_PORT == AVRPORTH)
00302 #define SBBI1_RST3_SOD_REG PORTH
00303 #define SBBI1_RST3_OE_REG  DDRH
00304 #endif
00305 
00307 #define SBBI1_RST3_ENA()      sbi(SBBI1_RST3_OE_REG, SBBI1_RST3_BIT)
00308 
00309 #define SBBI1_RST3_CLR()      cbi(SBBI1_RST3_SOD_REG, SBBI1_RST3_BIT)
00310 
00311 #define SBBI1_RST3_SET()      sbi(SBBI1_RST3_SOD_REG, SBBI1_RST3_BIT)
00312 
00313 #endif                          /* SBBI1_RST3_BIT */
00314 
00315 #ifdef SBBI1_SCK_BIT
00316 
00317 #if (SBBI1_SCK_PORT == AVRPORTB)
00318 #define SBBI1_SCK_SOD_REG PORTB
00319 #define SBBI1_SCK_OE_REG  DDRB
00320 #elif (SBBI1_SCK_PORT == AVRPORTD)
00321 #define SBBI1_SCK_SOD_REG PORTD
00322 #define SBBI1_SCK_OE_REG  DDRD
00323 #elif (SBBI1_SCK_PORT == AVRPORTE)
00324 #define SBBI1_SCK_SOD_REG PORTE
00325 #define SBBI1_SCK_OE_REG  DDRE
00326 #elif (SBBI1_SCK_PORT == AVRPORTF)
00327 #define SBBI1_SCK_SOD_REG PORTF
00328 #define SBBI1_SCK_OE_REG  DDRF
00329 #elif (SBBI1_SCK_PORT == AVRPORTG)
00330 #define SBBI1_SCK_SOD_REG PORTG
00331 #define SBBI1_SCK_OE_REG  DDRG
00332 #elif (SBBI1_SCK_PORT == AVRPORTH)
00333 #define SBBI1_SCK_SOD_REG PORTH
00334 #define SBBI1_SCK_OE_REG  DDRH
00335 #endif
00336 
00338 #define SBBI1_SCK_ENA()      sbi(SBBI1_SCK_OE_REG, SBBI1_SCK_BIT)
00339 
00340 #define SBBI1_SCK_CLR()      cbi(SBBI1_SCK_SOD_REG, SBBI1_SCK_BIT)
00341 
00342 #define SBBI1_SCK_SET()      sbi(SBBI1_SCK_SOD_REG, SBBI1_SCK_BIT)
00343 
00344 #if defined(SBBI1_MOSI_BIT)
00345 
00346 #if (SBBI1_MOSI_PORT == AVRPORTB)
00347 #define SBBI1_MOSI_SOD_REG PORTB
00348 #define SBBI1_MOSI_OE_REG  DDRB
00349 #elif (SBBI1_MOSI_PORT == AVRPORTD)
00350 #define SBBI1_MOSI_SOD_REG PORTD
00351 #define SBBI1_MOSI_OE_REG  DDRD
00352 #elif (SBBI1_MOSI_PORT == AVRPORTE)
00353 #define SBBI1_MOSI_SOD_REG PORTE
00354 #define SBBI1_MOSI_OE_REG  DDRE
00355 #elif (SBBI1_MOSI_PORT == AVRPORTF)
00356 #define SBBI1_MOSI_SOD_REG PORTF
00357 #define SBBI1_MOSI_OE_REG  DDRF
00358 #elif (SBBI1_MOSI_PORT == AVRPORTG)
00359 #define SBBI1_MOSI_SOD_REG PORTG
00360 #define SBBI1_MOSI_OE_REG  DDRG
00361 #elif (SBBI1_MOSI_PORT == AVRPORTH)
00362 #define SBBI1_MOSI_SOD_REG PORTH
00363 #define SBBI1_MOSI_OE_REG  DDRH
00364 #endif
00365 
00367 #define SBBI1_MOSI_ENA()      sbi(SBBI1_MOSI_OE_REG, SBBI1_MOSI_BIT)
00368 
00369 #define SBBI1_MOSI_CLR()      cbi(SBBI1_MOSI_SOD_REG, SBBI1_MOSI_BIT)
00370 
00371 #define SBBI1_MOSI_SET()      sbi(SBBI1_MOSI_SOD_REG, SBBI1_MOSI_BIT)
00372 
00373 #else                           /* SBBI1_MOSI_BIT */
00374 
00375 #define SBBI1_MOSI_ENA()
00376 #define SBBI1_MOSI_CLR()
00377 #define SBBI1_MOSI_SET()
00378 
00379 #endif                          /* SBBI1_MOSI_BIT */
00380 
00381 #if defined(SBBI1_MISO_BIT)
00382 
00383 #if (SBBI1_MISO_PORT == AVRPORTB)
00384 #define SBBI1_MISO_PDS_REG PINB
00385 #define SBBI1_MISO_PUE_REG PORTB
00386 #define SBBI1_MISO_OE_REG  DDRB
00387 #elif (SBBI1_MISO_PORT == AVRPORTD)
00388 #define SBBI1_MISO_PDS_REG PIND
00389 #define SBBI1_MISO_PUE_REG PORTD
00390 #define SBBI1_MISO_OE_REG  DDRD
00391 #elif (SBBI1_MISO_PORT == AVRPORTE)
00392 #define SBBI1_MISO_PDS_REG PINE
00393 #define SBBI1_MISO_PUE_REG PORTE
00394 #define SBBI1_MISO_OE_REG  DDRE
00395 #elif (SBBI1_MISO_PORT == AVRPORTF)
00396 #define SBBI1_MISO_PDS_REG PINF
00397 #define SBBI1_MISO_PUE_REG PORTF
00398 #define SBBI1_MISO_OE_REG  DDRF
00399 #elif (SBBI1_MISO_PORT == AVRPORTG)
00400 #define SBBI1_MISO_PDS_REG PING
00401 #define SBBI1_MISO_PUE_REG PORTG
00402 #define SBBI1_MISO_OE_REG  DDRG
00403 #elif (SBBI1_MISO_PORT == AVRPORTH)
00404 #define SBBI1_MISO_PDS_REG PINH
00405 #define SBBI1_MISO_PUE_REG PORTH
00406 #define SBBI1_MISO_OE_REG  DDRH
00407 #endif
00408 
00410 #define SBBI1_MISO_ENA() \
00411     cbi(SBBI1_MISO_OE_REG, SBBI1_MISO_BIT); \
00412     sbi(SBBI1_MISO_PUE_REG, SBBI1_MISO_BIT)
00413 
00414 #define SBBI1_MISO_TST()    ((inb(SBBI1_MISO_PDS_REG) & _BV(SBBI1_MISO_BIT)) == _BV(SBBI1_MISO_BIT))
00415 
00416 #else                           /* SBBI1_MISO_BIT */
00417 
00418 #define SBBI1_MISO_ENA()
00419 #define SBBI1_MISO_TST()   0
00420 
00421 #endif                          /* SBBI1_MISO_BIT */
00422 
00423 #endif                          /* SBBI1_SCK_BIT */
00424 
00425 #else                           /* MCU */
00426 /*
00427  * AT91 implementation.
00428  * ======================================
00429  */
00430 
00431 #ifdef SBBI1_CS0_BIT
00432 
00433 #if !defined(SBBI1_CS0_PIO_ID)
00434 #define SBBI1_CS0_PE_REG        PIO_PER
00435 #define SBBI1_CS0_OE_REG        PIO_OER
00436 #define SBBI1_CS0_COD_REG       PIO_CODR
00437 #define SBBI1_CS0_SOD_REG       PIO_SODR
00438 #elif SBBI1_CS0_PIO_ID == PIOA_ID
00439 #define SBBI1_CS0_PE_REG        PIOA_PER
00440 #define SBBI1_CS0_OE_REG        PIOA_OER
00441 #define SBBI1_CS0_COD_REG       PIOA_CODR
00442 #define SBBI1_CS0_SOD_REG       PIOA_SODR
00443 #elif SBBI1_CS0_PIO_ID == PIOB_ID
00444 #define SBBI1_CS0_PE_REG        PIOB_PER
00445 #define SBBI1_CS0_OE_REG        PIOB_OER
00446 #define SBBI1_CS0_COD_REG       PIOB_CODR
00447 #define SBBI1_CS0_SOD_REG       PIOB_SODR
00448 #elif SBBI1_CS0_PIO_ID == PIOC_ID
00449 #define SBBI1_CS0_PE_REG        PIOC_PER
00450 #define SBBI1_CS0_OE_REG        PIOC_OER
00451 #define SBBI1_CS0_COD_REG       PIOC_CODR
00452 #define SBBI1_CS0_SOD_REG       PIOC_SODR
00453 #endif
00454 
00456 #define SBBI1_CS0_ENA() \
00457     outr(SBBI1_CS0_PE_REG, _BV(SBBI1_CS0_BIT)); \
00458     outr(SBBI1_CS0_OE_REG, _BV(SBBI1_CS0_BIT))
00459 
00460 #define SBBI1_CS0_CLR()   outr(SBBI1_CS0_COD_REG, _BV(SBBI1_CS0_BIT))
00461 
00462 #define SBBI1_CS0_SET()   outr(SBBI1_CS0_SOD_REG, _BV(SBBI1_CS0_BIT))
00463 
00464 #endif                          /* SBBI1_CS0_BIT */
00465 
00466 #ifdef SBBI1_CS1_BIT
00467 
00468 #if !defined(SBBI1_CS1_PIO_ID)
00469 #define SBBI1_CS1_PE_REG        PIO_PER
00470 #define SBBI1_CS1_OE_REG        PIO_OER
00471 #define SBBI1_CS1_COD_REG       PIO_CODR
00472 #define SBBI1_CS1_SOD_REG       PIO_SODR
00473 #elif SBBI1_CS1_PIO_ID == PIOA_ID
00474 #define SBBI1_CS1_PE_REG        PIOA_PER
00475 #define SBBI1_CS1_OE_REG        PIOA_OER
00476 #define SBBI1_CS1_COD_REG       PIOA_CODR
00477 #define SBBI1_CS1_SOD_REG       PIOA_SODR
00478 #elif SBBI1_CS1_PIO_ID == PIOB_ID
00479 #define SBBI1_CS1_PE_REG        PIOB_PER
00480 #define SBBI1_CS1_OE_REG        PIOB_OER
00481 #define SBBI1_CS1_COD_REG       PIOB_CODR
00482 #define SBBI1_CS1_SOD_REG       PIOB_SODR
00483 #elif SBBI1_CS1_PIO_ID == PIOC_ID
00484 #define SBBI1_CS1_PE_REG        PIOC_PER
00485 #define SBBI1_CS1_OE_REG        PIOC_OER
00486 #define SBBI1_CS1_COD_REG       PIOC_CODR
00487 #define SBBI1_CS1_SOD_REG       PIOC_SODR
00488 #endif
00489 
00491 #define SBBI1_CS1_ENA() \
00492     outr(SBBI1_CS1_PE_REG, _BV(SBBI1_CS1_BIT)); \
00493     outr(SBBI1_CS1_OE_REG, _BV(SBBI1_CS1_BIT))
00494 
00495 #define SBBI1_CS1_CLR()   outr(SBBI1_CS1_COD_REG, _BV(SBBI1_CS1_BIT))
00496 
00497 #define SBBI1_CS1_SET()   outr(SBBI1_CS1_SOD_REG, _BV(SBBI1_CS1_BIT))
00498 
00499 #endif                          /* SBBI1_CS1_BIT */
00500 
00501 #ifdef SBBI1_CS2_BIT
00502 
00503 #if !defined(SBBI1_CS2_PIO_ID)
00504 #define SBBI1_CS2_PE_REG        PIO_PER
00505 #define SBBI1_CS2_OE_REG        PIO_OER
00506 #define SBBI1_CS2_COD_REG       PIO_CODR
00507 #define SBBI1_CS2_SOD_REG       PIO_SODR
00508 #elif SBBI1_CS2_PIO_ID == PIOA_ID
00509 #define SBBI1_CS2_PE_REG        PIOA_PER
00510 #define SBBI1_CS2_OE_REG        PIOA_OER
00511 #define SBBI1_CS2_COD_REG       PIOA_CODR
00512 #define SBBI1_CS2_SOD_REG       PIOA_SODR
00513 #elif SBBI1_CS2_PIO_ID == PIOB_ID
00514 #define SBBI1_CS2_PE_REG        PIOB_PER
00515 #define SBBI1_CS2_OE_REG        PIOB_OER
00516 #define SBBI1_CS2_COD_REG       PIOB_CODR
00517 #define SBBI1_CS2_SOD_REG       PIOB_SODR
00518 #elif SBBI1_CS2_PIO_ID == PIOC_ID
00519 #define SBBI1_CS2_PE_REG        PIOC_PER
00520 #define SBBI1_CS2_OE_REG        PIOC_OER
00521 #define SBBI1_CS2_COD_REG       PIOC_CODR
00522 #define SBBI1_CS2_SOD_REG       PIOC_SODR
00523 #endif
00524 
00526 #define SBBI1_CS2_ENA() \
00527     outr(SBBI1_CS2_PE_REG, _BV(SBBI1_CS2_BIT)); \
00528     outr(SBBI1_CS2_OE_REG, _BV(SBBI1_CS2_BIT))
00529 
00530 #define SBBI1_CS2_CLR()   outr(SBBI1_CS2_COD_REG, _BV(SBBI1_CS2_BIT))
00531 
00532 #define SBBI1_CS2_SET()   outr(SBBI1_CS2_SOD_REG, _BV(SBBI1_CS2_BIT))
00533 
00534 #endif                          /* SBBI1_CS2_BIT */
00535 
00536 #ifdef SBBI1_CS3_BIT
00537 
00538 #if !defined(SBBI1_CS3_PIO_ID)
00539 #define SBBI1_CS3_PE_REG        PIO_PER
00540 #define SBBI1_CS3_OE_REG        PIO_OER
00541 #define SBBI1_CS3_COD_REG       PIO_CODR
00542 #define SBBI1_CS3_SOD_REG       PIO_SODR
00543 #elif SBBI1_CS3_PIO_ID == PIOA_ID
00544 #define SBBI1_CS3_PE_REG        PIOA_PER
00545 #define SBBI1_CS3_OE_REG        PIOA_OER
00546 #define SBBI1_CS3_COD_REG       PIOA_CODR
00547 #define SBBI1_CS3_SOD_REG       PIOA_SODR
00548 #elif SBBI1_CS3_PIO_ID == PIOB_ID
00549 #define SBBI1_CS3_PE_REG        PIOB_PER
00550 #define SBBI1_CS3_OE_REG        PIOB_OER
00551 #define SBBI1_CS3_COD_REG       PIOB_CODR
00552 #define SBBI1_CS3_SOD_REG       PIOB_SODR
00553 #elif SBBI1_CS3_PIO_ID == PIOC_ID
00554 #define SBBI1_CS3_PE_REG        PIOC_PER
00555 #define SBBI1_CS3_OE_REG        PIOC_OER
00556 #define SBBI1_CS3_COD_REG       PIOC_CODR
00557 #define SBBI1_CS3_SOD_REG       PIOC_SODR
00558 #endif
00559 
00561 #define SBBI1_CS3_ENA() \
00562     outr(SBBI1_CS3_PE_REG, _BV(SBBI1_CS3_BIT)); \
00563     outr(SBBI1_CS3_OE_REG, _BV(SBBI1_CS3_BIT))
00564 
00565 #define SBBI1_CS3_CLR()   outr(SBBI1_CS3_COD_REG, _BV(SBBI1_CS3_BIT))
00566 
00567 #define SBBI1_CS3_SET()   outr(SBBI1_CS3_SOD_REG, _BV(SBBI1_CS3_BIT))
00568 
00569 #endif                          /* SBBI1_CS3_BIT */
00570 
00571 #ifdef SBBI1_RST0_BIT
00572 
00573 #if !defined(SBBI1_RST0_PIO_ID)
00574 #define SBBI1_RST0_PE_REG      PIO_PER
00575 #define SBBI1_RST0_OE_REG      PIO_OER
00576 #define SBBI1_RST0_COD_REG     PIO_CODR
00577 #define SBBI1_RST0_SOD_REG     PIO_SODR
00578 #elif SBBI1_RST0_PIO_ID == PIOA_ID
00579 #define SBBI1_RST0_PE_REG      PIOA_PER
00580 #define SBBI1_RST0_OE_REG      PIOA_OER
00581 #define SBBI1_RST0_COD_REG     PIOA_CODR
00582 #define SBBI1_RST0_SOD_REG     PIOA_SODR
00583 #elif SBBI1_RST0_PIO_ID == PIOB_ID
00584 #define SBBI1_RST0_PE_REG      PIOB_PER
00585 #define SBBI1_RST0_OE_REG      PIOB_OER
00586 #define SBBI1_RST0_COD_REG     PIOB_CODR
00587 #define SBBI1_RST0_SOD_REG     PIOB_SODR
00588 #elif SBBI1_RST0_PIO_ID == PIOC_ID
00589 #define SBBI1_RST0_PE_REG      PIOC_PER
00590 #define SBBI1_RST0_OE_REG      PIOC_OER
00591 #define SBBI1_RST0_COD_REG     PIOC_CODR
00592 #define SBBI1_RST0_SOD_REG     PIOC_SODR
00593 #endif
00594 
00596 #define SBBI1_RST0_ENA() \
00597     outr(SBBI1_RST0_PE_REG, _BV(SBBI1_RST0_BIT)); \
00598     outr(SBBI1_RST0_OE_REG, _BV(SBBI1_RST0_BIT))
00599 
00600 #define SBBI1_RST0_CLR()   outr(SBBI1_RST0_COD_REG, _BV(SBBI1_RST0_BIT))
00601 
00602 #define SBBI1_RST0_SET()   outr(SBBI1_RST0_SOD_REG, _BV(SBBI1_RST0_BIT))
00603 
00604 #endif                          /* SBBI1_RST0_BIT */
00605 
00606 #ifdef SBBI1_RST1_BIT
00607 
00608 #if !defined(SBBI1_RST1_PIO_ID)
00609 #define SBBI1_RST1_PE_REG      PIO_PER
00610 #define SBBI1_RST1_OE_REG      PIO_OER
00611 #define SBBI1_RST1_COD_REG     PIO_CODR
00612 #define SBBI1_RST1_SOD_REG     PIO_SODR
00613 #elif SBBI1_RST1_PIO_ID == PIOA_ID
00614 #define SBBI1_RST1_PE_REG      PIOA_PER
00615 #define SBBI1_RST1_OE_REG      PIOA_OER
00616 #define SBBI1_RST1_COD_REG     PIOA_CODR
00617 #define SBBI1_RST1_SOD_REG     PIOA_SODR
00618 #elif SBBI1_RST1_PIO_ID == PIOB_ID
00619 #define SBBI1_RST1_PE_REG      PIOB_PER
00620 #define SBBI1_RST1_OE_REG      PIOB_OER
00621 #define SBBI1_RST1_COD_REG     PIOB_CODR
00622 #define SBBI1_RST1_SOD_REG     PIOB_SODR
00623 #elif SBBI1_RST1_PIO_ID == PIOC_ID
00624 #define SBBI1_RST1_PE_REG      PIOC_PER
00625 #define SBBI1_RST1_OE_REG      PIOC_OER
00626 #define SBBI1_RST1_COD_REG     PIOC_CODR
00627 #define SBBI1_RST1_SOD_REG     PIOC_SODR
00628 #endif
00629 
00631 #define SBBI1_RST1_ENA() \
00632     outr(SBBI1_RST1_PE_REG, _BV(SBBI1_RST1_BIT)); \
00633     outr(SBBI1_RST1_OE_REG, _BV(SBBI1_RST1_BIT))
00634 
00635 #define SBBI1_RST1_CLR()   outr(SBBI1_RST1_COD_REG, _BV(SBBI1_RST1_BIT))
00636 
00637 #define SBBI1_RST1_SET()   outr(SBBI1_RST1_SOD_REG, _BV(SBBI1_RST1_BIT))
00638 
00639 #endif                          /* SBBI1_RST1_BIT */
00640 
00641 #ifdef SBBI1_RST2_BIT
00642 
00643 #if !defined(SBBI1_RST2_PIO_ID)
00644 #define SBBI1_RST2_PE_REG      PIO_PER
00645 #define SBBI1_RST2_OE_REG      PIO_OER
00646 #define SBBI1_RST2_COD_REG     PIO_CODR
00647 #define SBBI1_RST2_SOD_REG     PIO_SODR
00648 #elif SBBI1_RST2_PIO_ID == PIOA_ID
00649 #define SBBI1_RST2_PE_REG      PIOA_PER
00650 #define SBBI1_RST2_OE_REG      PIOA_OER
00651 #define SBBI1_RST2_COD_REG     PIOA_CODR
00652 #define SBBI1_RST2_SOD_REG     PIOA_SODR
00653 #elif SBBI1_RST2_PIO_ID == PIOB_ID
00654 #define SBBI1_RST2_PE_REG      PIOB_PER
00655 #define SBBI1_RST2_OE_REG      PIOB_OER
00656 #define SBBI1_RST2_COD_REG     PIOB_CODR
00657 #define SBBI1_RST2_SOD_REG     PIOB_SODR
00658 #elif SBBI1_RST2_PIO_ID == PIOC_ID
00659 #define SBBI1_RST2_PE_REG      PIOC_PER
00660 #define SBBI1_RST2_OE_REG      PIOC_OER
00661 #define SBBI1_RST2_COD_REG     PIOC_CODR
00662 #define SBBI1_RST2_SOD_REG     PIOC_SODR
00663 #endif
00664 
00666 #define SBBI1_RST2_ENA() \
00667     outr(SBBI1_RST2_PE_REG, _BV(SBBI1_RST2_BIT)); \
00668     outr(SBBI1_RST2_OE_REG, _BV(SBBI1_RST2_BIT))
00669 
00670 #define SBBI1_RST2_CLR()   outr(SBBI1_RST2_COD_REG, _BV(SBBI1_RST2_BIT))
00671 
00672 #define SBBI1_RST2_SET()   outr(SBBI1_RST2_SOD_REG, _BV(SBBI1_RST2_BIT))
00673 
00674 #endif                          /* SBBI1_RST2_BIT */
00675 
00676 #ifdef SBBI1_RST3_BIT
00677 
00678 #if !defined(SBBI1_RST3_PIO_ID)
00679 #define SBBI1_RST3_PE_REG      PIO_PER
00680 #define SBBI1_RST3_OE_REG      PIO_OER
00681 #define SBBI1_RST3_COD_REG     PIO_CODR
00682 #define SBBI1_RST3_SOD_REG     PIO_SODR
00683 #elif SBBI1_RST3_PIO_ID == PIOA_ID
00684 #define SBBI1_RST3_PE_REG      PIOA_PER
00685 #define SBBI1_RST3_OE_REG      PIOA_OER
00686 #define SBBI1_RST3_COD_REG     PIOA_CODR
00687 #define SBBI1_RST3_SOD_REG     PIOA_SODR
00688 #elif SBBI1_RST3_PIO_ID == PIOB_ID
00689 #define SBBI1_RST3_PE_REG      PIOB_PER
00690 #define SBBI1_RST3_OE_REG      PIOB_OER
00691 #define SBBI1_RST3_COD_REG     PIOB_CODR
00692 #define SBBI1_RST3_SOD_REG     PIOB_SODR
00693 #elif SBBI1_RST3_PIO_ID == PIOC_ID
00694 #define SBBI1_RST3_PE_REG      PIOC_PER
00695 #define SBBI1_RST3_OE_REG      PIOC_OER
00696 #define SBBI1_RST3_COD_REG     PIOC_CODR
00697 #define SBBI1_RST3_SOD_REG     PIOC_SODR
00698 #endif
00699 
00701 #define SBBI1_RST3_ENA() \
00702     outr(SBBI1_RST3_PE_REG, _BV(SBBI1_RST3_BIT)); \
00703     outr(SBBI1_RST3_OE_REG, _BV(SBBI1_RST3_BIT))
00704 
00705 #define SBBI1_RST3_CLR()   outr(SBBI1_RST3_COD_REG, _BV(SBBI1_RST3_BIT))
00706 
00707 #define SBBI1_RST3_SET()   outr(SBBI1_RST3_SOD_REG, _BV(SBBI1_RST3_BIT))
00708 
00709 #endif                          /* SBBI1_RST3_BIT */
00710 
00711 #ifdef SBBI1_SCK_BIT
00712 
00713 #if !defined(SBBI1_SCK_PIO_ID)
00714 #define SBBI1_SCK_PE_REG        PIO_PER
00715 #define SBBI1_SCK_OE_REG        PIO_OER
00716 #define SBBI1_SCK_COD_REG       PIO_CODR
00717 #define SBBI1_SCK_SOD_REG       PIO_SODR
00718 #elif SBBI1_SCK_PIO_ID == PIOA_ID
00719 #define SBBI1_SCK_PE_REG        PIOA_PER
00720 #define SBBI1_SCK_OE_REG        PIOA_OER
00721 #define SBBI1_SCK_COD_REG       PIOA_CODR
00722 #define SBBI1_SCK_SOD_REG       PIOA_SODR
00723 #elif SBBI1_SCK_PIO_ID == PIOB_ID
00724 #define SBBI1_SCK_PE_REG        PIOB_PER
00725 #define SBBI1_SCK_OE_REG        PIOB_OER
00726 #define SBBI1_SCK_COD_REG       PIOB_CODR
00727 #define SBBI1_SCK_SOD_REG       PIOB_SODR
00728 #elif SBBI1_SCK_PIO_ID == PIOC_ID
00729 #define SBBI1_SCK_PE_REG        PIOC_PER
00730 #define SBBI1_SCK_OE_REG        PIOC_OER
00731 #define SBBI1_SCK_COD_REG       PIOC_CODR
00732 #define SBBI1_SCK_SOD_REG       PIOC_SODR
00733 #endif
00734 
00736 #define SBBI1_SCK_ENA() \
00737     outr(SBBI1_SCK_PE_REG, _BV(SBBI1_SCK_BIT)); \
00738     outr(SBBI1_SCK_OE_REG, _BV(SBBI1_SCK_BIT))
00739 
00740 #define SBBI1_SCK_CLR()     outr(SBBI1_SCK_COD_REG, _BV(SBBI1_SCK_BIT))
00741 
00742 #define SBBI1_SCK_SET()     outr(SBBI1_SCK_SOD_REG, _BV(SBBI1_SCK_BIT))
00743 
00744 #ifdef SBBI1_MOSI_BIT
00745 
00746 #if !defined(SBBI1_MOSI_PIO_ID)
00747 #define SBBI1_MOSI_PE_REG       PIO_PER
00748 #define SBBI1_MOSI_OE_REG       PIO_OER
00749 #define SBBI1_MOSI_COD_REG      PIO_CODR
00750 #define SBBI1_MOSI_SOD_REG      PIO_SODR
00751 #elif SBBI1_MOSI_PIO_ID == PIOA_ID
00752 #define SBBI1_MOSI_PE_REG       PIOA_PER
00753 #define SBBI1_MOSI_OE_REG       PIOA_OER
00754 #define SBBI1_MOSI_COD_REG      PIOA_CODR
00755 #define SBBI1_MOSI_SOD_REG      PIOA_SODR
00756 #elif SBBI1_MOSI_PIO_ID == PIOB_ID
00757 #define SBBI1_MOSI_PE_REG       PIOB_PER
00758 #define SBBI1_MOSI_OE_REG       PIOB_OER
00759 #define SBBI1_MOSI_COD_REG      PIOB_CODR
00760 #define SBBI1_MOSI_SOD_REG      PIOB_SODR
00761 #elif SBBI1_MOSI_PIO_ID == PIOC_ID
00762 #define SBBI1_MOSI_PE_REG       PIOC_PER
00763 #define SBBI1_MOSI_OE_REG       PIOC_OER
00764 #define SBBI1_MOSI_COD_REG      PIOC_CODR
00765 #define SBBI1_MOSI_SOD_REG      PIOC_SODR
00766 #endif
00767 
00769 #define SBBI1_MOSI_ENA() \
00770     outr(SBBI1_MOSI_PE_REG, _BV(SBBI1_MOSI_BIT)); \
00771     outr(SBBI1_MOSI_OE_REG, _BV(SBBI1_MOSI_BIT))
00772 
00773 #define SBBI1_MOSI_CLR()    outr(SBBI1_MOSI_COD_REG, _BV(SBBI1_MOSI_BIT))
00774 
00775 #define SBBI1_MOSI_SET()    outr(SBBI1_MOSI_SOD_REG, _BV(SBBI1_MOSI_BIT))
00776 
00777 #else                           /* SBBI1_MOSI_BIT */
00778 
00779 #define SBBI1_MOSI_ENA()
00780 #define SBBI1_MOSI_CLR()
00781 #define SBBI1_MOSI_SET()
00782 
00783 #endif                          /* SBBI1_MOSI_BIT */
00784 
00785 #ifdef SBBI1_MISO_BIT
00786 
00787 #if !defined(SBBI1_MISO_PIO_ID)
00788 #define SBBI1_MISO_PE_REG       PIO_PER
00789 #define SBBI1_MISO_OD_REG       PIO_ODR
00790 #define SBBI1_MISO_PDS_REG      PIO_PDSR
00791 #elif SBBI1_MISO_PIO_ID == PIOA_ID
00792 #define SBBI1_MISO_PE_REG       PIOA_PER
00793 #define SBBI1_MISO_OD_REG       PIOA_ODR
00794 #define SBBI1_MISO_PDS_REG      PIOA_PDSR
00795 #elif SBBI1_MISO_PIO_ID == PIOB_ID
00796 #define SBBI1_MISO_PE_REG       PIOB_PER
00797 #define SBBI1_MISO_OD_REG       PIOB_ODR
00798 #define SBBI1_MISO_PDS_REG      PIOB_PDSR
00799 #elif SBBI1_MISO_PIO_ID == PIOC_ID
00800 #define SBBI1_MISO_PE_REG       PIOC_PER
00801 #define SBBI1_MISO_OD_REG       PIOC_ODR
00802 #define SBBI1_MISO_PDS_REG      PIOC_PDSR
00803 #endif
00804 
00806 #define SBBI1_MISO_ENA() \
00807     outr(SBBI1_MISO_PE_REG, _BV(SBBI1_MISO_BIT)); \
00808     outr(SBBI1_MISO_OD_REG, _BV(SBBI1_MISO_BIT))
00809 
00810 #define SBBI1_MISO_TST()    ((inr(SBBI1_MISO_PDS_REG) & _BV(SBBI1_MISO_BIT)) == _BV(SBBI1_MISO_BIT))
00811 
00812 #else                           /* SBBI1_MISO_BIT */
00813 
00814 #define SBBI1_MISO_ENA()
00815 #define SBBI1_MISO_TST()   0
00816 
00817 #endif                          /* SBBI1_MISO_BIT */
00818 
00819 #endif                          /* SBBI1_SCK_BIT */
00820 
00821 #endif                          /* MCU */
00822 
00823 #define SBBI1_INIT() \
00824 { \
00825     SBBI1_SCK_CLR(); \
00826     SBBI1_SCK_ENA(); \
00827     SBBI1_MOSI_CLR(); \
00828     SBBI1_MOSI_ENA(); \
00829     SBBI1_MISO_ENA(); \
00830 }
00831 
00832 #endif

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