ostimer_at91.c

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00001 /*
00002  * Copyright (C) 2001-2007 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  *
00032  */
00033 
00034 /*
00035  * $Log: ostimer_at91.c,v $
00036  * Revision 1.22  2008/08/22 09:25:33  haraldkipp
00037  * Clock value caching and new functions NutArchClockGet, NutClockGet and
00038  * NutClockSet added.
00039  *
00040  * Revision 1.21  2008/08/11 06:59:12  haraldkipp
00041  * BSD types replaced by stdint types (feature request #1282721).
00042  *
00043  * Revision 1.20  2008/08/06 12:51:01  haraldkipp
00044  * Added support for Ethernut 5 (AT91SAM9XE reference design).
00045  *
00046  * Revision 1.19  2008/07/08 08:25:04  haraldkipp
00047  * NutDelay is no more architecture specific.
00048  * Number of loops per millisecond is configurable or will be automatically
00049  * determined.
00050  * A new function NutMicroDelay provides shorter delays.
00051  *
00052  * Revision 1.18  2008/02/15 16:58:41  haraldkipp
00053  * Spport for AT91SAM7SE512 added.
00054  *
00055  * Revision 1.17  2007/10/04 19:59:47  olereinhardt
00056  * Support for SAM7S256 added
00057  *
00058  * Revision 1.16  2007/08/17 10:44:37  haraldkipp
00059  * Timer enable/disable macro replaces previous global interrupt
00060  * enable/disable or function calling.
00061  *
00062  * Revision 1.15  2007/04/12 09:03:48  haraldkipp
00063  * Miserable delay routine will now honor milliseconds on a 73 MHz ARM.
00064  *
00065  * Revision 1.14  2007/02/15 16:14:39  haraldkipp
00066  * Periodic interrupt timer can be used as a system clock.
00067  *
00068  * Revision 1.13  2006/10/08 16:48:07  haraldkipp
00069  * Documentation fixed
00070  *
00071  * Revision 1.12  2006/09/29 12:37:36  haraldkipp
00072  * Now working correctly, if the CPU is running on the second PLL.
00073  *
00074  * Revision 1.11  2006/09/05 12:27:25  haraldkipp
00075  * PLL clock calculation re-arranged to prevent 32-bit overflow.
00076  * NutTimerMillisToTicks() returned wrong result. Shane Buckham reported
00077  * this long time ago. Many thanks. Needs to be fixed for other platforms too.
00078  *
00079  * Revision 1.10  2006/08/31 18:59:50  haraldkipp
00080  * Added support for the AT91SAM9260. We now determine between processor and
00081  * master clock. A new API function At91GetMasterClock() had been added to
00082  * query the latter.
00083  *
00084  * Revision 1.9  2006/08/05 12:00:01  haraldkipp
00085  * NUT_CPU_FREQ did not override AT91_PLL_MAINCK or NUT_PLL_CPUCLK. Fixed.
00086  *
00087  * Revision 1.8  2006/07/26 11:17:16  haraldkipp
00088  * Defining AT91_PLL_MAINCK will automatically determine SAM7X clock by
00089  * reading PLL settings.
00090  *
00091  * Revision 1.7  2006/07/05 07:59:41  haraldkipp
00092  * Daidai's support for AT91SAM7X added.
00093  *
00094  * Revision 1.6  2006/06/28 17:10:35  haraldkipp
00095  * Include more general header file for ARM.
00096  *
00097  * Revision 1.5  2006/03/02 19:53:01  haraldkipp
00098  * Bugfix. The system timer configuration was based on a fixed MCU clock
00099  * of 66.6 MHz. Now it uses the actual frequency.
00100  *
00101  * Revision 1.4  2006/01/05 16:46:25  haraldkipp
00102  * Added support for CY22393 programmable clock chip.
00103  *
00104  * Revision 1.3  2005/10/24 08:34:13  haraldkipp
00105  * Moved AT91 family specific header files to sbudir arm.
00106  * Use new IRQ API.
00107  *
00108  * Revision 1.2  2005/08/02 17:46:45  haraldkipp
00109  * Major API documentation update.
00110  *
00111  * Revision 1.1  2005/07/26 18:02:26  haraldkipp
00112  * Moved from dev.
00113  *
00114  * Revision 1.2  2005/07/20 09:17:26  haraldkipp
00115  * Default NUT_CPU_FREQ and NUT_TICK_FREQ added.
00116  * NutTimerIntr() removed, because we can use the hardware independent code.
00117  *
00118  * Revision 1.1  2005/05/27 17:16:40  drsung
00119  * Moved the file.
00120  *
00121  * Revision 1.5  2005/04/05 17:50:46  haraldkipp
00122  * Use register names in gba.h.
00123  *
00124  * Revision 1.4  2004/11/08 19:16:37  haraldkipp
00125  * Hacked in Gameboy timer support
00126  *
00127  * Revision 1.3  2004/10/03 18:42:21  haraldkipp
00128  * No GBA support yet, but let the compiler run through
00129  *
00130  * Revision 1.2  2004/09/08 10:19:39  haraldkipp
00131  * Running on AT91 and S3C, thanks to James Tyou
00132  *
00133  */
00134 
00135 #include <cfg/os.h>
00136 #include <cfg/clock.h>
00137 #include <arch/arm.h>
00138 #include <dev/irqreg.h>
00139 #include <sys/timer.h>
00140 
00141 #ifndef NUT_CPU_FREQ
00142 #ifdef NUT_PLL_CPUCLK
00143 #include <dev/cy2239x.h>
00144 #elif !defined(AT91_PLL_MAINCK)
00145 #define NUT_CPU_FREQ    73728000UL
00146 #endif /* !AT91_PLL_MAINCK */
00147 #endif /* !NUT_CPU_FREQ */
00148 
00149 
00154 
00155 #ifndef NUT_TICK_FREQ
00156 #define NUT_TICK_FREQ   1000UL
00157 #endif
00158 
00170 void NutRegisterTimer(void (*handler) (void *))
00171 {
00172 #if defined(NUT_TICK_AT91PIT)
00173 
00174     /* Set compare value for the specified tick frequency. */
00175 #if defined(AT91_PLL_MAINCK)
00176     outr(PIT_MR, (At91GetMasterClock() / (16 * NUT_TICK_FREQ) - 1) << PIT_PIV_LSB);
00177 #else
00178     outr(PIT_MR, (NutGetCpuClock() / (16 * NUT_TICK_FREQ) - 1) << PIT_PIV_LSB);
00179 #endif
00180 
00181     /* Register system interrupt handler. */
00182     NutRegisterSysIrqHandler(&syssig_PIT, handler, NULL);
00183     /* Enable interval timer and interval timer interrupts */
00184     outr(PIT_MR, inr(PIT_MR) | PIT_PITEN | PIT_PITIEN);
00185     NutSysIrqEnable(&syssig_PIT);
00186     inr(PIT_PIVR);
00187 
00188 #else   /* NUT_TICK_AT91PIT */
00189 
00190     int dummy;
00191 
00192 #if defined(MCU_AT91SAM7X256) || defined(MCU_AT91SAM7S256) || defined(MCU_AT91SAM9260) || defined (MCU_AT91SAM7SE512) || defined(MCU_AT91SAM9XE512)
00193     /* Enable TC0 clock. */
00194     outr(PMC_PCER, _BV(TC0_ID));
00195 #endif
00196 
00197     /* Disable the Clock Counter */
00198     outr(TC0_CCR, TC_CLKDIS);
00199     /* Disable all interrupts */
00200     outr(TC0_IDR, 0xFFFFFFFF);
00201     /* Clear the status register. */
00202     dummy = inr(TC0_SR);
00203     /* Select divider and compare trigger */
00204     outr(TC0_CMR, TC_CLKS_MCK32 | TC_CPCTRG);
00205     /* Enable the Clock counter */
00206     outr(TC0_CCR, TC_CLKEN);
00207     /* Validate the RC compare interrupt */
00208     outr(TC0_IER, TC_CPCS);
00209 
00210     /* Register timer interrupt handler. */
00211     NutRegisterIrqHandler(&sig_TC0, handler, 0);
00212     /* Set to lowest priority. */
00213     NutIrqSetPriority(&sig_TC0, 0);
00214 
00215     /* Enable timer 0 interrupts */
00216     NutIrqEnable(&sig_TC0);
00217     //outr(AIC_IECR, _BV(TC0_ID));
00218 
00219     /* Set compare value for 1 ms. */
00220 #if defined(AT91_PLL_MAINCK)
00221     outr(TC0_RC, At91GetMasterClock() / (32 * NUT_TICK_FREQ));
00222 #else
00223     outr(TC0_RC, NutGetCpuClock() / (32 * NUT_TICK_FREQ));
00224 #endif
00225 
00226     /* Software trigger starts the clock. */
00227     outr(TC0_CCR, TC_SWTRG);
00228 
00229 #endif  /* NUT_TICK_AT91PIT */
00230 }
00231 
00232 #if defined(AT91_PLL_MAINCK)
00233 
00234 #if !defined(AT91_SLOW_CLOCK)
00235 /* This is just a guess and may be completely wrong. */
00236 #define AT91_SLOW_CLOCK 32000
00237 #endif
00238 
00246 static u_int At91GetPllClock(int plla)
00247 {
00248     u_int rc;
00249     u_int pllr;
00250     u_int divider;
00251 
00252     /* 
00253      * The main oscillator clock frequency is specified by the
00254      * configuration. It's usually equal to the on-board crystal.
00255      */
00256     rc = AT91_PLL_MAINCK;
00257 
00258     /* Retrieve the clock generator register of the selected PLL. */
00259 #if defined(CKGR_PLLAR) && defined(CKGR_PLLBR)
00260     pllr = plla ? inr(CKGR_PLLAR) : inr(CKGR_PLLBR);
00261 #else
00262     pllr = inr(CKGR_PLLR);
00263 #endif
00264 
00265     /* Extract the divider value. */
00266     divider = (pllr & CKGR_DIV) >> CKGR_DIV_LSB;
00267 
00268     if (divider) {
00269         rc /= divider;
00270         rc *= ((pllr & CKGR_MUL) >> CKGR_MUL_LSB) + 1;
00271     }
00272     return rc;
00273 }
00274 
00280 static uint32_t At91GetProcessorClock(void)
00281 {
00282     u_int rc = 0;
00283     u_int mckr = inr(PMC_MCKR);
00284 
00285     /* Determine the clock source. */
00286     switch(mckr & PMC_CSS) {
00287     case PMC_CSS_SLOW_CLK:
00288         /* Slow clock selected. */
00289         rc = AT91_SLOW_CLOCK;
00290         break;
00291     case PMC_CSS_MAIN_CLK:
00292         /* Main clock selected. */
00293         rc = AT91_PLL_MAINCK;
00294         break;
00295 #if defined(PMC_CSS_PLLA_CLK)
00296     case PMC_CSS_PLLA_CLK:
00297         /* PLL A clock selected. */
00298         rc = At91GetPllClock(1);
00299         break;
00300 #endif
00301 #if defined(PMC_CSS_PLLB_CLK)
00302     case PMC_CSS_PLLB_CLK:
00303         /* PLL (B) clock selected. */
00304         rc = At91GetPllClock(0);
00305         break;
00306 #elif defined(PMC_CSS_PLL_CLK)
00307     case PMC_CSS_PLL_CLK:
00308         /* PLL (B) clock selected. */
00309         rc = At91GetPllClock(0);
00310         break;
00311 #endif
00312     }
00313 
00314     /* Handle pre-scaling. */
00315     mckr &= PMC_PRES;
00316     mckr >>= PMC_PRES_LSB;
00317     if (mckr < 7) {
00318         rc /= _BV(mckr);
00319     }
00320     else {
00321         rc = 0;
00322     }
00323     return rc;
00324 }
00325 
00333 uint32_t At91GetMasterClock(void)
00334 {
00335     return NutArchClockGet(NUT_HWCLK_PERIPHERAL);
00336 }
00337 
00338 #endif /* AT91_PLL_MAINCK */
00339 
00340 #ifndef NUT_CPU_FREQ
00341 
00350 uint32_t NutArchClockGet(int idx)
00351 {
00352     uint32_t rc = 0;
00353 
00354     if (idx == NUT_HWCLK_CPU) {
00355 #if defined(AT91_PLL_MAINCK)
00356         rc = At91GetProcessorClock();
00357 #elif defined(NUT_PLL_CPUCLK)
00358         rc = Cy2239xGetFreq(NUT_PLL_CPUCLK, 7);
00359 #else
00360 #warning "No CPU Clock defined"
00361 #endif
00362     }
00363 #if defined(AT91_PLL_MAINCK)
00364     if (idx == NUT_HWCLK_PERIPHERAL) {
00365         rc = At91GetProcessorClock();
00366 #if defined(PMC_MDIV)
00367         switch(inr(PMC_MCKR) & PMC_MDIV) {
00368         case PMC_MDIV_2:
00369             rc /= 2;
00370             break;
00371         case PMC_MDIV_4:
00372             rc /= 4;
00373             break;
00374         }
00375 #endif
00376     }
00377 #endif
00378     return rc;
00379 }
00380 #endif
00381 
00387 uint32_t NutGetTickClock(void)
00388 {
00389     u_int rc;
00390 
00391 #if defined(NUT_TICK_AT91PIT)
00392     rc = ((inr(PIT_MR) & PIT_PIV) + 1) * 16;
00393 #else
00394     rc = inr(TC0_RC) * 32;
00395 #endif
00396 
00397     if (rc) {
00398 #if defined(AT91_PLL_MAINCK)
00399         return At91GetMasterClock() / rc;
00400 #else
00401         return NutGetCpuClock() / rc;
00402 #endif
00403     }
00404     return NUT_TICK_FREQ;
00405 }
00406 
00410 uint32_t NutTimerMillisToTicks(uint32_t ms)
00411 {
00412     return (ms * NutGetTickClock()) / 1000;
00413 }
00414 

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