00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032
00033
00034
00035
00036
00037
00038
00039
00040
00041
00042
00043
00044
00045
00046
00047
00048
00049
00050
00051
00052
00053
00054
00055
00056
00057
00058
00059
00060
00061
00062
00063
00064
00065
00066
00067
00068
00069
00070
00071
00072
00073
00074
00075
00076
00077
00078
00079
00080
00081
00082
00083
00084
00085
00086
00087
00088
00089
00090
00091
00092
00093
00094
00095
00096
00097
00098
00099
00100
00101
00102
00103
00104
00105
00106
00107
00108
00109
00110
00111
00112
00113
00114
00115
00116
00117
00118
00119
00120
00121
00122
00123
00124
00125
00126
00127
00128
00129
00130
00131
00132
00133
00134
00135
00136
00137
00138
00139
00140
00141
00142
00143 #include <sys/thread.h>
00144 #include <sys/heap.h>
00145 #include <cfg/memory.h>
00146 #include <cfg/os.h>
00147 #include <cfg/arch/avr.h>
00148 #include <cfg/arch.h>
00149
00154
00155 #ifdef NUTXMEM_SIZE
00156
00159 #define NUTMEM_END (uint16_t)(NUTXMEM_START + (uint16_t)NUTXMEM_SIZE - 1U)
00160
00161 #else
00162
00168 #define NUTMEM_END (uint16_t)(NUTMEM_START + (uint16_t)NUTMEM_SIZE - 1U)
00169
00170 #endif
00171
00172 #ifndef NUT_THREAD_MAINSTACK
00173 #define NUT_THREAD_MAINSTACK 1024
00174 #endif
00175
00176 #ifndef NUT_THREAD_IDLESTACK
00177
00178 #define NUT_THREAD_IDLESTACK 128
00179 #endif
00180
00181 #ifdef NUTMEM_RESERVED
00182
00192 uint8_t nutmem_onchip[NUTMEM_RESERVED];
00193 #endif
00194
00195
00196 #if defined(__GNUC__) && defined(__AVR_ENHANCED__)
00197 uint8_t idle_sleep_mode = SLEEP_MODE_NONE;
00198
00199
00200 #if defined(SMCR)
00201 #define AVR_SLEEP_CTRL_REG SMCR
00202 #else
00203 #define AVR_SLEEP_CTRL_REG MCUCR
00204 #endif
00205
00206 #endif
00207
00208
00209
00210
00211
00212 #if defined(RTL_EESK_BIT) && defined(__GNUC__)
00213
00214 #ifndef RTL_BASE_ADDR
00215 #define RTL_BASE_ADDR 0x8300
00216 #endif
00217 #define NIC_CR _MMIO_BYTE(RTL_BASE_ADDR)
00218 #define NIC_EE _MMIO_BYTE(RTL_BASE_ADDR + 1)
00219
00220 #if (RTL_EEMU_AVRPORT == AVRPORTB)
00221 #define RTL_EEMU_PORT PORTB
00222 #define RTL_EEMU_DDR DDRB
00223
00224 #elif (RTL_EEMU_AVRPORT == AVRPORTD)
00225 #define RTL_EEMU_PORT PORTD
00226 #define RTL_EEMU_DDR DDRD
00227
00228 #elif (RTL_EEMU_AVRPORT == AVRPORTE)
00229 #define RTL_EEMU_PORT PORTE
00230 #define RTL_EEMU_DDR DDRE
00231
00232 #elif (RTL_EEMU_AVRPORT == AVRPORTF)
00233 #define RTL_EEMU_PORT PORTF
00234 #define RTL_EEMU_DDR DDRF
00235
00236 #else
00237 #define RTL_EE_MEMBUS
00238 #define RTL_EEMU_PORT PORTC
00239 #define RTL_EEMU_DDR DDRC
00240
00241 #endif
00242
00243 #if (RTL_EEDO_AVRPORT == AVRPORTB)
00244 #define RTL_EEDO_PORT PORTB
00245 #define RTL_EEDO_DDR DDRB
00246
00247 #elif (RTL_EEDO_AVRPORT == AVRPORTD)
00248 #define RTL_EEDO_PORT PORTD
00249 #define RTL_EEDO_DDR DDRD
00250
00251 #elif (RTL_EEDO_AVRPORT == AVRPORTE)
00252 #define RTL_EEDO_PORT PORTE
00253 #define RTL_EEDO_DDR DDRE
00254
00255 #elif (RTL_EEDO_AVRPORT == AVRPORTF)
00256 #define RTL_EEDO_PORT PORTF
00257 #define RTL_EEDO_DDR DDRF
00258
00259 #else
00260 #define RTL_EE_MEMBUS
00261 #define RTL_EEDO_PORT PORTC
00262 #define RTL_EEDO_DDR DDRC
00263
00264 #endif
00265
00266 #if (RTL_EESK_AVRPORT == AVRPORTB)
00267 #define RTL_EESK_PIN PINB
00268 #define RTL_EESK_DDR DDRB
00269
00270 #elif (RTL_EESK_AVRPORT == AVRPORTD)
00271 #define RTL_EESK_PIN PIND
00272 #define RTL_EESK_DDR DDRD
00273
00274 #elif (RTL_EESK_AVRPORT == AVRPORTE)
00275 #define RTL_EESK_PIN PINE
00276 #define RTL_EESK_DDR DDRE
00277
00278 #elif (RTL_EESK_AVRPORT == AVRPORTF)
00279 #define RTL_EESK_PIN PINF
00280 #define RTL_EESK_DDR DDRF
00281
00282 #else
00283 #define RTL_EE_MEMBUS
00284 #define RTL_EESK_PIN PINC
00285 #define RTL_EESK_DDR DDRC
00286
00287 #endif
00288 #endif
00289
00290 #ifdef __GNUC__
00291
00292
00293
00294
00295
00296
00297
00298
00299
00300
00301
00302
00303
00304
00305
00306
00307
00308
00309
00310
00311
00312 void NutInit(void) __attribute__ ((naked)) __attribute__ ((section(".init8")));
00313 extern void NutAppMain(void *arg) __attribute__ ((noreturn));
00314 #else
00315 extern void main(void *);
00316 #endif
00317
00318
00319
00320
00321 #if defined(__GNUC__) && defined(NUTXMEM_SIZE)
00322
00323
00324
00325
00326 static void NutInitXRAM(void) __attribute__ ((naked, section(".init1"), used));
00327 void NutInitXRAM(void)
00328 {
00329 #if defined(__AVR_AT90CAN128__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)
00330
00331
00332
00333
00334 #ifdef NUT_3WAITSTATES
00335 XMCRA = _BV(SRE) | _BV(SRL2) | _BV(SRW00) | _BV(SRW10) | _BV(SRW11);
00336 #else
00337 XMCRA = _BV(SRE) | _BV(SRW10);
00338 #endif
00339
00340 #elif defined(__AVR_ATmega128__)
00341
00342 MCUCR = _BV(SRE) | _BV(SRW10);
00343
00344
00345
00346
00347
00348 #ifdef NUT_3WAITSTATES
00349 XMCRA |= _BV(SRL2) | _BV(SRW00) | _BV(SRW11);
00350 XMCRB = 0;
00351 #endif
00352
00353 #else
00354 MCUCR = _BV(SRE) | _BV(SRW);
00355 #endif
00356 }
00357
00358 #endif
00359
00360
00361 #if defined(RTL_EESK_BIT) && defined(__GNUC__) && defined(NUTXMEM_SIZE)
00362
00363
00364
00365
00366
00367
00368
00369
00370
00371
00372
00373 static void FakeNicEeprom(void) __attribute__ ((naked, section(".init1"), used));
00374 void FakeNicEeprom(void)
00375 {
00376
00377
00378
00379
00380 #ifdef RTL_EEMU_BIT
00381 sbi(RTL_EEMU_PORT, RTL_EEMU_BIT);
00382 sbi(RTL_EEMU_DDR, RTL_EEMU_BIT);
00383 #endif
00384 sbi(RTL_EEDO_PORT, RTL_EEDO_BIT);
00385 sbi(RTL_EEDO_DDR, RTL_EEDO_BIT);
00386
00387
00388 NIC_CR = 0xE1;
00389 NIC_EE = 0x40;
00390
00391
00392 #ifdef RTL_EE_MEMBUS
00393 cbi(MCUCR, SRE);
00394 #endif
00395
00396
00397
00398
00399
00400
00401 __asm__ __volatile__("\n"
00402 "EmuLoop: " "\n"
00403 " ldi r24, 0 " "\n"
00404 " ldi r25, 0 " "\n"
00405 " sbis %0, %1 " "\n"
00406 " rjmp EmuClkClr " "\n"
00407 "EmuClkSet: " "\n"
00408 " adiw r24, 1 " "\n"
00409 " breq EmuDone " "\n"
00410 " sbis %0, %1 " "\n"
00411 " rjmp EmuLoop " "\n"
00412 " rjmp EmuClkSet " "\n"
00413 "EmuClkClr: " "\n"
00414 " adiw r24, 1 " "\n"
00415 " breq EmuDone " "\n"
00416 " sbic %0, %1 " "\n"
00417 " rjmp EmuLoop " "\n"
00418 " rjmp EmuClkClr " "\n"
00419 "EmuDone: \n\t"
00420 :
00421 :"I"(_SFR_IO_ADDR(RTL_EESK_PIN)),
00422 "I"(RTL_EESK_BIT)
00423 :"r24", "r25");
00424
00425
00426 #ifdef RTL_EE_MEMBUS
00427 sbi(MCUCR, SRE);
00428 #endif
00429
00430
00431 #ifdef RTL_EEMU_BIT
00432 cbi(RTL_EEMU_PORT, RTL_EEMU_BIT);
00433 cbi(RTL_EEMU_DDR, RTL_EEMU_BIT);
00434 #endif
00435 cbi(RTL_EEDO_PORT, RTL_EEDO_BIT);
00436 cbi(RTL_EEDO_DDR, RTL_EEDO_BIT);
00437 }
00438
00439 #endif
00440
00452 #if defined(__GNUC__) && defined(__AVR_ENHANCED__)
00453 uint8_t NutThreadSetSleepMode(uint8_t mode)
00454 {
00455 uint8_t old_mode = idle_sleep_mode;
00456 idle_sleep_mode = mode;
00457 return old_mode;
00458 }
00459 #endif
00460
00466 THREAD(NutIdle, arg)
00467 {
00468 #if defined(__GNUC__) && defined(__AVR_ENHANCED__)
00469 uint8_t sleep_mode;
00470 #endif
00471 #ifdef IDLE_HEARTBEAT_BIT
00472 uint8_t beat = 0;
00473 #endif
00474
00475
00476 NutTimerInit();
00477
00478
00479 NutThreadCreate("main", main, 0,
00480 (NUT_THREAD_MAINSTACK * NUT_THREAD_STACK_MULT) + NUT_THREAD_STACK_ADD);
00481
00482
00483
00484
00485
00486
00487 NutThreadSetPriority(254);
00488 for (;;) {
00489 NutThreadYield();
00490 NutThreadDestroy();
00491
00492 #ifdef IDLE_HEARTBEAT_BIT
00493 if ((beat = !beat) == 0) {
00494
00495 cbi(IDLE_HEARTBEAT_PORT, IDLE_HEARTBEAT_BIT);
00496 }
00497 else {
00498 sbi(IDLE_HEARTBEAT_PORT, IDLE_HEARTBEAT_BIT);
00499 }
00500 sbi(IDLE_HEARTBEAT_DDR, IDLE_HEARTBEAT_BIT);
00501 #endif
00502
00503 #if defined(__GNUC__) && defined(__AVR_ENHANCED__)
00504 if (idle_sleep_mode != SLEEP_MODE_NONE) {
00505 sleep_mode = AVR_SLEEP_CTRL_REG & _SLEEP_MODE_MASK;
00506 set_sleep_mode(idle_sleep_mode);
00507 #ifdef IDLE_THREAD_ADC_OFF
00508 uint8_t adc = bit_is_set(ADCSR, ADEN);
00509 cbi(ADCSR, ADEN);
00510 #endif
00511 #ifdef IDLE_THREAD_BUSKEEPER_OFF
00512 uint8_t bitkeeper = bit_is_set(XMCRB, XMBK);
00513 cbi(XMCRB, XMBK);
00514 #endif
00515
00516
00517 AVR_SLEEP_CTRL_REG |= _BV(SE);
00518 __asm__ __volatile__ ("sleep" "\n\t" :: );
00519 AVR_SLEEP_CTRL_REG &= ~_BV(SE);
00520 #ifdef IDLE_THREAD_ADC_OFF
00521 if (bitkeeper) {
00522 sbi(XMCRB, XMBK);
00523 }
00524 #endif
00525 #ifdef IDLE_THREAD_BUSKEEPER_OFF
00526 if (adc) {
00527 sbi(ADCSR, ADEN);
00528 }
00529 #endif
00530 set_sleep_mode(sleep_mode);
00531 }
00532 #endif
00533 }
00534 }
00535
00536 #if defined(__GNUC__)
00537 static void NutInitSP(void) __attribute__ ((naked, section (".init5"), used));
00538 void NutInitSP(void)
00539 {
00540 #if defined (__AVR_AT90CAN128__)
00541
00542 #else
00543
00544
00545
00546 SP = (uint16_t)(NUTMEM_END);
00547 #endif
00548 }
00549 #endif
00550
00551 #if defined(__GNUC__)
00552 static void NutInitHeap(void) __attribute__ ((naked, section (".init5"), used));
00553 #endif
00554 void NutInitHeap()
00555 {
00556 #if defined (NUTMEM_STACKHEAP)
00557 NutStackAdd((void *) NUTMEM_START, NUTMEM_STACKHEAP);
00558 #endif
00559
00560
00561
00562
00563
00564
00565 if ((uint16_t)NUTMEM_END - (uint16_t) (&__heap_start) > 384) {
00566 NutHeapAdd(&__heap_start, (uint16_t) NUTMEM_END - 256 - (uint16_t) (&__heap_start));
00567 }
00568 }
00569
00570 #if defined(__GNUC__)
00571 static void NutCustomInit(void) __attribute__ ((naked, section (".init1"), used));
00572 #endif
00573
00582 void NutCustomInit(void)
00583
00584
00585
00586 #if defined(MMNET02) || defined(MMNET03) || defined(MMNET04) ||\
00587 defined(MMNET102) || defined(MMNET103) || defined(MMNET104)
00588 {
00589 volatile uint8_t *breg = (uint8_t *)((size_t)-1 & ~0xFF);
00590
00591 *(breg + 1) = 0x01;
00592
00593
00594 outp(7, UBRR);
00595 outp(7, UBRR1L);
00596 }
00597
00598
00599
00600 #elif defined(ARTHERNET1)
00601 {
00602
00603
00604
00605
00606
00607 MCUCR = _BV(SRE);
00608 XMCRA |= _BV(SRL0) | _BV(SRW01) | _BV(SRW00);
00609 XMCRB = 0;
00610
00611 *((volatile uint8_t *)(ARTHERCPLDSTART)) = 0x10;
00612 *((volatile uint8_t *)(ARTHERCPLDSPI)) = 0xFF;
00613
00614
00615 outp(25, UBRR);
00616 outp(25, UBRR1L);
00617 }
00618
00619
00620
00621 #elif defined(XNUT_100) || defined(XNUT_105)
00622 {
00623 PORTB = 0x35;
00624 DDRB = 0x3F;
00625 PORTD = 0xE8;
00626 DDRD = 0xB0;
00627 PORTE = 0x0E;
00628 DDRE = 0x02;
00629 PORTF = 0xF0;
00630 DDRF = 0x0F;
00631 PORTG = 0x1F;
00632 DDRG = 0x07;
00633
00634 ACSR |= _BV(ACD);
00635
00636
00637 TWSR = 0;
00638 TWBR = (NUT_CPU_FREQ / 100000UL - 16) / 2;
00639
00640
00641 #if NUT_CPU_FREQ == 14745600
00642 UBRR0L = (NUT_CPU_FREQ / (16 * 9600UL)) - 1;
00643 UBRR1L = (NUT_CPU_FREQ / (16 * 9600UL)) - 1;
00644 #else
00645 sbi(UCSR0A, U2X0);
00646 sbi(UCSR1A, U2X1);
00647 UBRR0L = (NUT_CPU_FREQ / (8 * 9600UL)) - 1;
00648 UBRR1L = (NUT_CPU_FREQ / (8 * 9600UL)) - 1;
00649 #endif
00650 }
00651
00652
00653
00654 #else
00655 {
00656
00657 outp(7, UBRR);
00658 #ifdef __AVR_ENHANCED__
00659 outp(7, UBRR1L);
00660 #endif
00661 }
00662 #endif
00663
00696 void NutInit(void)
00697 {
00698
00699
00700
00701
00702 #ifdef NUTDEBUG
00703
00704 outp(BV(RXEN) | BV(TXEN), UCR);
00705 #endif
00706
00707 #ifndef __GNUC__
00708 NutCustomInit();
00709
00710
00711
00712
00713 SP = (uint16_t)(NUTMEM_END);
00714
00715
00716
00717 NutInitHeap();
00718 #endif
00719
00720
00721 NutLoadConfig();
00722
00723
00724
00725 NutThreadCreate("idle", NutIdle, 0,
00726 (NUT_THREAD_IDLESTACK * NUT_THREAD_STACK_MULT) + NUT_THREAD_STACK_ADD);
00727 }
00728