usart0at91.c

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00001 /*
00002  * Copyright (C) 2005 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  */
00032 
00033 /*
00034  * $Log: usart0at91.c,v $
00035  * Revision 1.11  2008/10/23 08:50:43  haraldkipp
00036  * Prepared AT91 UART hardware handshake.
00037  *
00038  * Revision 1.10  2008/10/05 16:38:06  haraldkipp
00039  * UART driver was broken on SAM7S and SAM7SE.
00040  *
00041  * Revision 1.9  2008/08/11 06:59:13  haraldkipp
00042  * BSD types replaced by stdint types (feature request #1282721).
00043  *
00044  * Revision 1.8  2008/08/06 12:51:01  haraldkipp
00045  * Added support for Ethernut 5 (AT91SAM9XE reference design).
00046  *
00047  * Revision 1.7  2008/07/31 09:43:24  haraldkipp
00048  * Initializing peripheral control registers in a more general way.
00049  * Fixes bug #2032960.
00050  *
00051  * Revision 1.6  2008/04/18 13:24:55  haraldkipp
00052  * Added Szemzo Andras' RS485 patch.
00053  *
00054  * Revision 1.5  2008/02/15 16:59:11  haraldkipp
00055  * Spport for AT91SAM7SE512 added.
00056  *
00057  * Revision 1.4  2007/10/04 20:04:11  olereinhardt
00058  * Support for SAM7S256 added
00059  *
00060  * Revision 1.3  2006/07/05 07:55:23  haraldkipp
00061  * Daidai's support for AT91SAM7X added.
00062  *
00063  * Revision 1.2  2006/01/05 16:46:52  haraldkipp
00064  * Baudrate calculation is now based on NutGetCpuClock().
00065  *
00066  * Revision 1.1  2005/11/20 14:40:28  haraldkipp
00067  * Added interrupt driven UART driver for AT91.
00068  *
00069  */
00070 
00071 #include <cfg/os.h>
00072 #include <cfg/clock.h>
00073 #include <cfg/arch.h>
00074 #include <cfg/uart.h>
00075 
00076 #include <string.h>
00077 
00078 #include <sys/atom.h>
00079 #include <sys/event.h>
00080 #include <sys/timer.h>
00081 
00082 #include <dev/irqreg.h>
00083 #include <dev/usartat91.h>
00084 
00085 #ifndef NUT_CPU_FREQ
00086 #ifdef NUT_PLL_CPUCLK
00087 #include <dev/cy2239x.h>
00088 #else /* !NUT_PLL_CPUCLK */
00089 #define NUT_CPU_FREQ    73728000UL
00090 #endif /* !NUT_PLL_CPUCLK */
00091 #endif /* !NUT_CPU_FREQ */
00092 
00093 /*
00094  * Local function prototypes.
00095  */
00096 static uint32_t At91UsartGetSpeed(void);
00097 static int At91UsartSetSpeed(uint32_t rate);
00098 static uint8_t At91UsartGetDataBits(void);
00099 static int At91UsartSetDataBits(uint8_t bits);
00100 static uint8_t At91UsartGetParity(void);
00101 static int At91UsartSetParity(uint8_t mode);
00102 static uint8_t At91UsartGetStopBits(void);
00103 static int At91UsartSetStopBits(uint8_t bits);
00104 static uint32_t At91UsartGetFlowControl(void);
00105 static int At91UsartSetFlowControl(uint32_t flags);
00106 static uint32_t At91UsartGetStatus(void);
00107 static int At91UsartSetStatus(uint32_t flags);
00108 static uint8_t At91UsartGetClockMode(void);
00109 static int At91UsartSetClockMode(uint8_t mode);
00110 static void At91UsartTxStart(void);
00111 static void At91UsartRxStart(void);
00112 static int At91UsartInit(void);
00113 static int At91UsartDeinit(void);
00114 
00119 
00123 static USARTDCB dcb_usart0 = {
00124     0,                          /* dcb_modeflags */
00125     0,                          /* dcb_statusflags */
00126     0,                          /* dcb_rtimeout */
00127     0,                          /* dcb_wtimeout */
00128     {0, 0, 0, 0, 0, 0, 0, 0},   /* dcb_tx_rbf */
00129     {0, 0, 0, 0, 0, 0, 0, 0},   /* dcb_rx_rbf */
00130     0,                          /* dbc_last_eol */
00131     At91UsartInit,              /* dcb_init */
00132     At91UsartDeinit,            /* dcb_deinit */
00133     At91UsartTxStart,           /* dcb_tx_start */
00134     At91UsartRxStart,           /* dcb_rx_start */
00135     At91UsartSetFlowControl,    /* dcb_set_flow_control */
00136     At91UsartGetFlowControl,    /* dcb_get_flow_control */
00137     At91UsartSetSpeed,          /* dcb_set_speed */
00138     At91UsartGetSpeed,          /* dcb_get_speed */
00139     At91UsartSetDataBits,       /* dcb_set_data_bits */
00140     At91UsartGetDataBits,       /* dcb_get_data_bits */
00141     At91UsartSetParity,         /* dcb_set_parity */
00142     At91UsartGetParity,         /* dcb_get_parity */
00143     At91UsartSetStopBits,       /* dcb_set_stop_bits */
00144     At91UsartGetStopBits,       /* dcb_get_stop_bits */
00145     At91UsartSetStatus,         /* dcb_set_status */
00146     At91UsartGetStatus,         /* dcb_get_status */
00147     At91UsartSetClockMode,      /* dcb_set_clock_mode */
00148     At91UsartGetClockMode,      /* dcb_get_clock_mode */
00149 };
00150 
00166 NUTDEVICE devUsartAt910 = {
00167     0,                          /* Pointer to next device, dev_next. */
00168     {'u', 'a', 'r', 't', '0', 0, 0, 0, 0},    /* Unique device name, dev_name. */
00169     IFTYP_CHAR,                 /* Type of device, dev_type. */
00170     0,                          /* Base address, dev_base (not used). */
00171     0,                          /* First interrupt number, dev_irq (not used). */
00172     0,                          /* Interface control block, dev_icb (not used). */
00173     &dcb_usart0,                /* Driver control block, dev_dcb. */
00174     UsartInit,                  /* Driver initialization routine, dev_init. */
00175     UsartIOCtl,                 /* Driver specific control function, dev_ioctl. */
00176     UsartRead,                  /* Read from device, dev_read. */
00177     UsartWrite,                 /* Write to device, dev_write. */
00178     UsartOpen,                  /* Open a device or file, dev_open. */
00179     UsartClose,                 /* Close a device or file, dev_close. */
00180     UsartSize                   /* Request file size, dev_size. */
00181 };
00182 
00186 
00187 /*
00188 ** SAM9260 and SAM9XE pins.
00189 */
00190 #if defined(MCU_AT91SAM9260) || defined(MCU_AT91SAM9XE)
00191 #if defined(UART0_MODEM_CONTROL)
00192 #define US_PIOB_PINS_A  ( \
00193     _BV(PB4_TXD0_A) | _BV(PB5_RXD0_A) | _BV(PB27_CTS0_A) | _BV(PB26_RTS0_A) \
00194     | _BV(PB25_RI0_A) | _BV(PB22_DSR0_A) | _BV(PB23_DCD0_A) | _BV(PB24_DTR0_A) \
00195 )
00196 #elif defined(UART0_HARDWARE_HANDSHAKE)
00197 #define US_PIOB_PINS_A  ( \
00198     _BV(PB4_TXD0_A) | _BV(PB5_RXD0_A) | _BV(PB27_CTS0_A) | _BV(PB26_RTS0_A) \
00199 )
00200 #else
00201 #define US_PIOB_PINS_A  (_BV(PB4_TXD0_A) | _BV(PB5_RXD0_A))
00202 #endif
00203 #define US_PIOB_PINS    US_PIOB_PINS_A
00204 #endif
00205 
00206 /*
00207 ** SAM7S and SAM7SE pins.
00208 */
00209 #if defined(MCU_AT91SAM7S) || defined(MCU_AT91SAM7SE)
00210 #if defined(UART0_HARDWARE_HANDSHAKE)
00211 #define US_PIOA_PINS_A  ( \
00212     _BV(PA6_TXD0_A) | _BV(PA5_RXD0_A) | _BV(PA8_CTS0_A) | _BV(PA7_RTS0_A) \
00213 )
00214 #else
00215 #define US_PIOA_PINS_A  (_BV(PA5_RXD0_A) | _BV(PA6_TXD0_A))
00216 #endif
00217 #define US_PIOA_PINS    US_PIOA_PINS_A
00218 #endif
00219 
00220 /*
00221 ** SAM7X pins.
00222 */
00223 #if defined(MCU_AT91SAM7X)
00224 #if defined(UART0_HARDWARE_HANDSHAKE)
00225 #define US_PIOA_PINS_A  ( \
00226     _BV(PA1_TXD0_A) | _BV(PA0_RXD0_A) | _BV(PA4_CTS0_A) | _BV(PA3_RTS0_A) \
00227 )
00228 #else
00229 #define US_PIOA_PINS_A  (_BV(PA1_TXD0_A) | _BV(PA0_RXD0_A))
00230 #endif
00231 #define US_PIOA_PINS    US_PIOA_PINS_A
00232 #endif
00233 
00234 /*
00235 ** X40 pins.
00236 */
00237 #if defined(MCU_AT91R40008)
00238 #define US_PIO_PINS     (_BV(P15_RXD0) | _BV(P14_TXD0))
00239 #endif
00240 
00241 /*
00242 ** Historical settings from Szemzo Andras for RS485.
00243 ** Not sure if we must keep this.
00244 */
00245 #ifdef AT91_UART0_RS485
00246 #if defined(MCU_AT91SAM7X256)
00247 #undef US_PIOA_PINS_A
00248 #define US_PIOA_PINS_A  (_BV(PA0_RXD0_A) | _BV(PA1_TXD0_A) | _BV(PA3_RTS0_A))
00249 #undef AT91_UART_RS485_MODE
00250 #define AT91_UART_RS485_MODE
00251 #undef US_PIOA_PINS
00252 #define US_PIOA_PINS    US_PIOA_PINS_A
00253 #endif
00254 #endif /* AT91_UART0_RS485 */
00255 
00256 
00257 #define USARTn_BASE     USART0_BASE
00258 #define US_ID           US0_ID
00259 #define SIG_UART        sig_UART0
00260 #define dcb_usart       dcb_usart0
00261 
00262 #include "usartat91.c"

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