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00096 #include <cfg/os.h>
00097 #include <cfg/clock.h>
00098
00099 #include <dev/debug.h>
00100 #include <sys/device.h>
00101 #include <sys/file.h>
00102 #include <sys/timer.h>
00103
00104 #define static
00105
00110
00111 #if defined(DBGU_BASE)
00112 static NUTFILE dbgfile;
00113 #else
00114 static NUTFILE dbgfile0;
00115 static NUTFILE dbgfile1;
00116 #endif
00117
00118 #if defined(DBGU_BASE)
00119
00126 static int DebugIOCtl(NUTDEVICE * dev, int req, void *conf)
00127 {
00128 if(req == UART_SETSPEED) {
00129 #if defined(AT91_PLL_MAINCK)
00130 outr(DBGU_BRGR, (At91GetMasterClock() / (8 * (*((uint32_t *)conf))) + 1) / 2);
00131 #else
00132 outr(DBGU_BRGR, (NutGetCpuClock() / (8 * (*((uint32_t *)conf))) + 1) / 2);
00133 #endif
00134 return 0;
00135 }
00136 return -1;
00137 }
00138
00144 static int DebugInit(NUTDEVICE * dev)
00145 {
00146 #if defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00147
00148 #if defined (MCU_AT91SAM7X256)
00149 outr(PIOA_PDR, _BV(27) | _BV(28));
00150 #elif defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00151 outr(PIOA_PDR, _BV(PA9_DRXD_A) | _BV(PA10_DTXD_A));
00152 #endif
00153
00154 outr(DBGU_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00155
00156 outr(DBGU_IDR, 0xFFFFFFFF);
00157
00158 outr(DBGU_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00159
00160 outr(DBGU_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00161
00162 outr(DBGU_CR, US_RXEN | US_TXEN);
00163 #endif
00164
00165 return 0;
00166 }
00167
00168 #else
00169
00177 static int Debug0IOCtl(NUTDEVICE * dev, int req, void *conf)
00178 {
00179 if(req == UART_SETSPEED) {
00180 outr(US0_BRGR, (NutGetCpuClock() / (8 * (*((uint32_t *)conf))) + 1) / 2);
00181 return 0;
00182 }
00183 return -1;
00184 }
00185
00193 static int Debug1IOCtl(NUTDEVICE * dev, int req, void *conf)
00194 {
00195 if(req == UART_SETSPEED) {
00196 outr(US1_BRGR, (NutGetCpuClock() / (8 * (*((uint32_t *)conf))) + 1) / 2);
00197 return 0;
00198 }
00199 return -1;
00200 }
00201
00207 static int Debug0Init(NUTDEVICE * dev)
00208 {
00209 #if defined (MCU_AT91R40008)
00210
00211 outr(PS_PCER, _BV(US0_ID));
00212
00213 outr(PIO_PDR, _BV(14) | _BV(15));
00214 #elif defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM9260) || defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512) || defined(MCU_AT91SAM9XE512)
00215
00216 outr(PMC_PCER, _BV(US0_ID));
00217
00218 #if defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00219 outr(PIOA_PDR, _BV(PA5_RXD0_A) | _BV(PA6_TXD0_A));
00220 #else
00221 outr(PIOA_PDR, _BV(0) | _BV(1));
00222 #endif
00223 #endif
00224
00225 outr(US0_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00226
00227 outr(US0_IDR, 0xFFFFFFFF);
00228 #if defined (US0_RCR) && defined(US0_TCR)
00229
00230 outr(US0_RCR, 0);
00231 outr(US0_TCR, 0);
00232 #endif
00233
00234 outr(US0_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00235
00236 outr(US0_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00237
00238 outr(US0_CR, US_RXEN | US_TXEN);
00239
00240 return 0;
00241 }
00242
00248 static int Debug1Init(NUTDEVICE * dev)
00249 {
00250 #if defined (MCU_AT91R40008)
00251
00252 outr(PS_PCER, _BV(US1_ID));
00253
00254 outr(PIO_PDR, _BV(21) | _BV(22));
00255 #elif defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM9260) || defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512) || defined(MCU_AT91SAM9XE512)
00256
00257 outr(PMC_PCER, _BV(US1_ID));
00258
00259 #if defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00260 outr(PIOA_PDR, _BV(PA21_RXD1_A) | _BV(PA22_TXD1_A));
00261 #else
00262 outr(PIOA_PDR, _BV(5) | _BV(6));
00263 #endif
00264 #endif
00265
00266 outr(US1_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00267
00268 outr(US1_IDR, 0xFFFFFFFF);
00269 #if defined (US1_RCR) && defined(US1_TCR)
00270
00271 outr(US1_RCR, 0);
00272 outr(US1_TCR, 0);
00273 #endif
00274
00275 outr(US1_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00276
00277 outr(US1_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00278
00279 outr(US1_CR, US_RXEN | US_TXEN);
00280
00281 return 0;
00282 }
00283
00284 #endif
00285
00286
00293 static void DebugPut(CONST NUTDEVICE * dev, char ch)
00294 {
00295 while ((inr(dev->dev_base + US_CSR_OFF) & US_TXRDY) == 0);
00296 outr(dev->dev_base + US_THR_OFF, ch);
00297 if (ch == '\n') {
00298 DebugPut(dev, '\r');
00299 }
00300 }
00301
00310 static int DebugWrite(NUTFILE * fp, CONST void *buffer, int len)
00311 {
00312 int c = len;
00313 CONST char *cp = buffer;
00314
00315 while (c--) {
00316 DebugPut(fp->nf_dev, *cp++);
00317 }
00318 return len;
00319 }
00320
00326 static NUTFILE *DebugOpen(NUTDEVICE * dev, CONST char *name, int mode, int acc)
00327 {
00328 NUTFILE *fp = (NUTFILE *) (dev->dev_dcb);
00329
00330 fp->nf_next = 0;
00331 fp->nf_dev = dev;
00332 fp->nf_fcb = 0;
00333
00334 return fp;
00335 }
00336
00342 static int DebugClose(NUTFILE * fp)
00343 {
00344 return 0;
00345 }
00346
00347 #if defined(DBGU_BASE)
00348
00352 NUTDEVICE devDebug = {
00353 0,
00354 {'d', 'b', 'g', 'u', 0, 0, 0, 0, 0}
00355 ,
00356 0,
00357 DBGU_BASE,
00358 0,
00359 0,
00360 &dbgfile,
00361 DebugInit,
00362 DebugIOCtl,
00363 0,
00364 DebugWrite,
00365 DebugOpen,
00366 DebugClose,
00367 0
00368 };
00369
00370 #else
00371
00375 NUTDEVICE devDebug0 = {
00376 0,
00377 {'u', 'a', 'r', 't', '0', 0, 0, 0, 0}
00378 ,
00379 0,
00380 USART0_BASE,
00381 0,
00382 0,
00383 &dbgfile0,
00384 Debug0Init,
00385 Debug0IOCtl,
00386 0,
00387 DebugWrite,
00388 DebugOpen,
00389 DebugClose,
00390 0
00391 };
00392
00396 NUTDEVICE devDebug1 = {
00397 0,
00398 {'u', 'a', 'r', 't', '1', 0, 0, 0, 0}
00399 ,
00400 0,
00401 USART1_BASE,
00402 0,
00403 0,
00404 &dbgfile1,
00405 Debug1Init,
00406 Debug1IOCtl,
00407 0,
00408 DebugWrite,
00409 DebugOpen,
00410 DebugClose,
00411 0
00412 };
00413
00414 #endif
00415