spimmc_at91.c

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00001 /*
00002  * Copyright (C) 2006 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  */
00032 
00066 #include <cfg/arch.h>
00067 #include <cfg/arch/gpio.h>
00068 
00069 #include <dev/mmcard.h>
00070 #include <dev/spimmc_at91.h>
00071 
00072 #if 0
00073 /* Use for local debugging. */
00074 #define NUTDEBUG
00075 #include <stdio.h>
00076 #endif
00077 
00082 
00083 #if defined(MCU_AT91SAM9260) || defined(MCU_AT91SAM9XE512)
00084 
00085 #ifndef MMC_CS_BIT
00086 #define MMC_CS_BIT      PA3_SPI0_NPCS0_A
00087 #endif
00088 #define MMC_DATAOUT_BIT PA0_SPI0_MISO_A
00089 #define MMC_DATAIN_BIT  PA1_SPI0_MOSI_A
00090 #define MMC_CLK_BIT     PA2_SPI0_SPCK_A
00091 
00092 #elif defined(MCU_AT91SAM7X256)
00093 
00094 #ifndef MMC_CS_BIT
00095 #define MMC_CS_BIT      SPI0_NPCS1_PA13A
00096 #endif
00097 #define MMC_DATAOUT_BIT SPI0_MISO_PA16A
00098 #define MMC_DATAIN_BIT  SPI0_MOSI_PA17A
00099 #define MMC_CLK_BIT     SPI0_SPCK_PA18A
00100 
00101 #elif defined(MCU_AT91SAM7S256) || defined(MCU_AT91SAM7SE512)
00102 
00103 #ifndef MMC_CS_BIT
00104 #define MMC_CS_BIT      SPI0_NPCS0_PA11A
00105 #endif
00106 #define MMC_DATAOUT_BIT SPI0_MISO_PA12A
00107 #define MMC_DATAIN_BIT  SPI0_MOSI_PA13A
00108 #define MMC_CLK_BIT     SPI0_SPCK_PA14A
00109 
00110 #else   /* MCU_AT91SAM7X256 */
00111 #warning "MMC SPI mode not supported on this MCU"
00112 #endif
00113 
00114 #ifndef MMC_PIO_ASR
00115 #define MMC_PIO_ASR     PIOA_ASR
00116 #endif
00117 
00118 #ifndef MMC_PIO_BSR
00119 #define MMC_PIO_BSR     PIOA_BSR
00120 #endif
00121 
00122 #ifndef MMC_PIO_PDR
00123 #define MMC_PIO_PDR     PIOA_PDR
00124 #endif
00125 
00126 #ifndef MMC_PINS_A
00127 #define MMC_PINS_A      (_BV(MMC_DATAOUT_BIT) | _BV(MMC_DATAIN_BIT) | _BV(MMC_CLK_BIT))
00128 #endif
00129 
00130 #ifndef MMC_PINS_B
00131 #define MMC_PINS_B      0
00132 #endif
00133 
00134 #ifndef MMC_CS_PER
00135 #define MMC_CS_PER      PIOA_PER
00136 #endif
00137 
00138 #ifndef MMC_CS_OER
00139 #define MMC_CS_OER      PIOA_OER
00140 #endif
00141 
00142 #ifndef MMC_CS_SODR
00143 #define MMC_CS_SODR     PIOA_SODR
00144 #endif
00145 
00146 #ifndef MMC_CS_CODR
00147 #define MMC_CS_CODR     PIOA_CODR
00148 #endif
00149 
00150 #ifndef MMC_SPI_CR
00151 #define MMC_SPI_CR      SPI0_CR
00152 #endif
00153 
00154 #ifndef MMC_SPI_MR
00155 #define MMC_SPI_MR      SPI0_MR
00156 #endif
00157 
00158 #ifndef MMC_SPI_RDR
00159 #define MMC_SPI_RDR     SPI0_RDR
00160 #endif
00161 
00162 #ifndef MMC_SPI_TDR
00163 #define MMC_SPI_TDR     SPI0_TDR
00164 #endif
00165 
00166 #ifndef MMC_SPI_SR
00167 #define MMC_SPI_SR      SPI0_SR
00168 #endif
00169 
00170 #ifndef MMC_SPI_CSR1
00171 #define MMC_SPI_CSR1    SPI0_CSR1
00172 #endif
00173 
00174 #ifndef MMC_SPI_ID
00175 #define MMC_SPI_ID      SPI0_ID
00176 #endif
00177 
00178 
00187 static int At91SpiMmCard0Init(void)
00188 {
00189     return 0;
00190 }
00191 
00200 static int At91SpiMmCard0Select(int on)
00201 {
00202     int rc = (inr(PIOA_ODSR) & _BV(MMC_CS_BIT)) == 0;
00203 
00204     /* MMC select is low active. */
00205     if (on == 1) {
00206         outr(MMC_CS_CODR, _BV(MMC_CS_BIT));
00207     } else if (on == 0) {
00208         outr(MMC_CS_SODR, _BV(MMC_CS_BIT));
00209     }
00210     return rc;
00211 }
00212 
00220 static uint8_t At91SpiMmCard0Io(uint8_t val)
00221 {
00222 #ifdef NUTDEBUG
00223     putchar('[');
00224     if (val != 0xFF) {
00225         printf("s%02X", val);
00226     }
00227 #endif
00228 
00229     /* Transmission is started by writing the transmit data. */
00230     outr(MMC_SPI_TDR, val);
00231     /* Wait for receiver data register full. */
00232     while((inr(MMC_SPI_SR) & SPI_RDRF) == 0);
00233     /* Read data. */
00234     val = (uint8_t)inr(MMC_SPI_RDR);
00235 
00236 #ifdef NUTDEBUG
00237     if (val != 0xFF) {
00238         printf("r%02X", val);
00239     }
00240     putchar(']');
00241 #endif
00242     return val;
00243 }
00244 
00255 int At91SpiMmCard0Avail(void)
00256 {
00257     return 1;
00258 }
00259 
00267 int At91SpiMmCard0WrProt(void)
00268 {
00269     return 0;
00270 }
00271 
00280 static int At91SpiMmcIfcInit(NUTDEVICE * dev)
00281 {
00282     /* Disable PIO lines used for SPI. */
00283     outr(MMC_PIO_PDR, MMC_PINS_A | MMC_PINS_B);
00284     /* Enable peripherals. */
00285     outr(MMC_PIO_ASR, MMC_PINS_A);
00286     outr(MMC_PIO_BSR, MMC_PINS_B);
00287 
00288     /* MMC chip select is manually controlled. */
00289     outr(MMC_CS_PER, _BV(MMC_CS_BIT));
00290     outr(MMC_CS_SODR, _BV(MMC_CS_BIT));
00291     outr(MMC_CS_OER, _BV(MMC_CS_BIT));
00292 
00293     /* Enable SPI clock. */
00294     outr(PMC_PCER, _BV(MMC_SPI_ID));
00295 
00296     /* SPI enable and reset. */
00297     outr(MMC_SPI_CR, SPI_SPIEN | SPI_SWRST);
00298     outr(MMC_SPI_CR, SPI_SPIEN);
00299 
00300     /* Set SPI to master mode, fixed peripheral at CS1, fault detection disabled. */
00301     outr(MMC_SPI_MR, (1 << SPI_PCS_LSB) | SPI_MODFDIS | SPI_MSTR);
00302 
00303     /* Data changes during clock low and will be sampled on rising edges. */
00304     outr(MMC_SPI_CSR1, (3 << SPI_SCBR_LSB) | SPI_CPOL);
00305 
00306     return MmCardDevInit(dev);
00307 }
00308 
00309 static MMCIFC mmc0_ifc = {
00310     At91SpiMmCard0Init,             
00311     At91SpiMmCard0Io,               
00312     At91SpiMmCard0Select,           
00313     At91SpiMmCard0Avail,            
00314     At91SpiMmCard0WrProt            
00315 };
00316 
00329 NUTDEVICE devAt91SpiMmc0 = {
00330     0,                          
00331     {'M', 'M', 'C', '0', 0, 0, 0, 0, 0}
00332     ,                           
00333     0,                          
00334     0,                          
00335     0,                          
00336     &mmc0_ifc,                  
00337     0,                          
00338     At91SpiMmcIfcInit,          
00339     MmCardIOCtl,                
00340     MmCardBlockRead,            
00341     MmCardBlockWrite,           
00342 #ifdef __HARVARD_ARCH__
00343     MmCardBlockWrite_P,         
00344 #endif
00345     MmCardMount,                
00346     MmCardUnmount,              
00347     0                           
00348 };
00349 

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