00001 #ifndef _ARCH_ARM_SAM7SE_H_
00002 #define _ARCH_ARM_SAM7SE_H_
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00044 #define FLASH_BASE 0x100000UL
00045 #define RAM_BASE 0x200000UL
00046
00047 #define TC_BASE 0xFFFA0000
00048 #define UDP_BASE 0xFFFB0000
00049 #define TWI_BASE 0xFFFB8000
00050 #define USART0_BASE 0xFFFC0000
00051 #define USART1_BASE 0xFFFC4000
00052 #define PWMC_BASE 0xFFFCC000
00053 #define SSC_BASE 0xFFFD4000
00054 #define ADC_BASE 0xFFFD8000
00055 #define SPI0_BASE 0xFFFE0000
00057 #define AIC_BASE 0xFFFFF000
00058 #define DBGU_BASE 0xFFFFF200
00059 #define PIOA_BASE 0xFFFFF400
00060 #define PIOB_BASE 0xFFFFF600
00061 #define PIOC_BASE 0xFFFFF800
00062 #define PMC_BASE 0xFFFFFC00
00063 #define RSTC_BASE 0xFFFFFD00
00064 #define RTT_BASE 0xFFFFFD20
00065 #define PIT_BASE 0xFFFFFD30
00066 #define WDT_BASE 0xFFFFFD40
00067 #define VREG_BASE 0xFFFFFD60
00068 #define MC_BASE 0xFFFFFF00
00069 #define EFC0_BASE 0xFFFFFF60
00070 #define EFC1_BASE 0xFFFFFF70
00071 #define EBI_BASE 0xFFFFFF80
00072 #define SMC_BASE 0xFFFFFF90
00073 #define SDRAMC_BASE 0xFFFFFFB0
00074 #define ECC_BASE 0xFFFFFFDC
00076 #define PERIPH_RPR_OFF 0x00000100
00077 #define PERIPH_RCR_OFF 0x00000104
00078 #define PERIPH_TPR_OFF 0x00000108
00079 #define PERIPH_TCR_OFF 0x0000010C
00080 #define PERIPH_RNPR_OFF 0x00000110
00081 #define PERIPH_RNCR_OFF 0x00000114
00082 #define PERIPH_TNPR_OFF 0x00000118
00083 #define PERIPH_TNCR_OFF 0x0000011C
00084 #define PERIPH_PTCR_OFF 0x00000120
00085 #define PERIPH_PTSR_OFF 0x00000124
00087 #define PDC_RXTEN 0x00000001
00088 #define PDC_RXTDIS 0x00000002
00089 #define PDC_TXTEN 0x00000100
00090 #define PDC_TXTDIS 0x00000200
00092 #define EBI_HAS_CSA
00093
00094 #define DBGU_HAS_PDC
00095 #define SPI_HAS_PDC
00096 #define SSC_HAS_PDC
00097 #define USART_HAS_PDC
00098 #define USART_HAS_MODE
00099
00100 #define PIO_HAS_MULTIDRIVER
00101 #define PIO_HAS_PULLUP
00102 #define PIO_HAS_PERIPHERALSELECT
00103 #define PIO_HAS_OUTPUTWRITEENABLE
00104
00105 #include <arch/arm/at91_tc.h>
00106 #include <arch/arm/at91_us.h>
00107 #include <arch/arm/at91_dbgu.h>
00108 #include <arch/arm/at91_spi.h>
00109 #include <arch/arm/at91_aic.h>
00110 #include <arch/arm/at91_pio.h>
00111 #include <arch/arm/at91_pmc.h>
00112 #include <arch/arm/at91_rstc.h>
00113 #include <arch/arm/at91_wdt.h>
00114 #include <arch/arm/at91_pit.h>
00115 #include <arch/arm/at91_mc.h>
00116 #include <arch/arm/at91_ebi.h>
00117 #include <arch/arm/at91_smc.h>
00118 #include <arch/arm/at91_sdramc.h>
00119 #include <arch/arm/at91_ssc.h>
00120 #include <arch/arm/at91_twi.h>
00121 #include <arch/arm/at91_adc.h>
00122 #include <arch/arm/at91_pwmc.h>
00123
00126
00129 #define FIQ_ID 0
00130 #define SYSC_ID 1
00131 #define PIOA_ID 2
00132 #define PIOB_ID 3
00133 #define PIOC_ID 4
00134 #define SPI0_ID 5
00135 #define US0_ID 6
00136 #define US1_ID 7
00137 #define SSC_ID 8
00138 #define TWI_ID 9
00139 #define PWMC_ID 10
00140 #define UDP_ID 11
00141 #define TC0_ID 12
00142 #define TC1_ID 13
00143 #define TC2_ID 14
00144 #define ADC_ID 15
00145
00146 #define IRQ0_ID 29
00147 #define IRQ1_ID 30
00149
00150
00152 #define SPI0_NPCS0_PA11A 11
00153 #define SPI0_NPCS1_PA09B 9
00154 #define SPI0_NPCS1_PA31A 31
00155 #define SPI0_NPCS2_PA10B 10
00156 #define SPI0_NPCS2_PA30B 30
00157 #define SPI0_NPCS3_PA03B 3
00158 #define SPI0_NPCS3_PA05B 5
00159 #define SPI0_NPCS3_PA22B 22
00160 #define SPI0_MISO_PA12A 12
00161 #define SPI0_MOSI_PA13A 13
00162 #define SPI0_SPCK_PA14A 14
00164
00165
00167 #define PA5_RXD0_A 5
00168 #define PA6_TXD0_A 6
00169 #define PB2_SCK0_A 2
00170 #define PA7_RTS0_A 7
00171 #define PA8_CTS0_A 8
00172
00173 #define PA21_RXD1_A 21
00174 #define PA22_TXD1_A 22
00175 #define PA23_SCK1_A 23
00176 #define PA24_RTS1_A 24
00177 #define PC8_RTS1_B 8
00178 #define PA25_CTS1_A 25
00179 #define PA26_DCD1_A 26
00180 #define PA27_DTR1_A 27
00181 #define PC9_DTR1_B 9
00182 #define PA28_DSR1_A 28
00183 #define PA29_RI1_A 29
00184
00188 #define PA12_SPI0_MISO_A 12
00189 #define PA13_SPI0_MOSI_A 13
00190 #define PA14_SPI0_SPCK_A 14
00191 #define PA11_SPI0_NPCS0_A 11
00192 #define PA31_SPI0_NPCS1_A 31
00193 #define PB9_SPI0_NPCS1_A 9
00194 #define PB10_SPI0_NPCS2_A 10
00195 #define PC14_SPI0_NPCS1_B 14
00196 #define PB30_SPI0_NPCS2_A 30
00197 #define PB3_SPI0_NPCS3_A 3
00198 #define PB5_SPI0_NPCS3_A 5
00199 #define PB22_SPI0_NPCS3_A 22
00200
00201 #define SPI0_PINS _BV(PA12_SPI0_MISO_A) | _BV(PA13_SPI0_MOSI_A) | _BV(PA14_SPI0_SPCK_A)
00202 #define SPI0_PIO_BASE PIOA_BASE
00203 #define SPI0_PSR_OFF PIO_ASR_OFF
00204
00205 #define SPI0_CS0_PIN _BV(PA11_SPI0_NPCS0_A)
00206 #define SPI0_CS0_PIO_BASE PIOA_BASE
00207 #define SPI0_CS0_PSR_OFF PIO_ASR_OFF
00208
00209 #ifndef SPI0_CS1_PIN
00210 #define SPI0_CS1_PIN _BV(PA31_SPI0_NPCS1_A)
00211 #define SPI0_CS1_PIO_BASE PIOA_BASE
00212 #define SPI0_CS1_PSR_OFF PIO_ASR_OFF
00213 #endif
00214
00219 #define PA0_A0_B 0
00220 #define PB0_A0_B 0
00221 #define PA1_A1_B 1
00222 #define PB1_A1_B 1
00223 #define PA2_A2_B 2
00224 #define PB2_A2_B 2
00225 #define PA3_A3_B 3
00226 #define PB3_A3_B 3
00227 #define PA4_A4_B 4
00228 #define PB4_A4_B 4
00229 #define PA5_A5_B 5
00230 #define PB5_A5_B 5
00231 #define PA6_A6_B 6
00232 #define PB6_A6_B 6
00233 #define PA7_A7_B 7
00234 #define PB7_A7_B 7
00235 #define PA8_A8_B 8
00236 #define PB8_A8_B 8
00237 #define PA9_A9_B 9
00238 #define PB9_A9_B 9
00239 #define PA10_A10_B 10
00240 #define PB10_A10_B 10
00241 #define PA11_A11_B 11
00242 #define PB11_A11_B 11
00243 #define PA12_A12_B 12
00244 #define PB12_A12_B 12
00245 #define PA13_A13_B 13
00246 #define PB13_A13_B 13
00247 #define PA14_A14_B 14
00248 #define PB14_A14_B 14
00249 #define PA15_A15_B 15
00250 #define PB15_A15_B 15
00251 #define PA16_A16_B 16
00252 #define PB16_A16_B 16
00253 #define PA17_A17_B 17
00254 #define PB17_A17_B 17
00255 #define PC16_A18_A 16
00256 #define PC17_A19_A 17
00257 #define PC18_A20_A 18
00258 #define PC19_A21_A 19
00259 #define PC20_A22_A 20
00260
00261 #define PC0_D0_A 0
00262 #define PC1_D1_A 1
00263 #define PC2_D2_A 2
00264 #define PC3_D3_A 3
00265 #define PC4_D4_A 4
00266 #define PC5_D5_A 5
00267 #define PC6_D6_A 6
00268 #define PC7_D7_A 7
00269 #define PC8_D8_A 8
00270 #define PC9_D9_A 9
00271 #define PC10_D10_A 10
00272 #define PC11_D11_A 11
00273 #define PC12_D12_A 12
00274 #define PC13_D13_A 13
00275 #define PC14_D14_A 14
00276 #define PC15_D15_A 15
00277 #define PB18_D16_B 18
00278 #define PB19_D17_B 19
00279 #define PB20_D18_B 20
00280 #define PB21_D19_B 21
00281 #define PB22_D20_B 22
00282 #define PB23_D21_B 23
00283 #define PB24_D22_B 24
00284 #define PB25_D23_B 25
00285 #define PB26_D24_B 26
00286 #define PB27_D25_B 27
00287 #define PB28_D26_B 28
00288 #define PB29_D27_B 29
00289 #define PB30_D28_B 30
00290 #define PB31_D29_B 31
00291 #define PA30_D30_B 30
00292 #define PA31_D31_B 31
00293
00294 #define PA19_NCS4_B 19
00295 #define PA20_NCS2_B 20
00296 #define PA21_NCS6_B 21
00297 #define PA22_NCS5_B 22
00298 #define PA26_NCS1_B 26
00299 #define PC15_NCS3_B 15
00300 #define PC20_NCS7_B 20
00301 #define PC23_NCS0_B 23
00302
00303 #define PA18_NBS3_B 18
00304 #define PA23_NWR1_B 23
00305 #define PA24_SDA10_B 24
00306 #define PA25_SDCKE_B 25
00307 #define PA27_SDWE_B 27
00308 #define PA28_CAS_B 28
00309 #define PA29_RAS_B 29
00310 #define PC16_NWAIT_B 16
00311 #define PC17_NANDOE_B 17
00312 #define PC18_NANDWE_B 18
00313 #define PC21_NWR0_B 21
00314 #define PC22_NRD_B 22
00315 #define PC23_CFRNW_A 23
00316
00320 #define PA9_DRXD_A 9
00321 #define PA10_DTXD_A 10
00322
00326 #define PA17_TD_A 17
00327 #define PA18_RD_A 18
00328 #define PA16_TK_A 16
00329 #define PA19_RK_A 19
00330 #define PA15_TF_A 15
00331 #define PA20_RF_A 20
00333
00334
00336 #define PA3_TWD_A 3
00337 #define PA4_TWCK_A 4
00339
00340
00342 #define PB0_TIOA0_A 0
00343 #define PB1_TIOB0_A 1
00344 #define PB4_TCLK0_A 4
00345 #define PB15_TIOA1_A 15
00346 #define PB16_TIOB1_A 16
00347 #define PB28_TCLK1_A 28
00348 #define PB26_TIOA2_A 26
00349 #define PB27_TIOB2_A 27
00350 #define PB29_TCLK2_A 29
00351
00355 #define PB6_PCK0_A 6
00356 #define PC10_PCK0_B 10
00357 #define PB17_PCK1_A 17
00358 #define PB21_PCK1_A 21
00359 #define PC11_PCK1_B 11
00360 #define PB18_PCK2_A 18
00361 #define PB31_PCK2_A 31
00362 #define PC12_PCK2_B 12
00363
00367 #define PB19_FIQ_A 19
00368 #define PB20_IRQ0_A 20
00369 #define PA30_IRQ1_A 30
00370
00374 #define PB8_ADTRG_A 8
00376
00377
00379 #define PA0_PWM0_A 0
00380 #define PB11_PWM0_A 11
00381 #define PB23_PWM0_A 23
00382 #define PA1_PWM1_A 1
00383 #define PB12_PWM1_A 12
00384 #define PB24_PWM1_A 24
00385 #define PA2_PWM2_A 2
00386 #define PB13_PWM2_A 13
00387 #define PB25_PWM2_A 25
00388 #define PB7_PWM3_A 7
00389 #define PB14_PWM3_A 14
00390
00392
00394 #endif