debug_at91.c

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00001 /*
00002  * Copyright (C) 2001-2006 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  *
00032  */
00033 
00096 #define NUT_DEPRECATED
00097 
00098 #include <cfg/os.h>
00099 #include <cfg/clock.h>
00100 
00101 #include <dev/debug.h>
00102 #include <sys/device.h>
00103 #include <sys/file.h>
00104 #include <sys/timer.h>
00105 
00106 #define static
00107 
00112 
00113 #if defined(DBGU_BASE)
00114 static NUTFILE dbgfile;
00115 #else
00116 static NUTFILE dbgfile0;
00117 static NUTFILE dbgfile1;
00118 #endif
00119 
00120 #if defined(DBGU_BASE)
00121 
00128 static int DebugIOCtl(NUTDEVICE * dev, int req, void *conf)
00129 {
00130     if(req == UART_SETSPEED) {
00131 #if defined(AT91_PLL_MAINCK)
00132         outr(DBGU_BRGR, (At91GetMasterClock() / (8 * (*((uint32_t *)conf))) + 1) / 2);
00133 #else
00134         outr(DBGU_BRGR, (NutGetCpuClock() / (8 * (*((uint32_t *)conf))) + 1) / 2);
00135 #endif
00136         return 0;
00137     }
00138     return -1;
00139 }
00140 
00146 static int DebugInit(NUTDEVICE * dev)
00147 {
00148 #if defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00149     /* Disable GPIO on UART tx/rx pins. */
00150     #if defined (MCU_AT91SAM7X256)
00151        outr(PIOA_PDR, _BV(27) | _BV(28));
00152     #elif defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00153        outr(PIOA_PDR, _BV(PA9_DRXD_A) | _BV(PA10_DTXD_A));
00154     #endif
00155     /* Reset UART. */
00156     outr(DBGU_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00157     /* Disable all UART interrupts. */
00158     outr(DBGU_IDR, 0xFFFFFFFF);
00159     /* Set UART baud rate generator register. */
00160     outr(DBGU_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00161     /* Set UART mode to 8 data bits, no parity and 1 stop bit. */
00162     outr(DBGU_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00163     /* Enable UART receiver and transmitter. */
00164     outr(DBGU_CR, US_RXEN | US_TXEN);
00165 #endif
00166 
00167     return 0;
00168 }
00169 
00170 #else /* !DBGU_BASE */
00171 
00179 static int Debug0IOCtl(NUTDEVICE * dev, int req, void *conf)
00180 {
00181     if(req == UART_SETSPEED) {
00182         outr(US0_BRGR, (NutGetCpuClock() / (8 * (*((uint32_t *)conf))) + 1) / 2);
00183         return 0;
00184     }
00185     return -1;
00186 }
00187 
00195 static int Debug1IOCtl(NUTDEVICE * dev, int req, void *conf)
00196 {
00197     if(req == UART_SETSPEED) {
00198         outr(US1_BRGR, (NutGetCpuClock() / (8 * (*((uint32_t *)conf))) + 1) / 2);
00199         return 0;
00200     }
00201     return -1;
00202 }
00203 
00209 static int Debug0Init(NUTDEVICE * dev)
00210 {
00211 #if defined (MCU_AT91R40008)
00212     /* Enable UART clock. */
00213     outr(PS_PCER, _BV(US0_ID));
00214     /* Disable GPIO on UART tx/rx pins. */
00215     outr(PIO_PDR, _BV(14) | _BV(15));
00216 #elif defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM9260) || defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512) || defined(MCU_AT91SAM9XE512)
00217     /* Enable UART clock. */
00218     outr(PMC_PCER, _BV(US0_ID));
00219     /* Disable GPIO on UART tx/rx pins. */
00220     #if defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00221        outr(PIOA_PDR, _BV(PA5_RXD0_A) | _BV(PA6_TXD0_A));
00222     #else
00223        outr(PIOA_PDR, _BV(0) | _BV(1));
00224     #endif
00225 #endif
00226     /* Reset UART. */
00227     outr(US0_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00228     /* Disable all UART interrupts. */
00229     outr(US0_IDR, 0xFFFFFFFF);
00230 #if defined (US0_RCR) && defined(US0_TCR)
00231     /* Clear UART counter registers. */
00232     outr(US0_RCR, 0);
00233     outr(US0_TCR, 0);
00234 #endif
00235     /* Set UART baud rate generator register. */
00236     outr(US0_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00237     /* Set UART mode to 8 data bits, no parity and 1 stop bit. */
00238     outr(US0_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00239     /* Enable UART receiver and transmitter. */
00240     outr(US0_CR, US_RXEN | US_TXEN);
00241 
00242     return 0;
00243 }
00244 
00250 static int Debug1Init(NUTDEVICE * dev)
00251 {
00252 #if defined (MCU_AT91R40008)
00253     /* Enable UART clock. */
00254     outr(PS_PCER, _BV(US1_ID));
00255     /* Disable GPIO on UART tx/rx pins. */
00256     outr(PIO_PDR, _BV(21) | _BV(22));
00257 #elif defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM9260) || defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512) || defined(MCU_AT91SAM9XE512)
00258     /* Enable UART clock. */
00259     outr(PMC_PCER, _BV(US1_ID));
00260     /* Disable GPIO on UART tx/rx pins. */
00261     #if defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00262        outr(PIOA_PDR, _BV(PA21_RXD1_A) | _BV(PA22_TXD1_A));
00263     #else
00264        outr(PIOA_PDR, _BV(5) | _BV(6));
00265     #endif
00266 #endif
00267     /* Reset UART. */
00268     outr(US1_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00269     /* Disable all UART interrupts. */
00270     outr(US1_IDR, 0xFFFFFFFF);
00271 #if defined (US1_RCR) && defined(US1_TCR)
00272     /* Clear UART counter registers. */
00273     outr(US1_RCR, 0);
00274     outr(US1_TCR, 0);
00275 #endif
00276     /* Set UART baud rate generator register. */
00277     outr(US1_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00278     /* Set UART mode to 8 data bits, no parity and 1 stop bit. */
00279     outr(US1_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00280     /* Enable UART receiver and transmitter. */
00281     outr(US1_CR, US_RXEN | US_TXEN);
00282 
00283     return 0;
00284 }
00285 
00286 #endif
00287 
00288 
00295 static void DebugPut(CONST NUTDEVICE * dev, char ch)
00296 {
00297     while ((inr(dev->dev_base + US_CSR_OFF) & US_TXRDY) == 0);
00298     outr(dev->dev_base + US_THR_OFF, ch);
00299     if (ch == '\n') {
00300         DebugPut(dev, '\r');
00301     }
00302 }
00303 
00312 static int DebugWrite(NUTFILE * fp, CONST void *buffer, int len)
00313 {
00314     int c = len;
00315     CONST char *cp = buffer;
00316 
00317     while (c--) {
00318         DebugPut(fp->nf_dev, *cp++);
00319     }
00320     return len;
00321 }
00322 
00328 static NUTFILE *DebugOpen(NUTDEVICE * dev, CONST char *name, int mode, int acc)
00329 {
00330     NUTFILE *fp = (NUTFILE *) (dev->dev_dcb);
00331 
00332     fp->nf_next = 0;
00333     fp->nf_dev = dev;
00334     fp->nf_fcb = 0;
00335 
00336     return fp;
00337 }
00338 
00344 static int DebugClose(NUTFILE * fp)
00345 {
00346     return 0;
00347 }
00348 
00349 #if defined(DBGU_BASE)
00350 
00354 NUTDEVICE devDebug = {
00355     0,                          
00356     {'d', 'b', 'g', 'u', 0, 0, 0, 0, 0}
00357     ,                           
00358     0,                          
00359     DBGU_BASE,                  
00360     0,                          
00361     0,                          
00362     &dbgfile,                   
00363     DebugInit,                  
00364     DebugIOCtl,                 
00365     0,                          
00366     DebugWrite,                 
00367     DebugOpen,                  
00368     DebugClose,                 
00369     0                           
00370 };
00371 
00372 #else   /* !DBGU_BASE */
00373 
00377 NUTDEVICE devDebug0 = {
00378     0,                          
00379     {'u', 'a', 'r', 't', '0', 0, 0, 0, 0}
00380     ,                           
00381     0,                          
00382     USART0_BASE,                
00383     0,                          
00384     0,                          
00385     &dbgfile0,                  
00386     Debug0Init,                 
00387     Debug0IOCtl,                
00388     0,                          
00389     DebugWrite,                 
00390     DebugOpen,                  
00391     DebugClose,                 
00392     0                           
00393 };
00394 
00398 NUTDEVICE devDebug1 = {
00399     0,                          
00400     {'u', 'a', 'r', 't', '1', 0, 0, 0, 0}
00401     ,                           
00402     0,                          
00403     USART1_BASE,                
00404     0,                          
00405     0,                          
00406     &dbgfile1,                  
00407     Debug1Init,                 
00408     Debug1IOCtl,                
00409     0,                          
00410     DebugWrite,                 
00411     DebugOpen,                  
00412     DebugClose,                 
00413     0                           
00414 };
00415 
00416 #endif  /* !DBGU_BASE */
00417 

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