ostimer_at91.c

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00001 /*
00002  * Copyright (C) 2001-2007 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  *
00032  */
00033 
00034 /*
00035  * $Log$
00036  * Revision 1.23  2009/01/17 11:26:37  haraldkipp
00037  * Getting rid of two remaining BSD types in favor of stdint.
00038  * Replaced 'u_int' by 'unsinged int' and 'uptr_t' by 'uintptr_t'.
00039  *
00040  * Revision 1.22  2008/08/22 09:25:33  haraldkipp
00041  * Clock value caching and new functions NutArchClockGet, NutClockGet and
00042  * NutClockSet added.
00043  *
00044  * Revision 1.21  2008/08/11 06:59:12  haraldkipp
00045  * BSD types replaced by stdint types (feature request #1282721).
00046  *
00047  * Revision 1.20  2008/08/06 12:51:01  haraldkipp
00048  * Added support for Ethernut 5 (AT91SAM9XE reference design).
00049  *
00050  * Revision 1.19  2008/07/08 08:25:04  haraldkipp
00051  * NutDelay is no more architecture specific.
00052  * Number of loops per millisecond is configurable or will be automatically
00053  * determined.
00054  * A new function NutMicroDelay provides shorter delays.
00055  *
00056  * Revision 1.18  2008/02/15 16:58:41  haraldkipp
00057  * Spport for AT91SAM7SE512 added.
00058  *
00059  * Revision 1.17  2007/10/04 19:59:47  olereinhardt
00060  * Support for SAM7S256 added
00061  *
00062  * Revision 1.16  2007/08/17 10:44:37  haraldkipp
00063  * Timer enable/disable macro replaces previous global interrupt
00064  * enable/disable or function calling.
00065  *
00066  * Revision 1.15  2007/04/12 09:03:48  haraldkipp
00067  * Miserable delay routine will now honor milliseconds on a 73 MHz ARM.
00068  *
00069  * Revision 1.14  2007/02/15 16:14:39  haraldkipp
00070  * Periodic interrupt timer can be used as a system clock.
00071  *
00072  * Revision 1.13  2006/10/08 16:48:07  haraldkipp
00073  * Documentation fixed
00074  *
00075  * Revision 1.12  2006/09/29 12:37:36  haraldkipp
00076  * Now working correctly, if the CPU is running on the second PLL.
00077  *
00078  * Revision 1.11  2006/09/05 12:27:25  haraldkipp
00079  * PLL clock calculation re-arranged to prevent 32-bit overflow.
00080  * NutTimerMillisToTicks() returned wrong result. Shane Buckham reported
00081  * this long time ago. Many thanks. Needs to be fixed for other platforms too.
00082  *
00083  * Revision 1.10  2006/08/31 18:59:50  haraldkipp
00084  * Added support for the AT91SAM9260. We now determine between processor and
00085  * master clock. A new API function At91GetMasterClock() had been added to
00086  * query the latter.
00087  *
00088  * Revision 1.9  2006/08/05 12:00:01  haraldkipp
00089  * NUT_CPU_FREQ did not override AT91_PLL_MAINCK or NUT_PLL_CPUCLK. Fixed.
00090  *
00091  * Revision 1.8  2006/07/26 11:17:16  haraldkipp
00092  * Defining AT91_PLL_MAINCK will automatically determine SAM7X clock by
00093  * reading PLL settings.
00094  *
00095  * Revision 1.7  2006/07/05 07:59:41  haraldkipp
00096  * Daidai's support for AT91SAM7X added.
00097  *
00098  * Revision 1.6  2006/06/28 17:10:35  haraldkipp
00099  * Include more general header file for ARM.
00100  *
00101  * Revision 1.5  2006/03/02 19:53:01  haraldkipp
00102  * Bugfix. The system timer configuration was based on a fixed MCU clock
00103  * of 66.6 MHz. Now it uses the actual frequency.
00104  *
00105  * Revision 1.4  2006/01/05 16:46:25  haraldkipp
00106  * Added support for CY22393 programmable clock chip.
00107  *
00108  * Revision 1.3  2005/10/24 08:34:13  haraldkipp
00109  * Moved AT91 family specific header files to sbudir arm.
00110  * Use new IRQ API.
00111  *
00112  * Revision 1.2  2005/08/02 17:46:45  haraldkipp
00113  * Major API documentation update.
00114  *
00115  * Revision 1.1  2005/07/26 18:02:26  haraldkipp
00116  * Moved from dev.
00117  *
00118  * Revision 1.2  2005/07/20 09:17:26  haraldkipp
00119  * Default NUT_CPU_FREQ and NUT_TICK_FREQ added.
00120  * NutTimerIntr() removed, because we can use the hardware independent code.
00121  *
00122  * Revision 1.1  2005/05/27 17:16:40  drsung
00123  * Moved the file.
00124  *
00125  * Revision 1.5  2005/04/05 17:50:46  haraldkipp
00126  * Use register names in gba.h.
00127  *
00128  * Revision 1.4  2004/11/08 19:16:37  haraldkipp
00129  * Hacked in Gameboy timer support
00130  *
00131  * Revision 1.3  2004/10/03 18:42:21  haraldkipp
00132  * No GBA support yet, but let the compiler run through
00133  *
00134  * Revision 1.2  2004/09/08 10:19:39  haraldkipp
00135  * Running on AT91 and S3C, thanks to James Tyou
00136  *
00137  */
00138 
00139 #define NUT_DEPRECATED
00140 
00141 #include <cfg/os.h>
00142 #include <cfg/clock.h>
00143 #include <arch/arm.h>
00144 #include <dev/irqreg.h>
00145 #include <sys/timer.h>
00146 
00147 #ifndef NUT_CPU_FREQ
00148 #ifdef NUT_PLL_CPUCLK
00149 #include <dev/cy2239x.h>
00150 #elif !defined(AT91_PLL_MAINCK)
00151 #define NUT_CPU_FREQ    73728000UL
00152 #endif /* !AT91_PLL_MAINCK */
00153 #endif /* !NUT_CPU_FREQ */
00154 
00155 
00160 
00161 #ifndef NUT_TICK_FREQ
00162 #define NUT_TICK_FREQ   1000UL
00163 #endif
00164 
00176 void NutRegisterTimer(void (*handler) (void *))
00177 {
00178 #if defined(NUT_TICK_AT91PIT)
00179 
00180     /* Set compare value for the specified tick frequency. */
00181 #if defined(AT91_PLL_MAINCK)
00182     outr(PIT_MR, (At91GetMasterClock() / (16 * NUT_TICK_FREQ) - 1) << PIT_PIV_LSB);
00183 #else
00184     outr(PIT_MR, (NutGetCpuClock() / (16 * NUT_TICK_FREQ) - 1) << PIT_PIV_LSB);
00185 #endif
00186 
00187     /* Register system interrupt handler. */
00188     NutRegisterSysIrqHandler(&syssig_PIT, handler, NULL);
00189     /* Enable interval timer and interval timer interrupts */
00190     outr(PIT_MR, inr(PIT_MR) | PIT_PITEN | PIT_PITIEN);
00191     NutSysIrqEnable(&syssig_PIT);
00192     inr(PIT_PIVR);
00193 
00194 #else   /* NUT_TICK_AT91PIT */
00195 
00196     int dummy;
00197 
00198 #if defined(MCU_AT91SAM7X) || defined(MCU_AT91SAM7S256) || defined(MCU_AT91SAM9260) || defined (MCU_AT91SAM7SE512) || defined(MCU_AT91SAM9XE512)
00199     /* Enable TC0 clock. */
00200     outr(PMC_PCER, _BV(TC0_ID));
00201 #endif
00202 
00203     /* Disable the Clock Counter */
00204     outr(TC0_CCR, TC_CLKDIS);
00205     /* Disable all interrupts */
00206     outr(TC0_IDR, 0xFFFFFFFF);
00207     /* Clear the status register. */
00208     dummy = inr(TC0_SR);
00209     /* Select divider and compare trigger */
00210     outr(TC0_CMR, TC_CLKS_MCK32 | TC_CPCTRG);
00211     /* Enable the Clock counter */
00212     outr(TC0_CCR, TC_CLKEN);
00213     /* Validate the RC compare interrupt */
00214     outr(TC0_IER, TC_CPCS);
00215 
00216     /* Register timer interrupt handler. */
00217     NutRegisterIrqHandler(&sig_TC0, handler, 0);
00218     /* Set to lowest priority. */
00219     NutIrqSetPriority(&sig_TC0, 0);
00220 
00221     /* Enable timer 0 interrupts */
00222     NutIrqEnable(&sig_TC0);
00223     //outr(AIC_IECR, _BV(TC0_ID));
00224 
00225     /* Set compare value for 1 ms. */
00226 #if defined(AT91_PLL_MAINCK)
00227     outr(TC0_RC, At91GetMasterClock() / (32 * NUT_TICK_FREQ));
00228 #else
00229     outr(TC0_RC, NutGetCpuClock() / (32 * NUT_TICK_FREQ));
00230 #endif
00231 
00232     /* Software trigger starts the clock. */
00233     outr(TC0_CCR, TC_SWTRG);
00234 
00235 #endif  /* NUT_TICK_AT91PIT */
00236 }
00237 
00238 #if defined(AT91_PLL_MAINCK)
00239 
00240 #if !defined(AT91_SLOW_CLOCK)
00241 /* This is just a guess and may be completely wrong. */
00242 #define AT91_SLOW_CLOCK 32000
00243 #endif
00244 
00252 static unsigned int At91GetPllClock(int plla)
00253 {
00254     unsigned int rc;
00255     unsigned int pllr;
00256     unsigned int divider;
00257 
00258     /* 
00259      * The main oscillator clock frequency is specified by the
00260      * configuration. It's usually equal to the on-board crystal.
00261      */
00262     rc = AT91_PLL_MAINCK;
00263 
00264     /* Retrieve the clock generator register of the selected PLL. */
00265 #if defined(CKGR_PLLAR) && defined(CKGR_PLLBR)
00266     pllr = plla ? inr(CKGR_PLLAR) : inr(CKGR_PLLBR);
00267 #else
00268     pllr = inr(CKGR_PLLR);
00269 #endif
00270 
00271     /* Extract the divider value. */
00272     divider = (pllr & CKGR_DIV) >> CKGR_DIV_LSB;
00273 
00274     if (divider) {
00275         rc /= divider;
00276         rc *= ((pllr & CKGR_MUL) >> CKGR_MUL_LSB) + 1;
00277     }
00278     return rc;
00279 }
00280 
00286 static uint32_t At91GetProcessorClock(void)
00287 {
00288     unsigned int rc = 0;
00289     unsigned int mckr = inr(PMC_MCKR);
00290 
00291     /* Determine the clock source. */
00292     switch(mckr & PMC_CSS) {
00293     case PMC_CSS_SLOW_CLK:
00294         /* Slow clock selected. */
00295         rc = AT91_SLOW_CLOCK;
00296         break;
00297     case PMC_CSS_MAIN_CLK:
00298         /* Main clock selected. */
00299         rc = AT91_PLL_MAINCK;
00300         break;
00301 #if defined(PMC_CSS_PLLA_CLK)
00302     case PMC_CSS_PLLA_CLK:
00303         /* PLL A clock selected. */
00304         rc = At91GetPllClock(1);
00305         break;
00306 #endif
00307 #if defined(PMC_CSS_PLLB_CLK)
00308     case PMC_CSS_PLLB_CLK:
00309         /* PLL (B) clock selected. */
00310         rc = At91GetPllClock(0);
00311         break;
00312 #elif defined(PMC_CSS_PLL_CLK)
00313     case PMC_CSS_PLL_CLK:
00314         /* PLL (B) clock selected. */
00315         rc = At91GetPllClock(0);
00316         break;
00317 #endif
00318     }
00319 
00320     /* Handle pre-scaling. */
00321     mckr &= PMC_PRES;
00322     mckr >>= PMC_PRES_LSB;
00323     if (mckr < 7) {
00324         rc /= _BV(mckr);
00325     }
00326     else {
00327         rc = 0;
00328     }
00329     return rc;
00330 }
00331 
00339 uint32_t At91GetMasterClock(void)
00340 {
00341     return NutArchClockGet(NUT_HWCLK_PERIPHERAL);
00342 }
00343 
00344 #endif /* AT91_PLL_MAINCK */
00345 
00346 #ifndef NUT_CPU_FREQ
00347 
00356 uint32_t NutArchClockGet(int idx)
00357 {
00358     uint32_t rc = 0;
00359 
00360     if (idx == NUT_HWCLK_CPU) {
00361 #if defined(AT91_PLL_MAINCK)
00362         rc = At91GetProcessorClock();
00363 #elif defined(NUT_PLL_CPUCLK)
00364         rc = Cy2239xGetFreq(NUT_PLL_CPUCLK, 7);
00365 #else
00366 #warning "No CPU Clock defined"
00367 #endif
00368     }
00369 #if defined(AT91_PLL_MAINCK)
00370     if (idx == NUT_HWCLK_PERIPHERAL) {
00371         rc = At91GetProcessorClock();
00372 #if defined(PMC_MDIV)
00373         switch(inr(PMC_MCKR) & PMC_MDIV) {
00374         case PMC_MDIV_2:
00375             rc /= 2;
00376             break;
00377         case PMC_MDIV_4:
00378             rc /= 4;
00379             break;
00380         }
00381 #endif
00382     }
00383 #endif
00384     return rc;
00385 }
00386 #endif
00387 
00393 uint32_t NutGetTickClock(void)
00394 {
00395     unsigned int rc;
00396 
00397 #if defined(NUT_TICK_AT91PIT)
00398     rc = ((inr(PIT_MR) & PIT_PIV) + 1) * 16;
00399 #else
00400     rc = inr(TC0_RC) * 32;
00401 #endif
00402 
00403     if (rc) {
00404 #if defined(AT91_PLL_MAINCK)
00405         return At91GetMasterClock() / rc;
00406 #else
00407         return NutGetCpuClock() / rc;
00408 #endif
00409     }
00410     return NUT_TICK_FREQ;
00411 }
00412 
00416 uint32_t NutTimerMillisToTicks(uint32_t ms)
00417 {
00418     return (ms * NutGetTickClock()) / 1000;
00419 }
00420 

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