Reset controller registers.
More...
Detailed Description
Reset controller registers.
Define Documentation
#define RSTC_CR (RSTC_BASE + 0x00) |
#define RSTC_PROCRST 0x00000001 |
#define RSTC_PERRST 0x00000004 |
#define RSTC_EXTRST 0x00000008 |
#define RSTC_KEY 0xA5000000 |
#define RSTC_SR (RSTC_BASE + 0x04) |
#define RSTC_URSTS 0x00000001 |
#define RSTC_BODSTS 0x00000002 |
Brownout detection status.
Definition at line 71 of file at91_rstc.h.
#define RSTC_RSTTYP 0x00000700 |
#define RSTC_RSTTYP_POWERUP 0x00000000 |
#define RSTC_RSTTYP_WAKEUP 0x00000100 |
#define RSTC_RSTTYP_WATCHDOG 0x00000200 |
#define RSTC_RSTTYP_SOFTWARE 0x00000300 |
#define RSTC_RSTTYP_USER 0x00000400 |
#define RSTC_RSTTYP_BROWNOUT 0x00000500 |
#define RSTC_NRSTL 0x00010000 |
#define RSTC_SRCMP 0x00020000 |
Software reset command in progress.
Definition at line 80 of file at91_rstc.h.
#define RSTC_MR (RSTC_BASE + 0x08) |
Reset controller mode register address.
Definition at line 85 of file at91_rstc.h.
#define RSTC_URSTEN 0x00000001 |
#define RSTC_URSTIEN 0x00000010 |
User reset interrupt enable.
Definition at line 87 of file at91_rstc.h.
#define RSTC_ERSTL 0x00000F00 |
External reset length.
Definition at line 88 of file at91_rstc.h.
Least significant bit of external reset length.
Definition at line 89 of file at91_rstc.h.
#define RSTC_BODIEN 0x00010000 |
Brown-out detection interrupt enable.
Definition at line 90 of file at91_rstc.h.
Function Documentation
int At91ResetCause |
( |
void |
|
) |
|
Definition at line 67 of file at91_reset.c.
References inr, NUT_RSTTYP_BROWNOUT, NUT_RSTTYP_EXTERNAL, NUT_RSTTYP_POWERUP, NUT_RSTTYP_SOFTWARE, NUT_RSTTYP_UNKNOWN, NUT_RSTTYP_WATCHDOG, RSTC_RSTTYP, RSTC_RSTTYP_BROWNOUT, RSTC_RSTTYP_POWERUP, RSTC_RSTTYP_SOFTWARE, RSTC_RSTTYP_USER, RSTC_RSTTYP_WATCHDOG, and RSTC_SR.
Referenced by NutResetCause().