NPL Tutorial - Trouble Recovery
Is there still hope?
Sooner or later you may end up with a misprogrammed CPLD. In the best case, the bootloader is still working and you can upload a corrected programming file. In the worst case you end up with a dead board, which you may not get back to live even with the method presented here.
Now a JTAG programming adapter is the only remaining solution. The Turtelizer is the one shipped with Ethernut 3. It's slow and very limited, but it can upload a program image into the internal RAM of the CPU, where it is protected against all harm a weird CPLD may cause to the board. Fortunately, a CPLD can never be misprogrammed in a way that disables further reporgramming.
Just one thing is left to be solved. When the JTAG jumpers on the Ethernut Board are set for JTAG programming of the CPU, then the uploaded XSVF Executor will fail with the wrong jumper setting. If we set the jumpers for CPLD programming by the CPU, we will not be able to upload the XSVF Executor. So we simple set the jumpers for both methods, which is possible and shown here.
[[File:../../img/at91-xc95-emergency.png|Executor Emergency]] Jumper your board, connect it to the Turtelizer Programming Adapter and connect the Turtelizer with an serial port of your desktop computer. If you got a second serial port, then start the terminal emulator as well and use it to display the Ethernut RS232 output.
On the Windows command line enter
$ jtagomat -aCOM1 -DDEVICE=0x1F0F0F0F -DIMAGE=c:/ethernut-4.1.1/nut/bin/arm7tdmi/xsvfexec.bin BATCH at91-upl.jom RAM
Your path to the xsvfexec.bin file might differ, but you need the specify the full path due to a bug in the JTAG-O-MAT. Now you can go to get some coffee. Uploading large programs into the CPU RAM with the Turtelizer really takes a lot of time. If the upload succeeded and your terminal emulator is running, you should finally see the message
Further information about using the JTAG-O-MAT with Ethernut and the Turtelizer is available on the [[../hardware/enut3/jtag.html|Ethernut 3 JTAG Page]].
Yes, there is hope.
What if even the method described above fails? Well, then you need some extra hardware, for which Xilinx published this schematic.
This adapter is for the parallel port and you will use iMPACT to program the CPLD directly. The required jumper setting is shown here: