00001 #ifndef _LPC17XX_RTC_H_ 00002 #define _LPC17XX_RTC_H_ 00003 00004 /* 00005 * Copyright (C) 2012 by Ole Reinhardt (ole.reinhardt@embedded-it.de) 00006 * 00007 * All rights reserved. 00008 * 00009 * Redistribution and use in source and binary forms, with or without 00010 * modification, are permitted provided that the following conditions 00011 * are met: 00012 * 00013 * 1. Redistributions of source code must retain the above copyright 00014 * notice, this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright 00016 * notice, this list of conditions and the following disclaimer in the 00017 * documentation and/or other materials provided with the distribution. 00018 * 3. Neither the name of the copyright holders nor the names of 00019 * contributors may be used to endorse or promote products derived 00020 * from this software without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00023 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00024 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00025 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00026 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00027 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00028 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 00029 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 00030 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00031 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 00032 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00033 * SUCH DAMAGE. 00034 * 00035 * For additional information see http://www.ethernut.de/ 00036 * 00037 * Parts taken from lpc177x_8x_rtc.h 2011-06-02 00038 * file lpc177x_8x_rtc.h 00039 * brief Contains all macro definitions and function prototypes 00040 * support for Ethernet MAC firmware library on LPC177x_8x 00041 * version 1.0 00042 * date 02. June. 2011 00043 * author NXP MCU SW Application Team 00044 * 00045 * Copyright(C) 2011, NXP Semiconductor 00046 * All rights reserved. 00047 * 00048 *********************************************************************** 00049 * Software that is described herein is for illustrative purposes only 00050 * which provides customers with programming information regarding the 00051 * products. This software is supplied "AS IS" without any warranties. 00052 * NXP Semiconductors assumes no responsibility or liability for the 00053 * use of the software, conveys no license or title under any patent, 00054 * copyright, or mask work right to the product. NXP Semiconductors 00055 * reserves the right to make changes in the software without 00056 * notification. NXP Semiconductors also make no representation or 00057 * warranty that such application will be suitable for the specified 00058 * use without further testing or modification. 00059 **********************************************************************/ 00060 00068 /*============================================================================* 00069 LPC17xx RTC misc register defines 00070 *============================================================================*/ 00071 00072 /*----------------------------------------------------------------------------* 00073 ILR register definitions 00074 *----------------------------------------------------------------------------*/ 00075 00076 /* ILR register mask */ 00077 #define RTC_ILR_BITMASK 0x00000003 00078 00079 /* Bit inform the source interrupt is counter increment*/ 00080 #define RTC_IRL_RTCCIF _BV(0) 00081 00082 /* Bit inform the source interrupt is alarm match*/ 00083 #define RTC_IRL_RTCALF _BV(1) 00084 00085 00086 /*----------------------------------------------------------------------------* 00087 CCR register definitions 00088 *----------------------------------------------------------------------------*/ 00089 00090 /* CCR register mask */ 00091 #define RTC_CCR_BITMASK 0x00000013 00092 00093 /* Clock enable */ 00094 #define RTC_CCR_CLKEN _BV(0) 00095 00096 /* Clock reset */ 00097 #define RTC_CCR_CTCRST _BV(1) 00098 00099 /* Calibration counter enable */ 00100 #define RTC_CCR_CCALEN _BV(4) 00101 00102 00103 /*----------------------------------------------------------------------------* 00104 CIIR register definitions 00105 *----------------------------------------------------------------------------*/ 00106 00107 /* Counter Increment Interrupt bit for second */ 00108 #define RTC_CIIR_IMSEC _BV(0) 00109 00110 /* Counter Increment Interrupt bit for minute */ 00111 #define RTC_CIIR_IMMIN _BV(1) 00112 00113 /* Counter Increment Interrupt bit for hour */ 00114 #define RTC_CIIR_IMHOUR _BV(2) 00115 00116 /* Counter Increment Interrupt bit for day of month */ 00117 #define RTC_CIIR_IMDOM _BV(3) 00118 00119 /* Counter Increment Interrupt bit for day of week */ 00120 #define RTC_CIIR_IMDOW _BV(4) 00121 00122 /* Counter Increment Interrupt bit for day of year */ 00123 #define RTC_CIIR_IMDOY _BV(5) 00124 00125 /* Counter Increment Interrupt bit for month */ 00126 #define RTC_CIIR_IMMON _BV(6) 00127 00128 /* Counter Increment Interrupt bit for year */ 00129 #define RTC_CIIR_IMYEAR _BV(7) 00130 00131 /* CIIR bit mask */ 00132 #define RTC_CIIR_BITMASK 0xFF 00133 00134 00135 /*----------------------------------------------------------------------------* 00136 AMR register definitions 00137 *----------------------------------------------------------------------------*/ 00138 00139 /* Counter Increment Select Mask bit for second */ 00140 #define RTC_AMR_AMRSEC _BV(0) 00141 00142 /* Counter Increment Select Mask bit for minute */ 00143 #define RTC_AMR_AMRMIN _BV(1) 00144 00145 /* Counter Increment Select Mask bit for hour */ 00146 #define RTC_AMR_AMRHOUR _BV(2) 00147 00148 /* Counter Increment Select Mask bit for day of month */ 00149 #define RTC_AMR_AMRDOM _BV(3) 00150 00151 /* Counter Increment Select Mask bit for day of week */ 00152 #define RTC_AMR_AMRDOW _BV(4) 00153 00154 /* Counter Increment Select Mask bit for day of year */ 00155 #define RTC_AMR_AMRDOY _BV(5) 00156 00157 /* Counter Increment Select Mask bit for month */ 00158 #define RTC_AMR_AMRMON _BV(6) 00159 00160 /* Counter Increment Select Mask bit for year */ 00161 #define RTC_AMR_AMRYEAR _BV(7) 00162 00163 /* AMR bit mask */ 00164 #define RTC_AMR_BITMASK 0xFF 00165 00166 00167 /*----------------------------------------------------------------------------* 00168 RTC_AUX register definitions 00169 *----------------------------------------------------------------------------*/ 00170 00171 /* RTC Oscillator Fail detect flag */ 00172 #define RTC_AUX_RTC_OSCF _BV(4) 00173 00174 00175 /*----------------------------------------------------------------------------* 00176 RTC_AUXEN register definitions 00177 *----------------------------------------------------------------------------*/ 00178 00179 /* Oscillator Fail Detect interrupt enable*/ 00180 #define RTC_AUXEN_RTC_OSCFEN _BV(4) 00181 00182 00183 /*============================================================================* 00184 Consolidated time registers 00185 *============================================================================*/ 00186 00187 /*----------------------------------------------------------------------------* 00188 Consolidated Time Register 0 definitions 00189 *----------------------------------------------------------------------------*/ 00190 00191 #define RTC_CTIME0_SECONDS_MASK 0x3F 00192 #define RTC_CTIME0_MINUTES_MASK 0x3F00 00193 #define RTC_CTIME0_HOURS_MASK 0x1F0000 00194 #define RTC_CTIME0_DOW_MASK 0x7000000 00195 00196 /*----------------------------------------------------------------------------* 00197 Consolidated Time Register 1 definitions 00198 *----------------------------------------------------------------------------*/ 00199 00200 #define RTC_CTIME1_DOM_MASK 0x1F 00201 #define RTC_CTIME1_MONTH_MASK 0xF00 00202 #define RTC_CTIME1_YEAR_MASK 0xFFF0000 00203 00204 00205 /*----------------------------------------------------------------------------* 00206 Consolidated Time Register 2 definitions 00207 *----------------------------------------------------------------------------*/ 00208 00209 #define RTC_CTIME2_DOY_MASK 0x0FFF 00210 00211 00212 /*----------------------------------------------------------------------------* 00213 Time Counter Group and Alarm register 00214 *----------------------------------------------------------------------------*/ 00215 00216 /* SEC register mask */ 00217 #define RTC_SEC_MASK 0x0000003F 00218 00219 /* MIN register mask */ 00220 #define RTC_MIN_MASK 0x0000003F 00221 00222 /* HOUR register mask */ 00223 #define RTC_HOUR_MASK 0x0000001F 00224 00225 /* DOM register mask */ 00226 #define RTC_DOM_MASK 0x0000001F 00227 00228 /* DOW register mask */ 00229 #define RTC_DOW_MASK 0x00000007 00230 00231 /* DOY register mask */ 00232 #define RTC_DOY_MASK 0x000001FF 00233 00234 /* MONTH register mask */ 00235 #define RTC_MONTH_MASK 0x0000000F 00236 00237 /* YEAR register mask */ 00238 #define RTC_YEAR_MASK 0x00000FFF 00239 00240 00241 /* Maximum value of second */ 00242 #define RTC_SECOND_MAX 59 00243 00244 /* Maximum value of minute*/ 00245 #define RTC_MINUTE_MAX 59 00246 00247 /* Maximum value of hour*/ 00248 #define RTC_HOUR_MAX 23 00249 00250 /* Minimum value of month*/ 00251 #define RTC_MONTH_MIN 1 00252 00253 /* Maximum value of month*/ 00254 #define RTC_MONTH_MAX 12 00255 00256 /* Minimum value of day of month*/ 00257 #define RTC_DAYOFMONTH_MIN 1 00258 00259 /* Maximum value of day of month*/ 00260 #define RTC_DAYOFMONTH_MAX 31 00261 00262 /* Maximum value of day of week*/ 00263 #define RTC_DAYOFWEEK_MAX 6 00264 00265 /* Minimum value of day of year*/ 00266 #define RTC_DAYOFYEAR_MIN 1 00267 00268 /* Maximum value of day of year*/ 00269 #define RTC_DAYOFYEAR_MAX 366 00270 00271 /* Maximum value of year*/ 00272 #define RTC_YEAR_MAX 4095 00273 00274 00275 /*----------------------------------------------------------------------------* 00276 Calibration register 00277 *----------------------------------------------------------------------------*/ 00278 00279 /* Calibration value */ 00280 #define RTC_CALIBRATION_CALVAL_MASK 0x1FFFF 00281 00282 /* Calibration direction */ 00283 #define RTC_CALIBRATION_LIBDIR _BV(17) 00284 00285 /* Calibration max value */ 00286 #define RTC_CALIBRATION_MAX 0x20000 00287 00288 /* Calibration definitions */ 00289 #define RTC_CALIB_DIR_FORWARD 0 00290 #define RTC_CALIB_DIR_BACKWARD 1 00291 00292 00293 #endif /* __LPC17XX_RTC_H_ */