Go to the documentation of this file.00001 #ifndef _DEV_MMA745X_H_
00002 #define _DEV_MMA745X_H_
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00046 #ifndef I2C_SLA_MMA745x
00047 #define I2C_SLA_MMA745x 0x1D
00048 #endif
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00051
00052
00053 #define MMA745x_REG_XOUTL 0x00
00054 #define MMA745x_REG_XOUTH 0x01
00055 #define MMA745x_REG_YOUTL 0x02
00056 #define MMA745x_REG_YOUTH 0x03
00057 #define MMA745x_REG_ZOUTL 0x04
00058 #define MMA745x_REG_ZOUTH 0x05
00060 #define MMA745x_REG_XOUT8 0x06
00061 #define MMA745x_REG_YOUT8 0x07
00062 #define MMA745x_REG_ZOUT8 0x08
00064 #define MMA745x_REG_STATUS 0x09
00065 #define MMA745x_REG_DETSRC 0x0A
00067 #define MMA745x_REG_TOUT 0x0B
00068 #define MMA745x_REG_I2CAD 0x0D
00069 #define MMA745x_REG_USRINF 0x0E
00070 #define MMA745x_REG_WHOAMI 0x0E
00072 #define MMA745x_REG_XOFFL 0x10
00073 #define MMA745x_REG_XOFFH 0x11
00074 #define MMA745x_REG_YOFFL 0x12
00075 #define MMA745x_REG_YOFFH 0x13
00076 #define MMA745x_REG_ZOFFL 0x14
00077 #define MMA745x_REG_ZOFFH 0x15
00079 #define MMA745x_REG_MCTL 0x16
00080 #define MMA745x_REG_INTRST 0x17
00081 #define MMA745x_REG_CTL1 0x18
00082 #define MMA745x_REG_CTL2 0x19
00083 #define MMA745x_REG_LDTH 0x1A
00084 #define MMA745x_REG_PDTH 0x1B
00085 #define MMA745x_REG_PW 0x1C
00086 #define MMA745x_REG_LT 0x1D
00087 #define MMA745x_REG_TW 0x1E
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00093 #define MMA745X_STATUS_DRDY (1 << 0)
00094 #define MMA745X_STATUS_DOVR (1 << 1)
00095 #define MMA745X_STATUS_PERR (1 << 2)
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00101 #define MMA745x_DETSRC_INT1 (1 << 0)
00102 #define MMA745x_DETSRC_INT2 (1 << 1)
00103 #define MMA745x_DETSRC_PDZ (1 << 2)
00104 #define MMA745x_DETSRC_PDY (1 << 3)
00105 #define MMA745x_DETSRC_PDX (1 << 4)
00106 #define MMA745x_DETSRC_LDZ (1 << 5)
00107 #define MMA745x_DETSRC_LDY (1 << 6)
00108 #define MMA745x_DETSRC_LDX (1 << 7)
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00114 #define MMA745x_I2CAD_I2CDIS (1 << 7)
00115 #define MMA745x_I2CAD_I2CMSK (0x7F)
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00121 #define MMA745X_MCTL_STBY (0x00 << 0)
00122 #define MMA745X_MCTL_MEAS (0x01 << 0)
00123 #define MMA745X_MCTL_LVL (0x02 << 0)
00124 #define MMA745X_MCTL_PLS (0x03 << 0)
00125 #define MMA745X_MCTL_MSK (0x03 << 0)
00127 #define MMA745X_MCTL_GLVL_8G (0x00 << 2)
00128 #define MMA745X_MCTL_GLVL_4G (0x02 << 2)
00129 #define MMA745X_MCTL_GLVL_2G (0x01 << 2)
00130 #define MMA745X_MCTL_GLVL_MSK (0x03 << 2)
00132 #define MMA745X_MCTL_STON (1 << 4)
00133 #define MMA745X_MCTL_SPI3W (1 << 5)
00134 #define MMA745X_MCTL_DRPD (1 << 6)
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00140 #define MMA745x_INTRST_CLRINT1 (1 << 0)
00141 #define MMA745x_INTRST_CLRINT2 (1 << 1)
00142 #define MMA745x_INTRST_MSK (MMA745x_INTRST_CLRINT1 | MMA745x_INTRST_CLRINT2)
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00147 #define MMA745x_CTL1_INTREV (1 << 0)
00149 #define MMA745x_CTL1_L1P2 (0x00 << 1)
00150 #define MMA745x_CTL1_P1L2 (0x01 << 1)
00151 #define MMA745x_CTL1_P1P2 (0x02 << 1)
00152 #define MMA745x_CTL1_XDA (1 << 3)
00153 #define MMA745x_CTL1_YDA (1 << 4)
00154 #define MMA745x_CTL1_ZDA (1 << 5)
00155 #define MMA745x_CTL1_THOPT (1 << 6)
00156 #define MMA745x_CTL1_DFBW (1 << 7)
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00162 #define MMA745x_CTL2_LDPL (1 << 0)
00164 #define MMA745x_CTL2_PDPL (1 << 1)
00166 #define MMA745x_CTL2_DRVO (1 << 2)
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00176 #define MMA745x_LDTH_SMSK 0x7F
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00185 #define MMA745x_PDTH_SMSK 0x7F
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00194 #define MMA745x_PW_MSK 0xFF
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00203 #define MMA745x_LT_MSK 0xFF
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00212 #define MMA745x_TW_MSK 0xFF
00214 #include <cfg/mma745x.h>
00215
00216 #ifndef MMA745X_RANGE
00217 #define MMA745X_RANGE MMA745X_MCTL_GLVL_8G
00218 #endif
00219
00220 #ifndef MMA74xx_MODE
00221 #define MMA74xx_MODE (MMA745X_MCTL_MEAS | MMA745X_RANGE)
00222 #endif
00223
00226 typedef struct __attribute__ ((packed))
00227 {
00228 int16_t x;
00229 int16_t y;
00230 int16_t z;
00231 } mma10bit_t;
00232
00235 typedef struct __attribute__ ((packed))
00236 {
00237 int8_t x;
00238 int8_t y;
00239 int8_t z;
00240 } mma8bit_t;
00241
00244 typedef struct __attribute__ ((packed))
00245 {
00246 uint8_t rMODE;
00247 uint8_t rINTRST;
00248 uint8_t rCONTROL1;
00249 uint8_t rCONTROL2;
00250 uint8_t rLEVEL;
00251 uint8_t rPVALUE;
00252 uint8_t rPDUR;
00253 uint8_t rLATTV;
00254 uint8_t rTW;
00255 } mmaInit_t;
00256
00259 typedef struct __attribute__ ((packed))
00260 {
00261 uint8_t state;
00262 uint8_t detsrc;
00263 } mmaState_t;
00264
00265
00266
00267 #define MMA_GET_STATE 0
00268 #define MMA_SET_MODE 1
00269 #define MMA_GET_IRQ 2
00270 #define MMA_SET_IRQ 3
00271 #define MMA_CLR_IRQ 4
00272
00273
00274 int Mma745xWrite( uint_fast8_t reg, void *val, size_t len);
00275 int Mma745xRead( uint_fast8_t reg, void *val, size_t len);
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00278 int Mma745xReadVal8( mma8bit_t *val);
00279 int Mma745xReadVal10( uint8_t ofs, mma10bit_t *val);
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00281
00282 int Mma745xReadG( mma10bit_t *val);
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00285 int Mma745xReadCal( mma10bit_t *cal);
00286 int Mma745xWriteCal( mma10bit_t *cal);
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00289 int Mma745xCtl( uint_fast8_t fkt, void *val);
00290
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00292 int Mma745xInit( uint_fast8_t selftest, mmaInit_t *init);
00293
00294 #endif