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Nut/OS
5.0.5
API Reference
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Nut/OS
5.0.5
API Reference
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00001 00022 /* Define to prevent recursive inclusion -------------------------------------*/ 00023 #ifndef __STM32F10x_I2C_H 00024 #define __STM32F10x_I2C_H 00025 00026 #ifdef __cplusplus 00027 extern "C" { 00028 #endif 00029 00030 /* Includes ------------------------------------------------------------------*/ 00031 #include "stm32f10x.h" 00032 00049 typedef struct 00050 { 00051 uint32_t I2C_ClockSpeed; 00054 uint16_t I2C_Mode; 00057 uint16_t I2C_DutyCycle; 00060 uint16_t I2C_OwnAddress1; 00063 uint16_t I2C_Ack; 00066 uint16_t I2C_AcknowledgedAddress; 00068 }I2C_InitTypeDef; 00069 00079 #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \ 00080 ((PERIPH) == I2C2)) 00081 00085 #define I2C_Mode_I2C ((uint16_t)0x0000) 00086 #define I2C_Mode_SMBusDevice ((uint16_t)0x0002) 00087 #define I2C_Mode_SMBusHost ((uint16_t)0x000A) 00088 #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \ 00089 ((MODE) == I2C_Mode_SMBusDevice) || \ 00090 ((MODE) == I2C_Mode_SMBusHost)) 00091 00099 #define I2C_DutyCycle_16_9 ((uint16_t)0x4000) 00100 #define I2C_DutyCycle_2 ((uint16_t)0xBFFF) 00101 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \ 00102 ((CYCLE) == I2C_DutyCycle_2)) 00103 00111 #define I2C_Ack_Enable ((uint16_t)0x0400) 00112 #define I2C_Ack_Disable ((uint16_t)0x0000) 00113 #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \ 00114 ((STATE) == I2C_Ack_Disable)) 00115 00123 #define I2C_Direction_Transmitter ((uint8_t)0x00) 00124 #define I2C_Direction_Receiver ((uint8_t)0x01) 00125 #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \ 00126 ((DIRECTION) == I2C_Direction_Receiver)) 00127 00135 #define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000) 00136 #define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000) 00137 #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \ 00138 ((ADDRESS) == I2C_AcknowledgedAddress_10bit)) 00139 00147 #define I2C_Register_CR1 ((uint8_t)0x00) 00148 #define I2C_Register_CR2 ((uint8_t)0x04) 00149 #define I2C_Register_OAR1 ((uint8_t)0x08) 00150 #define I2C_Register_OAR2 ((uint8_t)0x0C) 00151 #define I2C_Register_DR ((uint8_t)0x10) 00152 #define I2C_Register_SR1 ((uint8_t)0x14) 00153 #define I2C_Register_SR2 ((uint8_t)0x18) 00154 #define I2C_Register_CCR ((uint8_t)0x1C) 00155 #define I2C_Register_TRISE ((uint8_t)0x20) 00156 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \ 00157 ((REGISTER) == I2C_Register_CR2) || \ 00158 ((REGISTER) == I2C_Register_OAR1) || \ 00159 ((REGISTER) == I2C_Register_OAR2) || \ 00160 ((REGISTER) == I2C_Register_DR) || \ 00161 ((REGISTER) == I2C_Register_SR1) || \ 00162 ((REGISTER) == I2C_Register_SR2) || \ 00163 ((REGISTER) == I2C_Register_CCR) || \ 00164 ((REGISTER) == I2C_Register_TRISE)) 00165 00173 #define I2C_SMBusAlert_Low ((uint16_t)0x2000) 00174 #define I2C_SMBusAlert_High ((uint16_t)0xDFFF) 00175 #define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \ 00176 ((ALERT) == I2C_SMBusAlert_High)) 00177 00185 #define I2C_PECPosition_Next ((uint16_t)0x0800) 00186 #define I2C_PECPosition_Current ((uint16_t)0xF7FF) 00187 #define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \ 00188 ((POSITION) == I2C_PECPosition_Current)) 00189 00197 #define I2C_IT_BUF ((uint16_t)0x0400) 00198 #define I2C_IT_EVT ((uint16_t)0x0200) 00199 #define I2C_IT_ERR ((uint16_t)0x0100) 00200 #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00)) 00201 00209 #define I2C_IT_SMBALERT ((uint32_t)0x01008000) 00210 #define I2C_IT_TIMEOUT ((uint32_t)0x01004000) 00211 #define I2C_IT_PECERR ((uint32_t)0x01001000) 00212 #define I2C_IT_OVR ((uint32_t)0x01000800) 00213 #define I2C_IT_AF ((uint32_t)0x01000400) 00214 #define I2C_IT_ARLO ((uint32_t)0x01000200) 00215 #define I2C_IT_BERR ((uint32_t)0x01000100) 00216 #define I2C_IT_TXE ((uint32_t)0x06000080) 00217 #define I2C_IT_RXNE ((uint32_t)0x06000040) 00218 #define I2C_IT_STOPF ((uint32_t)0x02000010) 00219 #define I2C_IT_ADD10 ((uint32_t)0x02000008) 00220 #define I2C_IT_BTF ((uint32_t)0x02000004) 00221 #define I2C_IT_ADDR ((uint32_t)0x02000002) 00222 #define I2C_IT_SB ((uint32_t)0x02000001) 00223 00224 #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00)) 00225 00226 #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \ 00227 ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \ 00228 ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \ 00229 ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \ 00230 ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \ 00231 ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \ 00232 ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB)) 00233 00245 #define I2C_FLAG_DUALF ((uint32_t)0x00800000) 00246 #define I2C_FLAG_SMBHOST ((uint32_t)0x00400000) 00247 #define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000) 00248 #define I2C_FLAG_GENCALL ((uint32_t)0x00100000) 00249 #define I2C_FLAG_TRA ((uint32_t)0x00040000) 00250 #define I2C_FLAG_BUSY ((uint32_t)0x00020000) 00251 #define I2C_FLAG_MSL ((uint32_t)0x00010000) 00252 00257 #define I2C_FLAG_SMBALERT ((uint32_t)0x10008000) 00258 #define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000) 00259 #define I2C_FLAG_PECERR ((uint32_t)0x10001000) 00260 #define I2C_FLAG_OVR ((uint32_t)0x10000800) 00261 #define I2C_FLAG_AF ((uint32_t)0x10000400) 00262 #define I2C_FLAG_ARLO ((uint32_t)0x10000200) 00263 #define I2C_FLAG_BERR ((uint32_t)0x10000100) 00264 #define I2C_FLAG_TXE ((uint32_t)0x10000080) 00265 #define I2C_FLAG_RXNE ((uint32_t)0x10000040) 00266 #define I2C_FLAG_STOPF ((uint32_t)0x10000010) 00267 #define I2C_FLAG_ADD10 ((uint32_t)0x10000008) 00268 #define I2C_FLAG_BTF ((uint32_t)0x10000004) 00269 #define I2C_FLAG_ADDR ((uint32_t)0x10000002) 00270 #define I2C_FLAG_SB ((uint32_t)0x10000001) 00271 00272 #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00)) 00273 00274 #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \ 00275 ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \ 00276 ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \ 00277 ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \ 00278 ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \ 00279 ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \ 00280 ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \ 00281 ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \ 00282 ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \ 00283 ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \ 00284 ((FLAG) == I2C_FLAG_SB)) 00285 00293 /*======================================== 00294 00295 I2C Master Events (Events grouped in order of communication) 00296 ==========================================*/ 00305 /* --EV5 */ 00306 #define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */ 00307 00333 /* --EV6 */ 00334 #define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */ 00335 #define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */ 00336 /* --EV9 */ 00337 #define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */ 00338 00368 /* Master RECEIVER mode -----------------------------*/ 00369 /* --EV7 */ 00370 #define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */ 00371 00372 /* Master TRANSMITTER mode --------------------------*/ 00373 /* --EV8 */ 00374 #define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */ 00375 /* --EV8_2 */ 00376 #define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */ 00377 00378 00379 /*======================================== 00380 00381 I2C Slave Events (Events grouped in order of communication) 00382 ==========================================*/ 00383 00409 /* --EV1 (all the events below are variants of EV1) */ 00410 /* 1) Case of One Single Address managed by the slave */ 00411 #define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */ 00412 #define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */ 00413 00414 /* 2) Case of Dual address managed by the slave */ 00415 #define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */ 00416 #define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */ 00417 00418 /* 3) Case of General Call enabled for the slave */ 00419 #define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */ 00420 00448 /* Slave RECEIVER mode --------------------------*/ 00449 /* --EV2 */ 00450 #define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */ 00451 /* --EV4 */ 00452 #define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */ 00453 00454 /* Slave TRANSMITTER mode -----------------------*/ 00455 /* --EV3 */ 00456 #define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */ 00457 #define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */ 00458 /* --EV3_2 */ 00459 #define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */ 00460 00461 /*=========================== End of Events Description ==========================================*/ 00462 00463 #define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \ 00464 ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \ 00465 ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \ 00466 ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \ 00467 ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \ 00468 ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \ 00469 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \ 00470 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \ 00471 ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \ 00472 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \ 00473 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \ 00474 ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \ 00475 ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \ 00476 ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \ 00477 ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \ 00478 ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \ 00479 ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \ 00480 ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \ 00481 ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \ 00482 ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE)) 00483 00491 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF) 00492 00500 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000)) 00501 00521 void I2C_DeInit(I2C_TypeDef* I2Cx); 00522 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct); 00523 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct); 00524 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 00525 void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 00526 void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 00527 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState); 00528 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState); 00529 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState); 00530 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address); 00531 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 00532 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 00533 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState); 00534 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data); 00535 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx); 00536 void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction); 00537 uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register); 00538 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 00539 void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert); 00540 void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState); 00541 void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition); 00542 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState); 00543 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx); 00544 void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 00545 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 00546 void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle); 00547 00631 ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT); 00637 uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx); 00643 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); 00649 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); 00650 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT); 00651 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT); 00652 00653 #ifdef __cplusplus 00654 } 00655 #endif 00656 00657 #endif /*__STM32F10x_I2C_H */ 00658 00670 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/