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Nut/OS
5.0.5
API Reference
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Nut/OS
5.0.5
API Reference
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00001 00022 /* Define to prevent recursive inclusion -------------------------------------*/ 00023 #ifndef __STM32F10x_TIM_H 00024 #define __STM32F10x_TIM_H 00025 00026 #ifdef __cplusplus 00027 extern "C" { 00028 #endif 00029 00030 /* Includes ------------------------------------------------------------------*/ 00031 #include "stm32f10x.h" 00032 00050 typedef struct 00051 { 00052 uint16_t TIM_Prescaler; 00055 uint16_t TIM_CounterMode; 00058 uint16_t TIM_Period; 00062 uint16_t TIM_ClockDivision; 00065 uint8_t TIM_RepetitionCounter; 00073 } TIM_TimeBaseInitTypeDef; 00074 00079 typedef struct 00080 { 00081 uint16_t TIM_OCMode; 00084 uint16_t TIM_OutputState; 00087 uint16_t TIM_OutputNState; 00091 uint16_t TIM_Pulse; 00094 uint16_t TIM_OCPolarity; 00097 uint16_t TIM_OCNPolarity; 00101 uint16_t TIM_OCIdleState; 00105 uint16_t TIM_OCNIdleState; 00108 } TIM_OCInitTypeDef; 00109 00114 typedef struct 00115 { 00116 00117 uint16_t TIM_Channel; 00120 uint16_t TIM_ICPolarity; 00123 uint16_t TIM_ICSelection; 00126 uint16_t TIM_ICPrescaler; 00129 uint16_t TIM_ICFilter; 00131 } TIM_ICInitTypeDef; 00132 00138 typedef struct 00139 { 00140 00141 uint16_t TIM_OSSRState; 00144 uint16_t TIM_OSSIState; 00147 uint16_t TIM_LOCKLevel; 00150 uint16_t TIM_DeadTime; 00154 uint16_t TIM_Break; 00157 uint16_t TIM_BreakPolarity; 00160 uint16_t TIM_AutomaticOutput; 00162 } TIM_BDTRInitTypeDef; 00163 00168 #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ 00169 ((PERIPH) == TIM2) || \ 00170 ((PERIPH) == TIM3) || \ 00171 ((PERIPH) == TIM4) || \ 00172 ((PERIPH) == TIM5) || \ 00173 ((PERIPH) == TIM6) || \ 00174 ((PERIPH) == TIM7) || \ 00175 ((PERIPH) == TIM8) || \ 00176 ((PERIPH) == TIM9) || \ 00177 ((PERIPH) == TIM10)|| \ 00178 ((PERIPH) == TIM11)|| \ 00179 ((PERIPH) == TIM12)|| \ 00180 ((PERIPH) == TIM13)|| \ 00181 ((PERIPH) == TIM14)|| \ 00182 ((PERIPH) == TIM15)|| \ 00183 ((PERIPH) == TIM16)|| \ 00184 ((PERIPH) == TIM17)) 00185 00186 /* LIST1: TIM 1 and 8 */ 00187 #define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ 00188 ((PERIPH) == TIM8)) 00189 00190 /* LIST2: TIM 1, 8, 15 16 and 17 */ 00191 #define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ 00192 ((PERIPH) == TIM8) || \ 00193 ((PERIPH) == TIM15)|| \ 00194 ((PERIPH) == TIM16)|| \ 00195 ((PERIPH) == TIM17)) 00196 00197 /* LIST3: TIM 1, 2, 3, 4, 5 and 8 */ 00198 #define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ 00199 ((PERIPH) == TIM2) || \ 00200 ((PERIPH) == TIM3) || \ 00201 ((PERIPH) == TIM4) || \ 00202 ((PERIPH) == TIM5) || \ 00203 ((PERIPH) == TIM8)) 00204 00205 /* LIST4: TIM 1, 2, 3, 4, 5, 8, 15, 16 and 17 */ 00206 #define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ 00207 ((PERIPH) == TIM2) || \ 00208 ((PERIPH) == TIM3) || \ 00209 ((PERIPH) == TIM4) || \ 00210 ((PERIPH) == TIM5) || \ 00211 ((PERIPH) == TIM8) || \ 00212 ((PERIPH) == TIM15)|| \ 00213 ((PERIPH) == TIM16)|| \ 00214 ((PERIPH) == TIM17)) 00215 00216 /* LIST5: TIM 1, 2, 3, 4, 5, 8 and 15 */ 00217 #define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ 00218 ((PERIPH) == TIM2) || \ 00219 ((PERIPH) == TIM3) || \ 00220 ((PERIPH) == TIM4) || \ 00221 ((PERIPH) == TIM5) || \ 00222 ((PERIPH) == TIM8) || \ 00223 ((PERIPH) == TIM15)) 00224 00225 /* LIST6: TIM 1, 2, 3, 4, 5, 8, 9, 12 and 15 */ 00226 #define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ 00227 ((PERIPH) == TIM2) || \ 00228 ((PERIPH) == TIM3) || \ 00229 ((PERIPH) == TIM4) || \ 00230 ((PERIPH) == TIM5) || \ 00231 ((PERIPH) == TIM8) || \ 00232 ((PERIPH) == TIM9) || \ 00233 ((PERIPH) == TIM12)|| \ 00234 ((PERIPH) == TIM15)) 00235 00236 /* LIST7: TIM 1, 2, 3, 4, 5, 6, 7, 8, 9, 12 and 15 */ 00237 #define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ 00238 ((PERIPH) == TIM2) || \ 00239 ((PERIPH) == TIM3) || \ 00240 ((PERIPH) == TIM4) || \ 00241 ((PERIPH) == TIM5) || \ 00242 ((PERIPH) == TIM6) || \ 00243 ((PERIPH) == TIM7) || \ 00244 ((PERIPH) == TIM8) || \ 00245 ((PERIPH) == TIM9) || \ 00246 ((PERIPH) == TIM12)|| \ 00247 ((PERIPH) == TIM15)) 00248 00249 /* LIST8: TIM 1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 15, 16 and 17 */ 00250 #define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ 00251 ((PERIPH) == TIM2) || \ 00252 ((PERIPH) == TIM3) || \ 00253 ((PERIPH) == TIM4) || \ 00254 ((PERIPH) == TIM5) || \ 00255 ((PERIPH) == TIM8) || \ 00256 ((PERIPH) == TIM9) || \ 00257 ((PERIPH) == TIM10)|| \ 00258 ((PERIPH) == TIM11)|| \ 00259 ((PERIPH) == TIM12)|| \ 00260 ((PERIPH) == TIM13)|| \ 00261 ((PERIPH) == TIM14)|| \ 00262 ((PERIPH) == TIM15)|| \ 00263 ((PERIPH) == TIM16)|| \ 00264 ((PERIPH) == TIM17)) 00265 00266 /* LIST9: TIM 1, 2, 3, 4, 5, 6, 7, 8, 15, 16, and 17 */ 00267 #define IS_TIM_LIST9_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ 00268 ((PERIPH) == TIM2) || \ 00269 ((PERIPH) == TIM3) || \ 00270 ((PERIPH) == TIM4) || \ 00271 ((PERIPH) == TIM5) || \ 00272 ((PERIPH) == TIM6) || \ 00273 ((PERIPH) == TIM7) || \ 00274 ((PERIPH) == TIM8) || \ 00275 ((PERIPH) == TIM15)|| \ 00276 ((PERIPH) == TIM16)|| \ 00277 ((PERIPH) == TIM17)) 00278 00287 #define TIM_OCMode_Timing ((uint16_t)0x0000) 00288 #define TIM_OCMode_Active ((uint16_t)0x0010) 00289 #define TIM_OCMode_Inactive ((uint16_t)0x0020) 00290 #define TIM_OCMode_Toggle ((uint16_t)0x0030) 00291 #define TIM_OCMode_PWM1 ((uint16_t)0x0060) 00292 #define TIM_OCMode_PWM2 ((uint16_t)0x0070) 00293 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ 00294 ((MODE) == TIM_OCMode_Active) || \ 00295 ((MODE) == TIM_OCMode_Inactive) || \ 00296 ((MODE) == TIM_OCMode_Toggle)|| \ 00297 ((MODE) == TIM_OCMode_PWM1) || \ 00298 ((MODE) == TIM_OCMode_PWM2)) 00299 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ 00300 ((MODE) == TIM_OCMode_Active) || \ 00301 ((MODE) == TIM_OCMode_Inactive) || \ 00302 ((MODE) == TIM_OCMode_Toggle)|| \ 00303 ((MODE) == TIM_OCMode_PWM1) || \ 00304 ((MODE) == TIM_OCMode_PWM2) || \ 00305 ((MODE) == TIM_ForcedAction_Active) || \ 00306 ((MODE) == TIM_ForcedAction_InActive)) 00307 00315 #define TIM_OPMode_Single ((uint16_t)0x0008) 00316 #define TIM_OPMode_Repetitive ((uint16_t)0x0000) 00317 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ 00318 ((MODE) == TIM_OPMode_Repetitive)) 00319 00327 #define TIM_Channel_1 ((uint16_t)0x0000) 00328 #define TIM_Channel_2 ((uint16_t)0x0004) 00329 #define TIM_Channel_3 ((uint16_t)0x0008) 00330 #define TIM_Channel_4 ((uint16_t)0x000C) 00331 #define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ 00332 ((CHANNEL) == TIM_Channel_2) || \ 00333 ((CHANNEL) == TIM_Channel_3) || \ 00334 ((CHANNEL) == TIM_Channel_4)) 00335 #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ 00336 ((CHANNEL) == TIM_Channel_2)) 00337 #define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ 00338 ((CHANNEL) == TIM_Channel_2) || \ 00339 ((CHANNEL) == TIM_Channel_3)) 00340 00348 #define TIM_CKD_DIV1 ((uint16_t)0x0000) 00349 #define TIM_CKD_DIV2 ((uint16_t)0x0100) 00350 #define TIM_CKD_DIV4 ((uint16_t)0x0200) 00351 #define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \ 00352 ((DIV) == TIM_CKD_DIV2) || \ 00353 ((DIV) == TIM_CKD_DIV4)) 00354 00362 #define TIM_CounterMode_Up ((uint16_t)0x0000) 00363 #define TIM_CounterMode_Down ((uint16_t)0x0010) 00364 #define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020) 00365 #define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040) 00366 #define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) 00367 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ 00368 ((MODE) == TIM_CounterMode_Down) || \ 00369 ((MODE) == TIM_CounterMode_CenterAligned1) || \ 00370 ((MODE) == TIM_CounterMode_CenterAligned2) || \ 00371 ((MODE) == TIM_CounterMode_CenterAligned3)) 00372 00380 #define TIM_OCPolarity_High ((uint16_t)0x0000) 00381 #define TIM_OCPolarity_Low ((uint16_t)0x0002) 00382 #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \ 00383 ((POLARITY) == TIM_OCPolarity_Low)) 00384 00392 #define TIM_OCNPolarity_High ((uint16_t)0x0000) 00393 #define TIM_OCNPolarity_Low ((uint16_t)0x0008) 00394 #define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \ 00395 ((POLARITY) == TIM_OCNPolarity_Low)) 00396 00404 #define TIM_OutputState_Disable ((uint16_t)0x0000) 00405 #define TIM_OutputState_Enable ((uint16_t)0x0001) 00406 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ 00407 ((STATE) == TIM_OutputState_Enable)) 00408 00416 #define TIM_OutputNState_Disable ((uint16_t)0x0000) 00417 #define TIM_OutputNState_Enable ((uint16_t)0x0004) 00418 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ 00419 ((STATE) == TIM_OutputNState_Enable)) 00420 00428 #define TIM_CCx_Enable ((uint16_t)0x0001) 00429 #define TIM_CCx_Disable ((uint16_t)0x0000) 00430 #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \ 00431 ((CCX) == TIM_CCx_Disable)) 00432 00440 #define TIM_CCxN_Enable ((uint16_t)0x0004) 00441 #define TIM_CCxN_Disable ((uint16_t)0x0000) 00442 #define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \ 00443 ((CCXN) == TIM_CCxN_Disable)) 00444 00452 #define TIM_Break_Enable ((uint16_t)0x1000) 00453 #define TIM_Break_Disable ((uint16_t)0x0000) 00454 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ 00455 ((STATE) == TIM_Break_Disable)) 00456 00464 #define TIM_BreakPolarity_Low ((uint16_t)0x0000) 00465 #define TIM_BreakPolarity_High ((uint16_t)0x2000) 00466 #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \ 00467 ((POLARITY) == TIM_BreakPolarity_High)) 00468 00476 #define TIM_AutomaticOutput_Enable ((uint16_t)0x4000) 00477 #define TIM_AutomaticOutput_Disable ((uint16_t)0x0000) 00478 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \ 00479 ((STATE) == TIM_AutomaticOutput_Disable)) 00480 00488 #define TIM_LOCKLevel_OFF ((uint16_t)0x0000) 00489 #define TIM_LOCKLevel_1 ((uint16_t)0x0100) 00490 #define TIM_LOCKLevel_2 ((uint16_t)0x0200) 00491 #define TIM_LOCKLevel_3 ((uint16_t)0x0300) 00492 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \ 00493 ((LEVEL) == TIM_LOCKLevel_1) || \ 00494 ((LEVEL) == TIM_LOCKLevel_2) || \ 00495 ((LEVEL) == TIM_LOCKLevel_3)) 00496 00504 #define TIM_OSSIState_Enable ((uint16_t)0x0400) 00505 #define TIM_OSSIState_Disable ((uint16_t)0x0000) 00506 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ 00507 ((STATE) == TIM_OSSIState_Disable)) 00508 00516 #define TIM_OSSRState_Enable ((uint16_t)0x0800) 00517 #define TIM_OSSRState_Disable ((uint16_t)0x0000) 00518 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ 00519 ((STATE) == TIM_OSSRState_Disable)) 00520 00528 #define TIM_OCIdleState_Set ((uint16_t)0x0100) 00529 #define TIM_OCIdleState_Reset ((uint16_t)0x0000) 00530 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ 00531 ((STATE) == TIM_OCIdleState_Reset)) 00532 00540 #define TIM_OCNIdleState_Set ((uint16_t)0x0200) 00541 #define TIM_OCNIdleState_Reset ((uint16_t)0x0000) 00542 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ 00543 ((STATE) == TIM_OCNIdleState_Reset)) 00544 00552 #define TIM_ICPolarity_Rising ((uint16_t)0x0000) 00553 #define TIM_ICPolarity_Falling ((uint16_t)0x0002) 00554 #define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ 00555 ((POLARITY) == TIM_ICPolarity_Falling)) 00556 00564 #define TIM_ICSelection_DirectTI ((uint16_t)0x0001) 00566 #define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) 00568 #define TIM_ICSelection_TRC ((uint16_t)0x0003) 00569 #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \ 00570 ((SELECTION) == TIM_ICSelection_IndirectTI) || \ 00571 ((SELECTION) == TIM_ICSelection_TRC)) 00572 00580 #define TIM_ICPSC_DIV1 ((uint16_t)0x0000) 00581 #define TIM_ICPSC_DIV2 ((uint16_t)0x0004) 00582 #define TIM_ICPSC_DIV4 ((uint16_t)0x0008) 00583 #define TIM_ICPSC_DIV8 ((uint16_t)0x000C) 00584 #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \ 00585 ((PRESCALER) == TIM_ICPSC_DIV2) || \ 00586 ((PRESCALER) == TIM_ICPSC_DIV4) || \ 00587 ((PRESCALER) == TIM_ICPSC_DIV8)) 00588 00596 #define TIM_IT_Update ((uint16_t)0x0001) 00597 #define TIM_IT_CC1 ((uint16_t)0x0002) 00598 #define TIM_IT_CC2 ((uint16_t)0x0004) 00599 #define TIM_IT_CC3 ((uint16_t)0x0008) 00600 #define TIM_IT_CC4 ((uint16_t)0x0010) 00601 #define TIM_IT_COM ((uint16_t)0x0020) 00602 #define TIM_IT_Trigger ((uint16_t)0x0040) 00603 #define TIM_IT_Break ((uint16_t)0x0080) 00604 #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000)) 00605 00606 #define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \ 00607 ((IT) == TIM_IT_CC1) || \ 00608 ((IT) == TIM_IT_CC2) || \ 00609 ((IT) == TIM_IT_CC3) || \ 00610 ((IT) == TIM_IT_CC4) || \ 00611 ((IT) == TIM_IT_COM) || \ 00612 ((IT) == TIM_IT_Trigger) || \ 00613 ((IT) == TIM_IT_Break)) 00614 00622 #define TIM_DMABase_CR1 ((uint16_t)0x0000) 00623 #define TIM_DMABase_CR2 ((uint16_t)0x0001) 00624 #define TIM_DMABase_SMCR ((uint16_t)0x0002) 00625 #define TIM_DMABase_DIER ((uint16_t)0x0003) 00626 #define TIM_DMABase_SR ((uint16_t)0x0004) 00627 #define TIM_DMABase_EGR ((uint16_t)0x0005) 00628 #define TIM_DMABase_CCMR1 ((uint16_t)0x0006) 00629 #define TIM_DMABase_CCMR2 ((uint16_t)0x0007) 00630 #define TIM_DMABase_CCER ((uint16_t)0x0008) 00631 #define TIM_DMABase_CNT ((uint16_t)0x0009) 00632 #define TIM_DMABase_PSC ((uint16_t)0x000A) 00633 #define TIM_DMABase_ARR ((uint16_t)0x000B) 00634 #define TIM_DMABase_RCR ((uint16_t)0x000C) 00635 #define TIM_DMABase_CCR1 ((uint16_t)0x000D) 00636 #define TIM_DMABase_CCR2 ((uint16_t)0x000E) 00637 #define TIM_DMABase_CCR3 ((uint16_t)0x000F) 00638 #define TIM_DMABase_CCR4 ((uint16_t)0x0010) 00639 #define TIM_DMABase_BDTR ((uint16_t)0x0011) 00640 #define TIM_DMABase_DCR ((uint16_t)0x0012) 00641 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \ 00642 ((BASE) == TIM_DMABase_CR2) || \ 00643 ((BASE) == TIM_DMABase_SMCR) || \ 00644 ((BASE) == TIM_DMABase_DIER) || \ 00645 ((BASE) == TIM_DMABase_SR) || \ 00646 ((BASE) == TIM_DMABase_EGR) || \ 00647 ((BASE) == TIM_DMABase_CCMR1) || \ 00648 ((BASE) == TIM_DMABase_CCMR2) || \ 00649 ((BASE) == TIM_DMABase_CCER) || \ 00650 ((BASE) == TIM_DMABase_CNT) || \ 00651 ((BASE) == TIM_DMABase_PSC) || \ 00652 ((BASE) == TIM_DMABase_ARR) || \ 00653 ((BASE) == TIM_DMABase_RCR) || \ 00654 ((BASE) == TIM_DMABase_CCR1) || \ 00655 ((BASE) == TIM_DMABase_CCR2) || \ 00656 ((BASE) == TIM_DMABase_CCR3) || \ 00657 ((BASE) == TIM_DMABase_CCR4) || \ 00658 ((BASE) == TIM_DMABase_BDTR) || \ 00659 ((BASE) == TIM_DMABase_DCR)) 00660 00668 #define TIM_DMABurstLength_1Byte ((uint16_t)0x0000) 00669 #define TIM_DMABurstLength_2Bytes ((uint16_t)0x0100) 00670 #define TIM_DMABurstLength_3Bytes ((uint16_t)0x0200) 00671 #define TIM_DMABurstLength_4Bytes ((uint16_t)0x0300) 00672 #define TIM_DMABurstLength_5Bytes ((uint16_t)0x0400) 00673 #define TIM_DMABurstLength_6Bytes ((uint16_t)0x0500) 00674 #define TIM_DMABurstLength_7Bytes ((uint16_t)0x0600) 00675 #define TIM_DMABurstLength_8Bytes ((uint16_t)0x0700) 00676 #define TIM_DMABurstLength_9Bytes ((uint16_t)0x0800) 00677 #define TIM_DMABurstLength_10Bytes ((uint16_t)0x0900) 00678 #define TIM_DMABurstLength_11Bytes ((uint16_t)0x0A00) 00679 #define TIM_DMABurstLength_12Bytes ((uint16_t)0x0B00) 00680 #define TIM_DMABurstLength_13Bytes ((uint16_t)0x0C00) 00681 #define TIM_DMABurstLength_14Bytes ((uint16_t)0x0D00) 00682 #define TIM_DMABurstLength_15Bytes ((uint16_t)0x0E00) 00683 #define TIM_DMABurstLength_16Bytes ((uint16_t)0x0F00) 00684 #define TIM_DMABurstLength_17Bytes ((uint16_t)0x1000) 00685 #define TIM_DMABurstLength_18Bytes ((uint16_t)0x1100) 00686 #define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Byte) || \ 00687 ((LENGTH) == TIM_DMABurstLength_2Bytes) || \ 00688 ((LENGTH) == TIM_DMABurstLength_3Bytes) || \ 00689 ((LENGTH) == TIM_DMABurstLength_4Bytes) || \ 00690 ((LENGTH) == TIM_DMABurstLength_5Bytes) || \ 00691 ((LENGTH) == TIM_DMABurstLength_6Bytes) || \ 00692 ((LENGTH) == TIM_DMABurstLength_7Bytes) || \ 00693 ((LENGTH) == TIM_DMABurstLength_8Bytes) || \ 00694 ((LENGTH) == TIM_DMABurstLength_9Bytes) || \ 00695 ((LENGTH) == TIM_DMABurstLength_10Bytes) || \ 00696 ((LENGTH) == TIM_DMABurstLength_11Bytes) || \ 00697 ((LENGTH) == TIM_DMABurstLength_12Bytes) || \ 00698 ((LENGTH) == TIM_DMABurstLength_13Bytes) || \ 00699 ((LENGTH) == TIM_DMABurstLength_14Bytes) || \ 00700 ((LENGTH) == TIM_DMABurstLength_15Bytes) || \ 00701 ((LENGTH) == TIM_DMABurstLength_16Bytes) || \ 00702 ((LENGTH) == TIM_DMABurstLength_17Bytes) || \ 00703 ((LENGTH) == TIM_DMABurstLength_18Bytes)) 00704 00712 #define TIM_DMA_Update ((uint16_t)0x0100) 00713 #define TIM_DMA_CC1 ((uint16_t)0x0200) 00714 #define TIM_DMA_CC2 ((uint16_t)0x0400) 00715 #define TIM_DMA_CC3 ((uint16_t)0x0800) 00716 #define TIM_DMA_CC4 ((uint16_t)0x1000) 00717 #define TIM_DMA_COM ((uint16_t)0x2000) 00718 #define TIM_DMA_Trigger ((uint16_t)0x4000) 00719 #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000)) 00720 00729 #define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000) 00730 #define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000) 00731 #define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000) 00732 #define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000) 00733 #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \ 00734 ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \ 00735 ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \ 00736 ((PRESCALER) == TIM_ExtTRGPSC_DIV8)) 00737 00745 #define TIM_TS_ITR0 ((uint16_t)0x0000) 00746 #define TIM_TS_ITR1 ((uint16_t)0x0010) 00747 #define TIM_TS_ITR2 ((uint16_t)0x0020) 00748 #define TIM_TS_ITR3 ((uint16_t)0x0030) 00749 #define TIM_TS_TI1F_ED ((uint16_t)0x0040) 00750 #define TIM_TS_TI1FP1 ((uint16_t)0x0050) 00751 #define TIM_TS_TI2FP2 ((uint16_t)0x0060) 00752 #define TIM_TS_ETRF ((uint16_t)0x0070) 00753 #define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ 00754 ((SELECTION) == TIM_TS_ITR1) || \ 00755 ((SELECTION) == TIM_TS_ITR2) || \ 00756 ((SELECTION) == TIM_TS_ITR3) || \ 00757 ((SELECTION) == TIM_TS_TI1F_ED) || \ 00758 ((SELECTION) == TIM_TS_TI1FP1) || \ 00759 ((SELECTION) == TIM_TS_TI2FP2) || \ 00760 ((SELECTION) == TIM_TS_ETRF)) 00761 #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ 00762 ((SELECTION) == TIM_TS_ITR1) || \ 00763 ((SELECTION) == TIM_TS_ITR2) || \ 00764 ((SELECTION) == TIM_TS_ITR3)) 00765 00773 #define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050) 00774 #define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060) 00775 #define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040) 00776 #define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \ 00777 ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \ 00778 ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED)) 00779 00786 #define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000) 00787 #define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000) 00788 #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \ 00789 ((POLARITY) == TIM_ExtTRGPolarity_NonInverted)) 00790 00798 #define TIM_PSCReloadMode_Update ((uint16_t)0x0000) 00799 #define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001) 00800 #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \ 00801 ((RELOAD) == TIM_PSCReloadMode_Immediate)) 00802 00810 #define TIM_ForcedAction_Active ((uint16_t)0x0050) 00811 #define TIM_ForcedAction_InActive ((uint16_t)0x0040) 00812 #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \ 00813 ((ACTION) == TIM_ForcedAction_InActive)) 00814 00822 #define TIM_EncoderMode_TI1 ((uint16_t)0x0001) 00823 #define TIM_EncoderMode_TI2 ((uint16_t)0x0002) 00824 #define TIM_EncoderMode_TI12 ((uint16_t)0x0003) 00825 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ 00826 ((MODE) == TIM_EncoderMode_TI2) || \ 00827 ((MODE) == TIM_EncoderMode_TI12)) 00828 00837 #define TIM_EventSource_Update ((uint16_t)0x0001) 00838 #define TIM_EventSource_CC1 ((uint16_t)0x0002) 00839 #define TIM_EventSource_CC2 ((uint16_t)0x0004) 00840 #define TIM_EventSource_CC3 ((uint16_t)0x0008) 00841 #define TIM_EventSource_CC4 ((uint16_t)0x0010) 00842 #define TIM_EventSource_COM ((uint16_t)0x0020) 00843 #define TIM_EventSource_Trigger ((uint16_t)0x0040) 00844 #define TIM_EventSource_Break ((uint16_t)0x0080) 00845 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000)) 00846 00855 #define TIM_UpdateSource_Global ((uint16_t)0x0000) 00858 #define TIM_UpdateSource_Regular ((uint16_t)0x0001) 00859 #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ 00860 ((SOURCE) == TIM_UpdateSource_Regular)) 00861 00869 #define TIM_OCPreload_Enable ((uint16_t)0x0008) 00870 #define TIM_OCPreload_Disable ((uint16_t)0x0000) 00871 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ 00872 ((STATE) == TIM_OCPreload_Disable)) 00873 00881 #define TIM_OCFast_Enable ((uint16_t)0x0004) 00882 #define TIM_OCFast_Disable ((uint16_t)0x0000) 00883 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ 00884 ((STATE) == TIM_OCFast_Disable)) 00885 00894 #define TIM_OCClear_Enable ((uint16_t)0x0080) 00895 #define TIM_OCClear_Disable ((uint16_t)0x0000) 00896 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ 00897 ((STATE) == TIM_OCClear_Disable)) 00898 00906 #define TIM_TRGOSource_Reset ((uint16_t)0x0000) 00907 #define TIM_TRGOSource_Enable ((uint16_t)0x0010) 00908 #define TIM_TRGOSource_Update ((uint16_t)0x0020) 00909 #define TIM_TRGOSource_OC1 ((uint16_t)0x0030) 00910 #define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040) 00911 #define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050) 00912 #define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060) 00913 #define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070) 00914 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \ 00915 ((SOURCE) == TIM_TRGOSource_Enable) || \ 00916 ((SOURCE) == TIM_TRGOSource_Update) || \ 00917 ((SOURCE) == TIM_TRGOSource_OC1) || \ 00918 ((SOURCE) == TIM_TRGOSource_OC1Ref) || \ 00919 ((SOURCE) == TIM_TRGOSource_OC2Ref) || \ 00920 ((SOURCE) == TIM_TRGOSource_OC3Ref) || \ 00921 ((SOURCE) == TIM_TRGOSource_OC4Ref)) 00922 00930 #define TIM_SlaveMode_Reset ((uint16_t)0x0004) 00931 #define TIM_SlaveMode_Gated ((uint16_t)0x0005) 00932 #define TIM_SlaveMode_Trigger ((uint16_t)0x0006) 00933 #define TIM_SlaveMode_External1 ((uint16_t)0x0007) 00934 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \ 00935 ((MODE) == TIM_SlaveMode_Gated) || \ 00936 ((MODE) == TIM_SlaveMode_Trigger) || \ 00937 ((MODE) == TIM_SlaveMode_External1)) 00938 00946 #define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080) 00947 #define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000) 00948 #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \ 00949 ((STATE) == TIM_MasterSlaveMode_Disable)) 00950 00958 #define TIM_FLAG_Update ((uint16_t)0x0001) 00959 #define TIM_FLAG_CC1 ((uint16_t)0x0002) 00960 #define TIM_FLAG_CC2 ((uint16_t)0x0004) 00961 #define TIM_FLAG_CC3 ((uint16_t)0x0008) 00962 #define TIM_FLAG_CC4 ((uint16_t)0x0010) 00963 #define TIM_FLAG_COM ((uint16_t)0x0020) 00964 #define TIM_FLAG_Trigger ((uint16_t)0x0040) 00965 #define TIM_FLAG_Break ((uint16_t)0x0080) 00966 #define TIM_FLAG_CC1OF ((uint16_t)0x0200) 00967 #define TIM_FLAG_CC2OF ((uint16_t)0x0400) 00968 #define TIM_FLAG_CC3OF ((uint16_t)0x0800) 00969 #define TIM_FLAG_CC4OF ((uint16_t)0x1000) 00970 #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \ 00971 ((FLAG) == TIM_FLAG_CC1) || \ 00972 ((FLAG) == TIM_FLAG_CC2) || \ 00973 ((FLAG) == TIM_FLAG_CC3) || \ 00974 ((FLAG) == TIM_FLAG_CC4) || \ 00975 ((FLAG) == TIM_FLAG_COM) || \ 00976 ((FLAG) == TIM_FLAG_Trigger) || \ 00977 ((FLAG) == TIM_FLAG_Break) || \ 00978 ((FLAG) == TIM_FLAG_CC1OF) || \ 00979 ((FLAG) == TIM_FLAG_CC2OF) || \ 00980 ((FLAG) == TIM_FLAG_CC3OF) || \ 00981 ((FLAG) == TIM_FLAG_CC4OF)) 00982 00983 00984 #define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000)) 00985 00993 #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) 00994 01002 #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF) 01003 01023 void TIM_DeInit(TIM_TypeDef* TIMx); 01024 void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); 01025 void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); 01026 void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); 01027 void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); 01028 void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); 01029 void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); 01030 void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); 01031 void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct); 01032 void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); 01033 void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct); 01034 void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct); 01035 void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct); 01036 void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState); 01037 void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState); 01038 void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState); 01039 void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource); 01040 void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength); 01041 void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState); 01042 void TIM_InternalClockConfig(TIM_TypeDef* TIMx); 01043 void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); 01044 void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, 01045 uint16_t TIM_ICPolarity, uint16_t ICFilter); 01046 void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, 01047 uint16_t ExtTRGFilter); 01048 void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, 01049 uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter); 01050 void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, 01051 uint16_t ExtTRGFilter); 01052 void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode); 01053 void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode); 01054 void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); 01055 void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, 01056 uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity); 01057 void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); 01058 void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); 01059 void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); 01060 void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); 01061 void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState); 01062 void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState); 01063 void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState); 01064 void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState); 01065 void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); 01066 void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); 01067 void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); 01068 void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); 01069 void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); 01070 void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); 01071 void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); 01072 void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); 01073 void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); 01074 void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); 01075 void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); 01076 void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); 01077 void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); 01078 void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); 01079 void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); 01080 void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); 01081 void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); 01082 void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); 01083 void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); 01084 void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx); 01085 void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN); 01086 void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode); 01087 void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState); 01088 void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource); 01089 void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState); 01090 void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode); 01091 void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource); 01092 void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode); 01093 void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode); 01094 void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter); 01095 void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload); 01096 void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1); 01097 void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2); 01098 void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3); 01099 void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4); 01100 void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); 01101 void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); 01102 void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); 01103 void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); 01104 void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD); 01105 uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx); 01106 uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx); 01107 uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx); 01108 uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx); 01109 uint16_t TIM_GetCounter(TIM_TypeDef* TIMx); 01110 uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx); 01111 FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); 01112 void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); 01113 ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT); 01114 void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT); 01115 01116 #ifdef __cplusplus 01117 } 01118 #endif 01119 01120 #endif /*__STM32F10x_TIM_H */ 01121 01133 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/