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00041 #include <arch/avr32.h>
00042 #include <dev/irqreg.h>
00043 #include <avr32/io.h>
00044
00045 #include <arch/avr32/ihndlr.h>
00046
00047 #if defined(AVR32_MACB)
00048
00049 #ifndef NUT_IRQPRI_MACB
00050 #define NUT_IRQPRI_MACB AVR32_INTC_INT2
00051 #endif
00052
00053 static int MacbIrqCtl(int cmd, void *param);
00054
00055 IRQ_HANDLER sig_MACB = {
00056 #ifdef NUT_PERFMON
00057 0,
00058 #endif
00059 NULL,
00060 NULL,
00061 MacbIrqCtl
00062 };
00063
00067 static SIGNAL(MacbIrqEntry)
00068 {
00069 IRQ_ENTRY();
00070 #ifdef NUT_PERFMON
00071 sig_MACB.ir_count++;
00072 #endif
00073 if (sig_MACB.ir_handler) {
00074 (sig_MACB.ir_handler) (sig_MACB.ir_arg);
00075 }
00076 IRQ_EXIT();
00077 }
00078
00096 int MacbIrqCtl(int cmd, void *param)
00097 {
00098 int rc = 0;
00099 unsigned int *ival = (unsigned int *) param;
00100 ureg_t imr = AVR32_MACB.imr;
00101 static ureg_t enabledIMR = 0;
00102 int_fast8_t enabled = imr;
00103
00104
00105 if (enabled) {
00106 AVR32_MACB.idr = 0xFFFFFFFF;
00107 AVR32_MACB.imr;
00108 enabledIMR = imr;
00109 }
00110
00111 switch (cmd) {
00112 case NUT_IRQCTL_INIT:
00113
00114 register_interrupt(MacbIrqEntry, AVR32_MACB_IRQ, NUT_IRQPRI_MACB);
00115 break;
00116 case NUT_IRQCTL_STATUS:
00117 if (enabled) {
00118 *ival |= 1;
00119 } else {
00120 *ival &= ~1;
00121 }
00122 break;
00123 case NUT_IRQCTL_ENABLE:
00124 enabled = 1;
00125 break;
00126 case NUT_IRQCTL_DISABLE:
00127 enabled = 0;
00128 break;
00129 case NUT_IRQCTL_GETPRIO:
00130 *ival = NUT_IRQPRI_MACB;
00131 break;
00132 #ifdef NUT_PERFMON
00133 case NUT_IRQCTL_GETCOUNT:
00134 *ival = (unsigned int) sig_MACB.ir_count;
00135 sig_MACB.ir_count = 0;
00136 break;
00137 #endif
00138 default:
00139 rc = -1;
00140 break;
00141 }
00142
00143
00144 if (enabled) {
00145 AVR32_MACB.ier = enabledIMR;
00146 }
00147 return rc;
00148 }
00149
00150 #endif