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00041 #include <arch/avr32.h>
00042 #include <dev/irqreg.h>
00043 #include <avr32/io.h>
00044
00045 #include <arch/avr32/ihndlr.h>
00046
00047 #ifdef AVR32_USART2_IRQ
00048
00049 #ifndef NUT_IRQPRI_UART2
00050 #define NUT_IRQPRI_UART2 AVR32_INTC_INT3
00051 #endif
00052
00053 static int Uart2IrqCtl(int cmd, void *param);
00054
00055 IRQ_HANDLER sig_UART2 = {
00056 #ifdef NUT_PERFMON
00057 0,
00058 #endif
00059 NULL,
00060 NULL,
00061 Uart2IrqCtl
00062 };
00063
00067 SIGNAL(Uart2IrqEntry)
00068 {
00069 IRQ_ENTRY();
00070 #ifdef NUT_PERFMON
00071 sig_UART2.ir_count++;
00072 #endif
00073 if (sig_UART2.ir_handler) {
00074 (sig_UART2.ir_handler) (sig_UART2.ir_arg);
00075 }
00076 IRQ_EXIT();
00077 }
00078
00093 static int Uart2IrqCtl(int cmd, void *param)
00094 {
00095 int rc = 0;
00096 unsigned int *ival = (unsigned int *) param;
00097 ureg_t imr = AVR32_USART2.imr;
00098 static ureg_t enabledIMR = 0;
00099 int_fast8_t enabled = imr;
00100
00101
00102 if (enabled) {
00103 AVR32_USART2.idr = 0xFFFFFFFF;
00104 AVR32_USART2.csr;
00105 enabledIMR = imr;
00106 }
00107
00108 switch (cmd) {
00109 case NUT_IRQCTL_INIT:
00110
00111 register_interrupt(Uart2IrqEntry, AVR32_USART2_IRQ, NUT_IRQPRI_UART2);
00112
00113 break;
00114 case NUT_IRQCTL_STATUS:
00115 if (enabled) {
00116 *ival |= 1;
00117 } else {
00118 *ival &= ~1;
00119 }
00120 break;
00121 case NUT_IRQCTL_ENABLE:
00122 enabled = 1;
00123 if (*ival)
00124 imr = *ival;
00125 break;
00126 case NUT_IRQCTL_DISABLE:
00127 enabled = 0;
00128 break;
00129 case NUT_IRQCTL_GETPRIO:
00130 *ival = NUT_IRQPRI_UART2;
00131 break;
00132 #ifdef NUT_PERFMON
00133 case NUT_IRQCTL_GETCOUNT:
00134 *ival = (unsigned int) sig_UART2.ir_count;
00135 sig_UART2.ir_count = 0;
00136 break;
00137 #endif
00138 default:
00139 rc = -1;
00140 break;
00141 }
00142
00143
00144 if (enabled) {
00145 AVR32_USART2.ier = enabledIMR;
00146 AVR32_USART2.csr;
00147 }
00148 return rc;
00149 }
00150
00151 #endif // AVR32_USART2_IRQ