XgNutArchArmv7mLpcSc

External Interrupt Flag Register
#define	SC_EXTINT_OFF   0x00000140
	EXTINT register offset.
#define	SC_EXTINT   (LPC_SC_BASE + SC_EXTINT_OFF)
	EXTINT register address.
#define	SC_EINT0   (1 << 0)
	External interrupt 0.
#define	SC_EINT1   (1 << 1)
	External interrupt 1.
#define	SC_EINT2   (1 << 2)
	External interrupt 2.
#define	SC_EINT3   (1 << 3)
	External interrupt 3.
External Interrupt Mode Register
#define	SC_EXTMODE_OFF   0x00000148
#define	SC_EXTMODE   (LPC_SC_BASE + SC_EXTMODE_OFF)
#define	SC_EXTMODE0   (1 << 0)
	Interrupt 0 is edge sensitive.
#define	SC_EXTMODE1   (1 << 1)
	Interrupt 1 is edge sensitive.
#define	SC_EXTMODE2   (1 << 2)
	Interrupt 2 is edge sensitive.
#define	SC_EXTMODE3   (1 << 3)
	Interrupt 3 is edge sensitive.
External Interrupt Polarity Register
#define	SC_EXTPOLAR_OFF   0x0000014C
#define	SC_EXTPOLAR   (LPC_SC_BASE + SC_EXTPOLAR_OFF)
#define	SC_EXTPOLAR0   (1 << 0)
	Interrupt 0 is high or rising edge active.
#define	SC_EXTPOLAR1   (1 << 1)
	Interrupt 1 is high or rising edge active.
#define	SC_EXTPOLAR2   (1 << 2)
	Interrupt 2 is high or rising edge active.
#define	SC_EXTPOLAR3   (1 << 3)
	Interrupt 3 is high or rising edge active.
Reset Source Identification Register
#define	SC_RSID_OFF   0x00000180
	RSID register offset.
#define	SC_RSID   (LPC_SC_BASE + SC_RSID_OFF)
	RSID register address.
#define	SC_RSID_POR   (1 << 0)
	Power on reset.
#define	SC_RSID_EXTR   (1 << 1)
	External reset.
#define	SC_RSID_WDTR   (1 << 2)
	Watchdog reset.
#define	SC_RSID_BODR   (1 << 3)
	Brown out detection.
System Control and Status Register
#define	SC_SCS_OFF   0x000001A0
#define	SC_SCS   (LPC_SC_BASE + SC_SCS_OFF)
#define	SC_OSCRANGE   (1 << 4)
	Range is 15 to 25 MHz.
#define	SC_OSCEN   (1 << 5)
	Oscillator enabled.
#define	SC_OSCSTAT   (1 << 6)
	Oscillator ready.
Clock Source Select Register
#define	SC_CLKSRCSEL_OFF   0x0000010C
#define	SC_CLKSRCSEL   (LPC_SC_BASE + SC_CLKSRCSEL_OFF)
#define	SC_CLKSRC   0x00000003
#define	SC_CLKSRC_RCCLK   0x00000000
#define	SC_CLKSRC_MCLK   0x00000001
#define	SC_CLKSRC_RTCCLK   0x00000002
PLL Control Registers
#define	SC_PLL0CON_OFF   0x00000080
#define	SC_PLL0CON   (LPC_SC_BASE + SC_PLL0CON_OFF)
#define	SC_PLL1CON_OFF   0x000000A0
#define	SC_PLL1CON   (LPC_SC_BASE + SC_PLL1CON_OFF)
#define	SC_PLLE   (1 << 0)
#define	SC_PLLC   (1 << 1)
PLL Configuration Registers
#define	SC_PLL0CFG_OFF   0x00000084
#define	SC_PLL0CFG   (LPC_SC_BASE + SC_PLL0CFG_OFF)
#define	SC_PLL1CFG_OFF   0x000000A4
#define	SC_PLL1CFG   (LPC_SC_BASE + SC_PLL1CFG_OFF)
#define	SC_MSEL_LSB   0
#define	SC_MSEL   0x00007FFF
#define	SC_NSEL_LSB   16
#define	SC_NSEL   0x00FF0000
PLL Status Registers
#define	SC_PLL0STAT_OFF   0x00000088
#define	SC_PLL0STAT   (LPC_SC_BASE + SC_PLL0STAT_OFF)
#define	SC_PLL1STAT_OFF   0x000000A8
#define	SC_PLL1STAT   (LPC_SC_BASE + SC_PLL1STAT_OFF)
#define	SC_PLLE_STAT   (1 << 24)
#define	SC_PLLC_STAT   (1 << 25)
#define	SC_PLOCK   (1 << 26)
PLL Feed Registers
#define	SC_PLL0FEED_OFF   0x0000008C
#define	SC_PLL0FEED   (LPC_SC_BASE + SC_PLL0FEED_OFF)
#define	SC_PLL1FEED_OFF   0x000000AC
#define	SC_PLL1FEED   (LPC_SC_BASE + SC_PLL1FEED_OFF)
#define	PLLFEED_FEED1   0xAA
#define	PLLFEED_FEED2   0x55
CPU Clock Configuration Register
#define	SC_CCLKCFG_OFF   0x00000104
#define	SC_CCLKCFG   (LPC_SC_BASE + SC_CCLKCFG_OFF)
#define	SC_CCLKSEL   0x000000FF
#define	SC_CCLKSEL_LSB   0
USB Clock Configuration Register
#define	SC_USBCLKCFG_OFF   0x00000108
#define	SC_USBCLKCFG   (LPC_SC_BASE + SC_USBCLKCFG_OFF)
#define	SC_USBSEL   0x0000000F
#define	SC_USBSEL_LSB   0
Peripheral Clock Selection Register 0
#define	SC_PCLKSEL0_OFF   0x000001A8
#define	SC_PCLKSEL0   (LPC_SC_BASE + SC_PCLKSEL0_OFF)
#define	SC_PCLK_DIV1   0x1
#define	SC_PCLK_DIV2   0x2
#define	SC_PCLK_DIV4   0x0
#define	SC_PCLK_DIV8   0x3
#define	SC_PCLK_WDT_LSB   0
#define	SC_PCLK_WDT   (0x3 << SC_PCLK_WDT_LSB)
#define	SC_PCLK_TIMER0_LSB   2
#define	SC_PCLK_TIMER0   (0x3 << SC_PCLK_TIMER0_LSB)
#define	SC_PCLK_TIMER1_LSB   4
#define	SC_PCLK_TIMER1   (0x3 << SC_PCLK_TIMER1_LSB)
#define	SC_PCLK_UART0_LSB   6
#define	SC_PCLK_UART0   (0x3 << SC_PCLK_UART0_LSB)
#define	SC_PCLK_UART1_LSB   8
#define	SC_PCLK_UART1   (0x3 << SC_PCLK_UART1_LSB)
#define	SC_PCLK_PWM1_LSB   12
#define	SC_PCLK_PWM1   (0x3 << SC_PCLK_PWM1_LSB)
#define	SC_PCLK_I2C0_LSB   14
#define	SC_PCLK_I2C0   (0x3 << SC_PCLK_I2C0_LSB)
#define	SC_PCLK_SPI_LSB   16
#define	SC_PCLK_SPI   (0x3 << SC_PCLK_SPI_LSB)
#define	SC_PCLK_SSP1_LSB   20
#define	SC_PCLK_SSP1   (0x3 << SC_PCLK_SSP1_LSB)
#define	SC_PCLK_DAC_LSB   22
#define	SC_PCLK_DAC   (0x3 << SC_PCLK_DAC_LSB)
#define	SC_PCLK_ADC_LSB   24
#define	SC_PCLK_ADC   (0x3 << SC_PCLK_ADC_LSB)
#define	SC_PCLK_CAN1_LSB   26
#define	SC_PCLK_CAN1   (0x3 << SC_PCLK_CAN1_LSB)
#define	SC_PCLK_CAN2_LSB   28
#define	SC_PCLK_CAN2   (0x3 << SC_PCLK_CAN2_LSB)
#define	SC_PCLK_ACF_LSB   30
#define	SC_PCLK_ACF   (0x3 << SC_PCLK_ACF_LSB)
Peripheral Clock Selection Register 1
#define	SC_PCLKSEL1_OFF   0x000001AC
#define	SC_PCLKSEL1   (LPC_SC_BASE + SC_PCLKSEL1_OFF)
#define	SC_PCLK_QEI_LSB   0
#define	SC_PCLK_QEI   (0x3 << SC_PCLK_QEI_LSB)
#define	SC_PCLK_GPIOINT_LSB   2
#define	SC_PCLK_GPIOINT   (0x3 << SC_PCLK_GPIOINT_LSB)
#define	SC_PCLK_PCB_LSB   4
#define	SC_PCLK_PCB   (0x3 << SC_PCLK_PCB_LSB)
#define	SC_PCLK_I2C1_LSB   6
#define	SC_PCLK_I2C1   (0x3 << SC_PCLK_I2C1_LSB)
#define	SC_PCLK_SSP0_LSB   10
#define	SC_PCLK_SSP0   (0x3 << SC_PCLK_SSP0_LSB)
#define	SC_PCLK_TIMER2_LSB   12
#define	SC_PCLK_TIMER2   (0x3 << SC_PCLK_TIMER2_LSB)
#define	SC_PCLK_TIMER3_LSB   14
#define	SC_PCLK_TIMER3   (0x3 << SC_PCLK_TIMER3_LSB)
#define	SC_PCLK_UART2_LSB   16
#define	SC_PCLK_UART2   (0x3 << SC_PCLK_UART2_LSB)
#define	SC_PCLK_UART3_LSB   18
#define	SC_PCLK_UART3   (0x3 << SC_PCLK_UART3_LSB)
#define	SC_PCLK_I2C2_LSB   20
#define	SC_PCLK_I2C2   (0x3 << SC_PCLK_I2C2_LSB)
#define	SC_PCLK_I2S_LSB   22
#define	SC_PCLK_I2S   (0x3 << SC_PCLK_I2S_LSB)
#define	SC_PCLK_RIT_LSB   26
#define	SC_PCLK_RIT   (0x3 << SC_PCLK_RIT_LSB)
#define	SC_PCLK_SYSCON_LSB   28
#define	SC_PCLK_SYSCON   (0x3 << SC_PCLK_SYSCON_LSB)
#define	SC_PCLK_MC_LSB   30
#define	SC_PCLK_MC   (0x3 << SC_PCLK_MC_LSB)
Power Mode Control Register
#define	SC_PCON_OFF   0x000000C0
#define	SC_PCON   (LPC_SC_BASE + SC_PCON_OFF)
#define	SC_PM0   (1 << 0)
#define	SC_PM1   (1 << 1)
#define	SC_BODRPM   (1 << 2)
#define	SC_BOGD   (1 << 3)
#define	SC_BORD   (1 << 4)
#define	SC_SMFLAG   (1 << 8)
#define	SC_DSFLAG   (1 << 9)
#define	SC_PDFLAG   (1 << 10)
#define	SC_DPDFLAG   (1 << 11)
Peripheral Power Control Register
#define	SC_PCONP_OFF   0x000000C4
#define	SC_PCONP   (LPC_SC_BASE + SC_PCONP_OFF)
#define	SC_PCTIM0   (1 << 1)
#define	SC_PCTIM1   (1 << 2)
#define	SC_PCUART0   (1 << 3)
#define	SC_PCUART1   (1 << 4)
#define	SC_PCPWM1   (1 << 6)
#define	SC_PCI2C0   (1 << 7)
#define	SC_PCSPI   (1 << 8)
#define	SC_PCRTC   (1 << 9)
#define	SC_PCSSP1   (1 << 10)
#define	SC_PCADC   (1 << 12)
#define	SC_PCCAN1   (1 << 13)
#define	SC_PCCAN2   (1 << 14)
#define	SC_PCGPIO   (1 << 15)
#define	SC_PCRIT   (1 << 16)
#define	SC_PCMCPWM   (1 << 17)
#define	SC_PCQEI   (1 << 18)
#define	SC_PCI2C1   (1 << 19)
#define	SC_PCSSP0   (1 << 21)
#define	SC_PCTIM2   (1 << 22)
#define	SC_PCTIM3   (1 << 23)
#define	SC_PCUART2   (1 << 24)
#define	SC_PCUART3   (1 << 25)
#define	SC_PCI2C2   (1 << 26)
#define	SC_PCI2S   (1 << 27)
#define	SC_PCGPDMA   (1 << 29)
#define	SC_PCENET   (1 << 30)
#define	SC_PCUSB   (1 << 31)
Clock Output Configuration Register
#define	SC_CLKOUTCFG_OFF   0x000001C8
#define	SC_CLKOUTCFG   (LPC_SC_BASE + SC_CLKOUTCFG_OFF)
#define	SC_CLKOUTSEL   0x0000000F
#define	SC_CLKOUTSEL_CCLK   0x0
#define	SC_CLKOUTSEL_MCLK   0x1
#define	SC_CLKOUTSEL_RCCLK   0x2
#define	SC_CLKOUTSEL_USBCLK   0x3
#define	SC_CLKOUTSEL_RTCCLK   0x4
#define	SC_CLKOUTDIV   0x000000F0
#define	SC_CLKOUTDIV_LSB   4
#define	SC_CLKOUT_EN   (1 << 8)
#define	SC_CLKOUT_ACT   (1 << 9)
Flash Accelerator Configuration Register
#define	SC_FLASHCFG_OFF   0x00000000
#define	SC_FLASHCFG   (LPC_SC_BASE + SC_FLASHCFG_OFF)
#define	SC_FLASHTIM_LSB   12
#define	SC_FLASHTIM   0x0000F000

---

Define Documentation

#define SC_EXTINT_OFF   0x00000140

EXTINT register offset.

#define SC_EXTINT   (LPC_SC_BASE + SC_EXTINT_OFF)

EXTINT register address.

#define SC_EINT0   (1 << 0)

External interrupt 0.

#define SC_EINT1   (1 << 1)

External interrupt 1.

#define SC_EINT2   (1 << 2)

External interrupt 2.

#define SC_EINT3   (1 << 3)

External interrupt 3.

#define SC_EXTMODE_OFF   0x00000148

#define SC_EXTMODE   (LPC_SC_BASE + SC_EXTMODE_OFF)

#define SC_EXTMODE0   (1 << 0)

Interrupt 0 is edge sensitive.

#define SC_EXTMODE1   (1 << 1)

Interrupt 1 is edge sensitive.

#define SC_EXTMODE2   (1 << 2)

Interrupt 2 is edge sensitive.

#define SC_EXTMODE3   (1 << 3)

Interrupt 3 is edge sensitive.

#define SC_EXTPOLAR_OFF   0x0000014C

#define SC_EXTPOLAR   (LPC_SC_BASE + SC_EXTPOLAR_OFF)

#define SC_EXTPOLAR0   (1 << 0)

Interrupt 0 is high or rising edge active.

#define SC_EXTPOLAR1   (1 << 1)

Interrupt 1 is high or rising edge active.

#define SC_EXTPOLAR2   (1 << 2)

Interrupt 2 is high or rising edge active.

#define SC_EXTPOLAR3   (1 << 3)

Interrupt 3 is high or rising edge active.

#define SC_RSID_OFF   0x00000180

RSID register offset.

#define SC_RSID   (LPC_SC_BASE + SC_RSID_OFF)

RSID register address.

#define SC_RSID_POR   (1 << 0)

Power on reset.

#define SC_RSID_EXTR   (1 << 1)

External reset.

#define SC_RSID_WDTR   (1 << 2)

Watchdog reset.

#define SC_RSID_BODR   (1 << 3)

Brown out detection.

#define SC_SCS_OFF   0x000001A0

#define SC_SCS   (LPC_SC_BASE + SC_SCS_OFF)

Referenced by NutBoardInit().

#define SC_OSCRANGE   (1 << 4)

Range is 15 to 25 MHz.

#define SC_OSCEN   (1 << 5)

Oscillator enabled.

Referenced by NutBoardInit().

#define SC_OSCSTAT   (1 << 6)

Oscillator ready.

Referenced by NutBoardInit().

#define SC_CLKSRCSEL_OFF   0x0000010C

#define SC_CLKSRCSEL   (LPC_SC_BASE + SC_CLKSRCSEL_OFF)

Referenced by NutBoardInit().

#define SC_CLKSRC   0x00000003

#define SC_CLKSRC_RCCLK   0x00000000

#define SC_CLKSRC_MCLK   0x00000001

Referenced by NutBoardInit().

#define SC_CLKSRC_RTCCLK   0x00000002

#define SC_PLL0CON_OFF   0x00000080

#define SC_PLL0CON   (LPC_SC_BASE + SC_PLL0CON_OFF)

Referenced by NutBoardInit().

#define SC_PLL1CON_OFF   0x000000A0

#define SC_PLL1CON   (LPC_SC_BASE + SC_PLL1CON_OFF)

#define SC_PLLE   (1 << 0)

Referenced by NutBoardInit().

#define SC_PLLC   (1 << 1)

Referenced by NutBoardInit().

#define SC_PLL0CFG_OFF   0x00000084

#define SC_PLL0CFG   (LPC_SC_BASE + SC_PLL0CFG_OFF)

Referenced by NutBoardInit().

#define SC_PLL1CFG_OFF   0x000000A4

#define SC_PLL1CFG   (LPC_SC_BASE + SC_PLL1CFG_OFF)

#define SC_MSEL_LSB   0

Referenced by NutBoardInit().

#define SC_MSEL   0x00007FFF

#define SC_NSEL_LSB   16

Referenced by NutBoardInit().

#define SC_NSEL   0x00FF0000

#define SC_PLL0STAT_OFF   0x00000088

#define SC_PLL0STAT   (LPC_SC_BASE + SC_PLL0STAT_OFF)

Referenced by NutBoardInit().

#define SC_PLL1STAT_OFF   0x000000A8

#define SC_PLL1STAT   (LPC_SC_BASE + SC_PLL1STAT_OFF)

#define SC_PLLE_STAT   (1 << 24)

Referenced by NutBoardInit().

#define SC_PLLC_STAT   (1 << 25)

Referenced by NutBoardInit().

#define SC_PLOCK   (1 << 26)

Referenced by NutBoardInit().

#define SC_PLL0FEED_OFF   0x0000008C

#define SC_PLL0FEED   (LPC_SC_BASE + SC_PLL0FEED_OFF)

Referenced by NutBoardInit().

#define SC_PLL1FEED_OFF   0x000000AC

#define SC_PLL1FEED   (LPC_SC_BASE + SC_PLL1FEED_OFF)

#define PLLFEED_FEED1   0xAA

Referenced by NutBoardInit().

#define PLLFEED_FEED2   0x55

Referenced by NutBoardInit().

#define SC_CCLKCFG_OFF   0x00000104

#define SC_CCLKCFG   (LPC_SC_BASE + SC_CCLKCFG_OFF)

Referenced by NutBoardInit().

#define SC_CCLKSEL   0x000000FF

#define SC_CCLKSEL_LSB   0

Referenced by NutBoardInit().

#define SC_USBCLKCFG_OFF   0x00000108

#define SC_USBCLKCFG   (LPC_SC_BASE + SC_USBCLKCFG_OFF)

#define SC_USBSEL   0x0000000F

#define SC_USBSEL_LSB   0

#define SC_PCLKSEL0_OFF   0x000001A8

#define SC_PCLKSEL0   (LPC_SC_BASE + SC_PCLKSEL0_OFF)

Referenced by NutBoardInit().

#define SC_PCLK_DIV1   0x1

#define SC_PCLK_DIV2   0x2

#define SC_PCLK_DIV4   0x0

#define SC_PCLK_DIV8   0x3

#define SC_PCLK_WDT_LSB   0

#define SC_PCLK_WDT   (0x3 << SC_PCLK_WDT_LSB)

#define SC_PCLK_TIMER0_LSB   2

#define SC_PCLK_TIMER0   (0x3 << SC_PCLK_TIMER0_LSB)

#define SC_PCLK_TIMER1_LSB   4

#define SC_PCLK_TIMER1   (0x3 << SC_PCLK_TIMER1_LSB)

#define SC_PCLK_UART0_LSB   6

#define SC_PCLK_UART0   (0x3 << SC_PCLK_UART0_LSB)

#define SC_PCLK_UART1_LSB   8

#define SC_PCLK_UART1   (0x3 << SC_PCLK_UART1_LSB)

#define SC_PCLK_PWM1_LSB   12

#define SC_PCLK_PWM1   (0x3 << SC_PCLK_PWM1_LSB)

#define SC_PCLK_I2C0_LSB   14

#define SC_PCLK_I2C0   (0x3 << SC_PCLK_I2C0_LSB)

#define SC_PCLK_SPI_LSB   16

#define SC_PCLK_SPI   (0x3 << SC_PCLK_SPI_LSB)

#define SC_PCLK_SSP1_LSB   20

#define SC_PCLK_SSP1   (0x3 << SC_PCLK_SSP1_LSB)

#define SC_PCLK_DAC_LSB   22

#define SC_PCLK_DAC   (0x3 << SC_PCLK_DAC_LSB)

#define SC_PCLK_ADC_LSB   24

#define SC_PCLK_ADC   (0x3 << SC_PCLK_ADC_LSB)

#define SC_PCLK_CAN1_LSB   26

#define SC_PCLK_CAN1   (0x3 << SC_PCLK_CAN1_LSB)

#define SC_PCLK_CAN2_LSB   28

#define SC_PCLK_CAN2   (0x3 << SC_PCLK_CAN2_LSB)

#define SC_PCLK_ACF_LSB   30

#define SC_PCLK_ACF   (0x3 << SC_PCLK_ACF_LSB)

#define SC_PCLKSEL1_OFF   0x000001AC

#define SC_PCLKSEL1   (LPC_SC_BASE + SC_PCLKSEL1_OFF)

Referenced by NutBoardInit().

#define SC_PCLK_QEI_LSB   0

#define SC_PCLK_QEI   (0x3 << SC_PCLK_QEI_LSB)

#define SC_PCLK_GPIOINT_LSB   2

#define SC_PCLK_GPIOINT   (0x3 << SC_PCLK_GPIOINT_LSB)

#define SC_PCLK_PCB_LSB   4

#define SC_PCLK_PCB   (0x3 << SC_PCLK_PCB_LSB)

#define SC_PCLK_I2C1_LSB   6

#define SC_PCLK_I2C1   (0x3 << SC_PCLK_I2C1_LSB)

#define SC_PCLK_SSP0_LSB   10

#define SC_PCLK_SSP0   (0x3 << SC_PCLK_SSP0_LSB)

#define SC_PCLK_TIMER2_LSB   12

#define SC_PCLK_TIMER2   (0x3 << SC_PCLK_TIMER2_LSB)

#define SC_PCLK_TIMER3_LSB   14

#define SC_PCLK_TIMER3   (0x3 << SC_PCLK_TIMER3_LSB)

#define SC_PCLK_UART2_LSB   16

#define SC_PCLK_UART2   (0x3 << SC_PCLK_UART2_LSB)

#define SC_PCLK_UART3_LSB   18

#define SC_PCLK_UART3   (0x3 << SC_PCLK_UART3_LSB)

#define SC_PCLK_I2C2_LSB   20

#define SC_PCLK_I2C2   (0x3 << SC_PCLK_I2C2_LSB)

#define SC_PCLK_I2S_LSB   22

#define SC_PCLK_I2S   (0x3 << SC_PCLK_I2S_LSB)

#define SC_PCLK_RIT_LSB   26

#define SC_PCLK_RIT   (0x3 << SC_PCLK_RIT_LSB)

#define SC_PCLK_SYSCON_LSB   28

#define SC_PCLK_SYSCON   (0x3 << SC_PCLK_SYSCON_LSB)

#define SC_PCLK_MC_LSB   30

#define SC_PCLK_MC   (0x3 << SC_PCLK_MC_LSB)

#define SC_PCON_OFF   0x000000C0

#define SC_PCON   (LPC_SC_BASE + SC_PCON_OFF)

#define SC_PM0   (1 << 0)

#define SC_PM1   (1 << 1)

#define SC_BODRPM   (1 << 2)

#define SC_BOGD   (1 << 3)

#define SC_BORD   (1 << 4)

#define SC_SMFLAG   (1 << 8)

#define SC_DSFLAG   (1 << 9)

#define SC_PDFLAG   (1 << 10)

#define SC_DPDFLAG   (1 << 11)

#define SC_PCONP_OFF   0x000000C4

#define SC_PCONP   (LPC_SC_BASE + SC_PCONP_OFF)

Referenced by NutBoardInit().

#define SC_PCTIM0   (1 << 1)

Referenced by NutBoardInit().

#define SC_PCTIM1   (1 << 2)

Referenced by NutBoardInit().

#define SC_PCUART0   (1 << 3)

Referenced by NutBoardInit().

#define SC_PCUART1   (1 << 4)

#define SC_PCPWM1   (1 << 6)

Referenced by NutBoardInit().

#define SC_PCI2C0   (1 << 7)

Referenced by NutBoardInit().

#define SC_PCSPI   (1 << 8)

Referenced by NutBoardInit().

#define SC_PCRTC   (1 << 9)

Referenced by NutBoardInit().

#define SC_PCSSP1   (1 << 10)

Referenced by NutBoardInit().

#define SC_PCADC   (1 << 12)

#define SC_PCCAN1   (1 << 13)

#define SC_PCCAN2   (1 << 14)

#define SC_PCGPIO   (1 << 15)

Referenced by NutBoardInit().

#define SC_PCRIT   (1 << 16)

#define SC_PCMCPWM   (1 << 17)

#define SC_PCQEI   (1 << 18)

#define SC_PCI2C1   (1 << 19)

Referenced by NutBoardInit().

#define SC_PCSSP0   (1 << 21)

#define SC_PCTIM2   (1 << 22)

Referenced by NutBoardInit().

#define SC_PCTIM3   (1 << 23)

#define SC_PCUART2   (1 << 24)

#define SC_PCUART3   (1 << 25)

#define SC_PCI2C2   (1 << 26)

Referenced by NutBoardInit().

#define SC_PCI2S   (1 << 27)

#define SC_PCGPDMA   (1 << 29)

#define SC_PCENET   (1 << 30)

#define SC_PCUSB   (1 << 31)

#define SC_CLKOUTCFG_OFF   0x000001C8

#define SC_CLKOUTCFG   (LPC_SC_BASE + SC_CLKOUTCFG_OFF)

Referenced by NutBoardInit().

#define SC_CLKOUTSEL   0x0000000F

#define SC_CLKOUTSEL_CCLK   0x0

CPU clock.

#define SC_CLKOUTSEL_MCLK   0x1

Main oscillator.

#define SC_CLKOUTSEL_RCCLK   0x2

RC oscillator.

#define SC_CLKOUTSEL_USBCLK   0x3

USB clock.

#define SC_CLKOUTSEL_RTCCLK   0x4

RTC clock.

#define SC_CLKOUTDIV   0x000000F0

#define SC_CLKOUTDIV_LSB   4

Referenced by NutBoardInit().

#define SC_CLKOUT_EN   (1 << 8)

Referenced by NutBoardInit().

#define SC_CLKOUT_ACT   (1 << 9)

#define SC_FLASHCFG_OFF   0x00000000

#define SC_FLASHCFG   (LPC_SC_BASE + SC_FLASHCFG_OFF)

Referenced by NutBoardInit().

#define SC_FLASHTIM_LSB   12

Referenced by NutBoardInit().

#define SC_FLASHTIM   0x0000F000

Referenced by NutBoardInit().