NVIC_Type Struct Reference

Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

#include <core_cm3.h>

Collaboration diagram for NVIC_Type:

Data Fields
__IO uint32_t	ISER [8]
uint32_t	RESERVED0 [24]
__IO uint32_t	ICER [8]
uint32_t	RSERVED1 [24]
__IO uint32_t	ISPR [8]
uint32_t	RESERVED2 [24]
__IO uint32_t	ICPR [8]
uint32_t	RESERVED3 [24]
__IO uint32_t	IABR [8]
uint32_t	RESERVED4 [56]
__IO uint8_t	IP [240]
uint32_t	RESERVED5 [644]
__O uint32_t	STIR

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Detailed Description

Structure type to access the Nested Vectored Interrupt Controller (NVIC).

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Field Documentation

__IO uint32_t NVIC_Type::ISER

Offset: 0x000 (R/W) Interrupt Set Enable Register

uint32_t NVIC_Type::RESERVED0

__IO uint32_t NVIC_Type::ICER

Offset: 0x080 (R/W) Interrupt Clear Enable Register

uint32_t NVIC_Type::RSERVED1

__IO uint32_t NVIC_Type::ISPR

Offset: 0x100 (R/W) Interrupt Set Pending Register

uint32_t NVIC_Type::RESERVED2

__IO uint32_t NVIC_Type::ICPR

Offset: 0x180 (R/W) Interrupt Clear Pending Register

uint32_t NVIC_Type::RESERVED3

__IO uint32_t NVIC_Type::IABR

Offset: 0x200 (R/W) Interrupt Active bit Register

uint32_t NVIC_Type::RESERVED4

__IO uint8_t NVIC_Type::IP

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

uint32_t NVIC_Type::RESERVED5

__O uint32_t NVIC_Type::STIR

Offset: 0xE00 ( /W) Software Trigger Interrupt Register

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The documentation for this struct was generated from the following files:

• include/arch/cm3/core_cm3.h
• include/arch/cm3/core_cm4.h