Nut/OS  4.10.3
API Reference
at91_mc.h
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00001 #ifndef _ARCH_ARM_AT91_MC_H_
00002 #define _ARCH_ARM_AT91_MC_H_
00003 
00004 /*
00005  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00006  *
00007  * Redistribution and use in source and binary forms, with or without
00008  * modification, are permitted provided that the following conditions
00009  * are met:
00010  *
00011  * 1. Redistributions of source code must retain the above copyright
00012  *    notice, this list of conditions and the following disclaimer.
00013  * 2. Redistributions in binary form must reproduce the above copyright
00014  *    notice, this list of conditions and the following disclaimer in the
00015  *    documentation and/or other materials provided with the distribution.
00016  * 3. Neither the name of the copyright holders nor the names of
00017  *    contributors may be used to endorse or promote products derived
00018  *    from this software without specific prior written permission.
00019  *
00020  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00021  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00022  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00023  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00024  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00025  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00026  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00027  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00028  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00029  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00030  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00031  * SUCH DAMAGE.
00032  *
00033  * For additional information see http://www.ethernut.de/
00034  */
00035 
00056 #define MC_RCR_OFF              0x00000000      
00057 #define MC_RCR      (MC_BASE + MC_RCR_OFF)      
00058 #define MC_RCB                  0x00000001      
00060 #define MC_ASR_OFF              0x00000004      
00061 #define MC_ASR      (MC_BASE + MC_ASR_OFF)      
00062 #define MC_UNDADD               0x00000001      
00063 #define MC_MISADD               0x00000002      
00064 #define MC_ABTSZ_MASK           0x00000300      
00065 #define MC_ABTSZ_BYTE           0x00000000      
00066 #define MC_ABTSZ_HWORD          0x00000100      
00067 #define MC_ABTSZ_WORD           0x00000200      
00068 #define MC_ABTTYP_MASK          0x00000C00      
00069 #define MC_ABTTYP_DATAR         0x00000000      
00070 #define MC_ABTTYP_DATAW         0x00000400      
00071 #define MC_ABTTYP_FETCH         0x00000800      
00072 #define MC_MST_EMAC             0x00010000      
00073 #define MC_MST_PDC              0x00020000      
00074 #define MC_MST_ARM              0x00040000      
00075 #define MC_SVMST_EMAC           0x01000000      
00076 #define MC_SVMST_PDC            0x02000000      
00077 #define MC_SVMST_ARM            0x04000000      
00079 #define MC_AASR_OFF             0x00000008      
00080 #define MC_AASR     (MC_BASE + MC_AASR_OFF)     
00082 #define MC_FMR_EFC0_OFF         0x00000060      
00083 #define MC_FMR_EFC0 (MC_BASE + MC_FMR_EFC0_OFF) 
00084 #define MC_FMR_EFC1_OFF         0x00000070      
00085 #define MC_FMR_EFC1 (MC_BASE + MC_FMR_EFC1_OFF) 
00087 #define MC_FMR_OFF         MC_FMR_EFC0_OFF      
00088 #define MC_FMR                 MC_FMR_EFC0      
00089 #define MC_FRDY                 0x00000001      
00090 #define MC_LOCKE                0x00000004      
00091 #define MC_PROGE                0x00000008      
00092 #define MC_NEBP                 0x00000080      
00093 #define MC_FWS_LSB                       8      
00094 #define MC_FWS_MASK             0x00000300      
00095 #define MC_FWS_1R2W             0x00000000      
00096 #define MC_FWS_2R3W             0x00000100      
00097 #define MC_FWS_3R4W             0x00000200      
00098 #define MC_FWS_4R4W             0x00000300      
00099 #define MC_FMCN_LSB                     16      
00100 #define MC_FMCN_MASK            0x00FF0000      
00102 #define MC_FCR_EFC0_OFF         0x00000064      
00103 #define MC_FCR_EFC0 (MC_BASE + MC_FCR_EFC0_OFF) 
00104 #define MC_FCR_EFC1_OFF         0x00000074      
00105 #define MC_FCR_EFC1 (MC_BASE + MC_FCR_EFC1_OFF) 
00107 #define MC_FCR_OFF         MC_FCR_EFC0_OFF      
00108 #define MC_FCR                 MC_FCR_EFC0      
00109 #define MC_FCMD_MASK            0x0000000F      
00110 #define MC_FCMD_NOP             0x00000000      
00111 #define MC_FCMD_WP              0x00000001      
00112 #define MC_FCMD_SLB             0x00000002      
00113 #define MC_FCMD_WPL             0x00000003      
00114 #define MC_FCMD_CLB             0x00000004      
00115 #define MC_FCMD_EA              0x00000008      
00116 #define MC_FCMD_SGPB            0x0000000B      
00117 #define MC_FCMD_CGPB            0x0000000D      
00118 #define MC_FCMD_SSB             0x0000000F      
00119 #define MC_PAGEN_MASK           0x0003FF00      
00120 #define MC_KEY                  0x5A000000      
00122 #define MC_FSR_EFC0_OFF         0x00000068      
00123 #define MC_FSR_EFC0 (MC_BASE + MC_FSR_EFC0_OFF) 
00124 #define MC_FSR_EFC1_OFF         0x00000078      
00125 #define MC_FSR_EFC1 (MC_BASE + MC_FSR_EFC1_OFF) 
00127 #define MC_FSR_OFF         MC_FSR_EFC0_OFF      
00128 #define MC_FSR                 MC_FSR_EFC0      
00129 #define MC_SECURITY             0x00000010      
00131 #define MC_GPNVM0               0x00000100      
00132 #define MC_GPNVM1               0x00000200      
00133 #define MC_GPNVM2               0x00000400      
00135 #define MC_LOCKS0               0x00010000      
00136 #define MC_LOCKS1               0x00020000      
00137 #define MC_LOCKS2               0x00040000      
00138 #define MC_LOCKS3               0x00080000      
00139 #define MC_LOCKS4               0x00100000      
00140 #define MC_LOCKS5               0x00200000      
00141 #define MC_LOCKS6               0x00400000      
00142 #define MC_LOCKS7               0x00800000      
00143 #define MC_LOCKS8               0x01000000      
00144 #define MC_LOCKS9               0x02000000      
00145 #define MC_LOCKS10              0x04000000      
00146 #define MC_LOCKS11              0x08000000      
00147 #define MC_LOCKS12              0x10000000      
00148 #define MC_LOCKS13              0x20000000      
00149 #define MC_LOCKS14              0x40000000      
00150 #define MC_LOCKS15              0x80000000      
00152 #endif                          /* _ARCH_ARM_AT91_MC_H_ */