Nut/OS  4.10.3
API Reference
at91_mc.h File Reference
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Defines

#define MC_RCR_OFF   0x00000000
 MC remap control register offset.
#define MC_RCR   (MC_BASE + MC_RCR_OFF)
 MC remap control register address.
#define MC_RCB   0x00000001
 Remap command.
#define MC_ASR_OFF   0x00000004
 MC abort status register offset.
#define MC_ASR   (MC_BASE + MC_ASR_OFF)
 MC abort status register address.
#define MC_UNDADD   0x00000001
 Undefined Addess Abort status.
#define MC_MISADD   0x00000002
 Misaligned Addess Abort status.
#define MC_ABTSZ_MASK   0x00000300
 Abort size status mask.
#define MC_ABTSZ_BYTE   0x00000000
 Byte size abort.
#define MC_ABTSZ_HWORD   0x00000100
 Half-word size abort.
#define MC_ABTSZ_WORD   0x00000200
 Word size abort.
#define MC_ABTTYP_MASK   0x00000C00
 Abort type status mask.
#define MC_ABTTYP_DATAR   0x00000000
 Data read abort.
#define MC_ABTTYP_DATAW   0x00000400
 Data write abort.
#define MC_ABTTYP_FETCH   0x00000800
 Code fetch abort.
#define MC_MST_EMAC   0x00010000
 EMAC abort source.
#define MC_MST_PDC   0x00020000
 PDC abort source.
#define MC_MST_ARM   0x00040000
 ARM abort source.
#define MC_SVMST_EMAC   0x01000000
 Saved EMAC abort source.
#define MC_SVMST_PDC   0x02000000
 Saved PDC abort source.
#define MC_SVMST_ARM   0x04000000
 Saved ARM abort source.
#define MC_AASR_OFF   0x00000008
 MC abort address status register offset.
#define MC_AASR   (MC_BASE + MC_AASR_OFF)
 MC abort address status register address.
#define MC_FMR_EFC0_OFF   0x00000060
 MC flash mode register bank 0 offset.
#define MC_FMR_EFC0   (MC_BASE + MC_FMR_EFC0_OFF)
 MC flash mode register bank 0 address.
#define MC_FMR_EFC1_OFF   0x00000070
 MC flash mode register bank 1 offset.
#define MC_FMR_EFC1   (MC_BASE + MC_FMR_EFC1_OFF)
 MC flash mode register bank 1 address.
#define MC_FMR_OFF   MC_FMR_EFC0_OFF
 MC flash mode register offset.
#define MC_FMR   MC_FMR_EFC0
 MC flash mode register address.
#define MC_FRDY   0x00000001
 Flash ready.
#define MC_LOCKE   0x00000004
 Lock error.
#define MC_PROGE   0x00000008
 Programming error.
#define MC_NEBP   0x00000080
 No erase before programming.
#define MC_FWS_LSB   8
 Flash wait state LSB.
#define MC_FWS_MASK   0x00000300
 Flash wait state mask.
#define MC_FWS_1R2W   0x00000000
 1 cycle for read, 2 for write operations.
#define MC_FWS_2R3W   0x00000100
 2 cycles for read, 3 for write operations.
#define MC_FWS_3R4W   0x00000200
 3 cycles for read, 4 for write operations.
#define MC_FWS_4R4W   0x00000300
 4 cycles for read and write operations.
#define MC_FMCN_LSB   16
 Flash microsecond cycle number LSB.
#define MC_FMCN_MASK   0x00FF0000
 Flash microsecond cycle number mask.
#define MC_FCR_EFC0_OFF   0x00000064
 MC flash mode register bank 0 offset.
#define MC_FCR_EFC0   (MC_BASE + MC_FCR_EFC0_OFF)
 MC flash mode register bank 0 address.
#define MC_FCR_EFC1_OFF   0x00000074
 MC flash mode register bank 1 offset.
#define MC_FCR_EFC1   (MC_BASE + MC_FCR_EFC1_OFF)
 MC flash mode register bank 1 address.
#define MC_FCR_OFF   MC_FCR_EFC0_OFF
 MC flash command register offset.
#define MC_FCR   MC_FCR_EFC0
 MC flash command register address.
#define MC_FCMD_MASK   0x0000000F
 Flash command mask.
#define MC_FCMD_NOP   0x00000000
 No command.
#define MC_FCMD_WP   0x00000001
 Write page.
#define MC_FCMD_SLB   0x00000002
 Set lock bit.
#define MC_FCMD_WPL   0x00000003
 Write page and lock.
#define MC_FCMD_CLB   0x00000004
 Clear lock bit.
#define MC_FCMD_EA   0x00000008
 Erase all.
#define MC_FCMD_SGPB   0x0000000B
 Set general purpose NVM bit.
#define MC_FCMD_CGPB   0x0000000D
 Clear general purpose NVM bit.
#define MC_FCMD_SSB   0x0000000F
 Set security bit.
#define MC_PAGEN_MASK   0x0003FF00
 Page number mask.
#define MC_KEY   0x5A000000
 Writing protect key.
#define MC_FSR_EFC0_OFF   0x00000068
 MC flash mode register bank 0 offset.
#define MC_FSR_EFC0   (MC_BASE + MC_FSR_EFC0_OFF)
 MC flash mode register bank 0 address.
#define MC_FSR_EFC1_OFF   0x00000078
 MC flash mode register bank 1 offset.
#define MC_FSR_EFC1   (MC_BASE + MC_FSR_EFC1_OFF)
 MC flash mode register bank 1 address.
#define MC_FSR_OFF   MC_FSR_EFC0_OFF
 MC flash status register offset.
#define MC_FSR   MC_FSR_EFC0
 MC flash status register address.
#define MC_SECURITY   0x00000010
 Security bit status.
#define MC_GPNVM0   0x00000100
 General purpose NVM bit 0.
#define MC_GPNVM1   0x00000200
 General purpose NVM bit 1.
#define MC_GPNVM2   0x00000400
 General purpose NVM bit 2.
#define MC_LOCKS0   0x00010000
 Lock region 0 lock status.
#define MC_LOCKS1   0x00020000
 Lock region 1 lock status.
#define MC_LOCKS2   0x00040000
 Lock region 2 lock status.
#define MC_LOCKS3   0x00080000
 Lock region 3 lock status.
#define MC_LOCKS4   0x00100000
 Lock region 4 lock status.
#define MC_LOCKS5   0x00200000
 Lock region 5 lock status.
#define MC_LOCKS6   0x00400000
 Lock region 6 lock status.
#define MC_LOCKS7   0x00800000
 Lock region 7 lock status.
#define MC_LOCKS8   0x01000000
 Lock region 8 lock status.
#define MC_LOCKS9   0x02000000
 Lock region 9 lock status.
#define MC_LOCKS10   0x04000000
 Lock region 10 lock status.
#define MC_LOCKS11   0x08000000
 Lock region 11 lock status.
#define MC_LOCKS12   0x10000000
 Lock region 12 lock status.
#define MC_LOCKS13   0x20000000
 Lock region 13 lock status.
#define MC_LOCKS14   0x40000000
 Lock region 14 lock status.
#define MC_LOCKS15   0x80000000
 Lock region 15 lock status.

Define Documentation

#define MC_RCR_OFF   0x00000000

MC remap control register offset.

Definition at line 56 of file at91_mc.h.

#define MC_RCR   (MC_BASE + MC_RCR_OFF)

MC remap control register address.

Definition at line 57 of file at91_mc.h.

#define MC_RCB   0x00000001

Remap command.

Definition at line 58 of file at91_mc.h.

#define MC_ASR_OFF   0x00000004

MC abort status register offset.

Definition at line 60 of file at91_mc.h.

#define MC_ASR   (MC_BASE + MC_ASR_OFF)

MC abort status register address.

Definition at line 61 of file at91_mc.h.

#define MC_UNDADD   0x00000001

Undefined Addess Abort status.

Definition at line 62 of file at91_mc.h.

#define MC_MISADD   0x00000002

Misaligned Addess Abort status.

Definition at line 63 of file at91_mc.h.

#define MC_ABTSZ_MASK   0x00000300

Abort size status mask.

Definition at line 64 of file at91_mc.h.

#define MC_ABTSZ_BYTE   0x00000000

Byte size abort.

Definition at line 65 of file at91_mc.h.

#define MC_ABTSZ_HWORD   0x00000100

Half-word size abort.

Definition at line 66 of file at91_mc.h.

#define MC_ABTSZ_WORD   0x00000200

Word size abort.

Definition at line 67 of file at91_mc.h.

#define MC_ABTTYP_MASK   0x00000C00

Abort type status mask.

Definition at line 68 of file at91_mc.h.

#define MC_ABTTYP_DATAR   0x00000000

Data read abort.

Definition at line 69 of file at91_mc.h.

#define MC_ABTTYP_DATAW   0x00000400

Data write abort.

Definition at line 70 of file at91_mc.h.

#define MC_ABTTYP_FETCH   0x00000800

Code fetch abort.

Definition at line 71 of file at91_mc.h.

#define MC_MST_EMAC   0x00010000

EMAC abort source.

Definition at line 72 of file at91_mc.h.

#define MC_MST_PDC   0x00020000

PDC abort source.

Definition at line 73 of file at91_mc.h.

#define MC_MST_ARM   0x00040000

ARM abort source.

Definition at line 74 of file at91_mc.h.

#define MC_SVMST_EMAC   0x01000000

Saved EMAC abort source.

Definition at line 75 of file at91_mc.h.

#define MC_SVMST_PDC   0x02000000

Saved PDC abort source.

Definition at line 76 of file at91_mc.h.

#define MC_SVMST_ARM   0x04000000

Saved ARM abort source.

Definition at line 77 of file at91_mc.h.

#define MC_AASR_OFF   0x00000008

MC abort address status register offset.

Definition at line 79 of file at91_mc.h.

#define MC_AASR   (MC_BASE + MC_AASR_OFF)

MC abort address status register address.

Definition at line 80 of file at91_mc.h.

#define MC_FMR_EFC0_OFF   0x00000060

MC flash mode register bank 0 offset.

Definition at line 82 of file at91_mc.h.

#define MC_FMR_EFC0   (MC_BASE + MC_FMR_EFC0_OFF)

MC flash mode register bank 0 address.

Definition at line 83 of file at91_mc.h.

#define MC_FMR_EFC1_OFF   0x00000070

MC flash mode register bank 1 offset.

Definition at line 84 of file at91_mc.h.

#define MC_FMR_EFC1   (MC_BASE + MC_FMR_EFC1_OFF)

MC flash mode register bank 1 address.

Definition at line 85 of file at91_mc.h.

Referenced by At91EfcSectorWrite().

#define MC_FMR_OFF   MC_FMR_EFC0_OFF

MC flash mode register offset.

Definition at line 87 of file at91_mc.h.

#define MC_FMR   MC_FMR_EFC0

MC flash mode register address.

Definition at line 88 of file at91_mc.h.

Referenced by At91EfcSectorWrite(), and NutInit().

#define MC_FRDY   0x00000001

Flash ready.

Definition at line 89 of file at91_mc.h.

Referenced by At91EfcCmdEx().

#define MC_LOCKE   0x00000004

Lock error.

Definition at line 90 of file at91_mc.h.

Referenced by At91EfcCmdEx().

#define MC_PROGE   0x00000008

Programming error.

Definition at line 91 of file at91_mc.h.

Referenced by At91EfcCmdEx().

#define MC_NEBP   0x00000080

No erase before programming.

Definition at line 92 of file at91_mc.h.

Referenced by At91EfcSectorWrite().

#define MC_FWS_LSB   8

Flash wait state LSB.

Definition at line 93 of file at91_mc.h.

#define MC_FWS_MASK   0x00000300

Flash wait state mask.

Definition at line 94 of file at91_mc.h.

#define MC_FWS_1R2W   0x00000000

1 cycle for read, 2 for write operations.

Definition at line 95 of file at91_mc.h.

#define MC_FWS_2R3W   0x00000100

2 cycles for read, 3 for write operations.

Definition at line 96 of file at91_mc.h.

Referenced by NutInit().

#define MC_FWS_3R4W   0x00000200

3 cycles for read, 4 for write operations.

Definition at line 97 of file at91_mc.h.

#define MC_FWS_4R4W   0x00000300

4 cycles for read and write operations.

Definition at line 98 of file at91_mc.h.

#define MC_FMCN_LSB   16

Flash microsecond cycle number LSB.

Definition at line 99 of file at91_mc.h.

#define MC_FMCN_MASK   0x00FF0000

Flash microsecond cycle number mask.

Definition at line 100 of file at91_mc.h.

#define MC_FCR_EFC0_OFF   0x00000064

MC flash mode register bank 0 offset.

Definition at line 102 of file at91_mc.h.

#define MC_FCR_EFC0   (MC_BASE + MC_FCR_EFC0_OFF)

MC flash mode register bank 0 address.

Definition at line 103 of file at91_mc.h.

Referenced by At91EfcCmdEx().

#define MC_FCR_EFC1_OFF   0x00000074

MC flash mode register bank 1 offset.

Definition at line 104 of file at91_mc.h.

#define MC_FCR_EFC1   (MC_BASE + MC_FCR_EFC1_OFF)

MC flash mode register bank 1 address.

Definition at line 105 of file at91_mc.h.

Referenced by At91EfcCmdEx().

#define MC_FCR_OFF   MC_FCR_EFC0_OFF

MC flash command register offset.

Definition at line 107 of file at91_mc.h.

#define MC_FCR   MC_FCR_EFC0

MC flash command register address.

Definition at line 108 of file at91_mc.h.

#define MC_FCMD_MASK   0x0000000F

Flash command mask.

Definition at line 109 of file at91_mc.h.

#define MC_FCMD_NOP   0x00000000

No command.

Definition at line 110 of file at91_mc.h.

#define MC_FCMD_WP   0x00000001

Write page.

Definition at line 111 of file at91_mc.h.

Referenced by At91EfcSectorWrite().

#define MC_FCMD_SLB   0x00000002

Set lock bit.

Definition at line 112 of file at91_mc.h.

Referenced by At91EfcRegionLock().

#define MC_FCMD_WPL   0x00000003

Write page and lock.

Definition at line 113 of file at91_mc.h.

#define MC_FCMD_CLB   0x00000004

Clear lock bit.

Definition at line 114 of file at91_mc.h.

Referenced by At91EfcRegionUnlock().

#define MC_FCMD_EA   0x00000008

Erase all.

Definition at line 115 of file at91_mc.h.

#define MC_FCMD_SGPB   0x0000000B

Set general purpose NVM bit.

Definition at line 116 of file at91_mc.h.

#define MC_FCMD_CGPB   0x0000000D

Clear general purpose NVM bit.

Definition at line 117 of file at91_mc.h.

#define MC_FCMD_SSB   0x0000000F

Set security bit.

Definition at line 118 of file at91_mc.h.

#define MC_PAGEN_MASK   0x0003FF00

Page number mask.

Definition at line 119 of file at91_mc.h.

Referenced by At91EfcRegionLock(), At91EfcRegionUnlock(), and At91EfcSectorWrite().

#define MC_KEY   0x5A000000

Writing protect key.

Definition at line 120 of file at91_mc.h.

Referenced by At91EfcCmdEx().

#define MC_FSR_EFC0_OFF   0x00000068

MC flash mode register bank 0 offset.

Definition at line 122 of file at91_mc.h.

#define MC_FSR_EFC0   (MC_BASE + MC_FSR_EFC0_OFF)

MC flash mode register bank 0 address.

Definition at line 123 of file at91_mc.h.

Referenced by At91EfcCmdEx().

#define MC_FSR_EFC1_OFF   0x00000078

MC flash mode register bank 1 offset.

Definition at line 124 of file at91_mc.h.

#define MC_FSR_EFC1   (MC_BASE + MC_FSR_EFC1_OFF)

MC flash mode register bank 1 address.

Definition at line 125 of file at91_mc.h.

Referenced by At91EfcCmdEx().

#define MC_FSR_OFF   MC_FSR_EFC0_OFF

MC flash status register offset.

Definition at line 127 of file at91_mc.h.

#define MC_FSR   MC_FSR_EFC0

MC flash status register address.

Definition at line 128 of file at91_mc.h.

#define MC_SECURITY   0x00000010

Security bit status.

Definition at line 129 of file at91_mc.h.

#define MC_GPNVM0   0x00000100

General purpose NVM bit 0.

Definition at line 131 of file at91_mc.h.

#define MC_GPNVM1   0x00000200

General purpose NVM bit 1.

Definition at line 132 of file at91_mc.h.

#define MC_GPNVM2   0x00000400

General purpose NVM bit 2.

Definition at line 133 of file at91_mc.h.

#define MC_LOCKS0   0x00010000

Lock region 0 lock status.

Definition at line 135 of file at91_mc.h.

#define MC_LOCKS1   0x00020000

Lock region 1 lock status.

Definition at line 136 of file at91_mc.h.

#define MC_LOCKS2   0x00040000

Lock region 2 lock status.

Definition at line 137 of file at91_mc.h.

#define MC_LOCKS3   0x00080000

Lock region 3 lock status.

Definition at line 138 of file at91_mc.h.

#define MC_LOCKS4   0x00100000

Lock region 4 lock status.

Definition at line 139 of file at91_mc.h.

#define MC_LOCKS5   0x00200000

Lock region 5 lock status.

Definition at line 140 of file at91_mc.h.

#define MC_LOCKS6   0x00400000

Lock region 6 lock status.

Definition at line 141 of file at91_mc.h.

#define MC_LOCKS7   0x00800000

Lock region 7 lock status.

Definition at line 142 of file at91_mc.h.

#define MC_LOCKS8   0x01000000

Lock region 8 lock status.

Definition at line 143 of file at91_mc.h.

#define MC_LOCKS9   0x02000000

Lock region 9 lock status.

Definition at line 144 of file at91_mc.h.

#define MC_LOCKS10   0x04000000

Lock region 10 lock status.

Definition at line 145 of file at91_mc.h.

#define MC_LOCKS11   0x08000000

Lock region 11 lock status.

Definition at line 146 of file at91_mc.h.

#define MC_LOCKS12   0x10000000

Lock region 12 lock status.

Definition at line 147 of file at91_mc.h.

#define MC_LOCKS13   0x20000000

Lock region 13 lock status.

Definition at line 148 of file at91_mc.h.

#define MC_LOCKS14   0x40000000

Lock region 14 lock status.

Definition at line 149 of file at91_mc.h.

#define MC_LOCKS15   0x80000000

Lock region 15 lock status.

Definition at line 150 of file at91_mc.h.