ax88796.h

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#ifndef _DEV_AX88796_H_
#define _DEV_AX88796_H_

#include <netinet/if_ether.h>
#include <net/ether.h>
#include <net/if_var.h>


typedef struct {
    HANDLE volatile ni_rx_rdy;      
    HANDLE volatile ni_tx_rdy;      
    uint16_t ni_tx_cnt;              
    uint32_t ni_rx_packets;           
    uint32_t ni_tx_packets;           
    uint32_t ni_interrupts;           
    uint32_t ni_overruns;             
    uint32_t ni_rx_frame_errors;      
    uint32_t ni_rx_crc_errors;        
    uint32_t ni_rx_missed_errors;     
    uint8_t volatile ni_tx_bsy;      
    uint32_t ni_rx_pending;           
    uint8_t ni_curr_page;            
}NICINFO;

/*
 * Available drivers.
 */
extern NUTDEVICE devAx88796;

#ifndef DEV_ETHER
#define DEV_ETHER   devAx88796
#endif

#ifndef devEth0
#define devEth0   devAx88796
#endif


#define ASIX_BASE        0x20000000

/* ! Read and write byte from controller */

#define Asix_Read(reg) *(unsigned char *) (reg + ASIX_BASE)
#define Asix_ReadWord(reg) *(unsigned short *) (reg + ASIX_BASE)
#define Asix_Write(reg, data) *(unsigned char *) (reg + ASIX_BASE) = data
#define Asix_WriteWord(reg, data) *(unsigned short *) (reg + ASIX_BASE) = data

// buffer boundaries - transmit has 6 256-byte pages = 1536
//   receive has 52 256-byte pages = 14848
//   entire available packet buffer space is allocated
#define TXSTART_INIT    0x40
#define RXSTART_INIT    0x46
#define RXSTOP_INIT     0x80

extern int AsixInit(NUTDEVICE *dev);
extern int AsixOutput(NUTDEVICE *dev, NETBUF *nb);
void NicPhyWrite(uint8_t reg, uint16_t val);
uint16_t NicPhyRead(uint8_t reg);

#endif