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Nut/OS
4.10.3
API Reference
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Nut/OS
4.10.3
API Reference
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External bus interface registers. More...
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Chip Select Register | |
| #define | EBI_CSR(i) (EBI_BASE + i * 4) |
| Chip select register address. | |
| #define | EBI_DBW 0x00000003 |
| Masks data bus width. | |
| #define | EBI_DBW_16 0x00000001 |
| 16-bit data bus width. | |
| #define | EBI_DBW_8 0x00000002 |
| 8-bit data bus width. | |
| #define | EBI_NWS 0x0000001C |
| Masks number of wait states. | |
| #define | EBI_NWS_1 0x00000000 |
| 1 wait state. | |
| #define | EBI_NWS_2 0x00000004 |
| 2 wait states. | |
| #define | EBI_NWS_3 0x00000008 |
| 3 wait states. | |
| #define | EBI_NWS_4 0x0000000C |
| 4 wait states. | |
| #define | EBI_NWS_5 0x00000010 |
| 5 wait states. | |
| #define | EBI_NWS_6 0x00000014 |
| 6 wait states. | |
| #define | EBI_NWS_7 0x00000018 |
| 7 wait states. | |
| #define | EBI_NWS_8 0x0000001C |
| 8 wait states. | |
| #define | EBI_WSE 0x00000020 |
| Wait state enable. | |
| #define | EBI_PAGES 0x00000180 |
| Page size mask. | |
| #define | EBI_PAGES_1M 0x00000000 |
| 1 MByte page size. | |
| #define | EBI_PAGES_4M 0x00000080 |
| 4 MBytes page size. | |
| #define | EBI_PAGES_16M 0x00000100 |
| 16 MBytes page size. | |
| #define | EBI_PAGES_64M 0x00000180 |
| 64 MBytes page size. | |
| #define | EBI_TDF 0x00000E00 |
| Masks data float output time clock cycles. | |
| #define | EBI_TDF_0 0x00000000 |
| No added cycles. | |
| #define | EBI_TDF_1 0x00000200 |
| 1 cycle. | |
| #define | EBI_TDF_2 0x00000400 |
| 2 cycles. | |
| #define | EBI_TDF_3 0x00000600 |
| 3 cycles. | |
| #define | EBI_TDF_4 0x00000800 |
| 4 cycles. | |
| #define | EBI_TDF_5 0x00000A00 |
| 5 cycles. | |
| #define | EBI_TDF_6 0x00000C00 |
| 6 cycles. | |
| #define | EBI_TDF_7 0x00000E00 |
| 7 cycles. | |
| #define | EBI_BAT 0x00001000 |
| Byte access type. | |
| #define | EBI_BAT_BYTE_WRITE 0x00000000 |
| Byte write access type. | |
| #define | EBI_BAT_BYTE_SELECT 0x00001000 |
| Byte select access type. | |
| #define | EBI_CSEN 0x00002000 |
| Chip select enable. | |
| #define | EBI_BA 0xFFF00000 |
| Page base address mask. | |
Remap Control Register | |
| #define | EBI_RCR (EBI_BASE + 0x20) |
| Remap control register address. | |
| #define | EBI_RCB 0x00000001 |
| Remap command. | |
Memory Control Register | |
| #define | EBI_MCR (EBI_BASE + 0x24) |
| Memory control register address. | |
| #define | EBI_ALE 0x00000007 |
| Address line enable. | |
| #define | EBI_ALE_16M 0x00000000 |
| 16 Mbytes total address space. | |
| #define | EBI_ALE_8M 0x00000004 |
| 8 Mbytes total address space. | |
| #define | EBI_ALE_4M 0x00000005 |
| 4 Mbytes total address space. | |
| #define | EBI_ALE_2M 0x00000006 |
| 2 Mbytes total address space. | |
| #define | EBI_ALE_1M 0x00000007 |
| 1 Mbyte total address space. | |
| #define | EBI_DRP 0x00000010 |
| Data read protocol mask. | |
| #define | EBI_DRP_STANDARD 0x00000000 |
| Standard read protocol. | |
| #define | EBI_DRP_EARLY 0x00000010 |
| Early read protocol. | |
External bus interface registers.
| #define EBI_CSR | ( | i | ) | (EBI_BASE + i * 4) |
Chip select register address.
Definition at line 80 of file at91_ebi.h.
| #define EBI_DBW 0x00000003 |
Masks data bus width.
Definition at line 82 of file at91_ebi.h.
| #define EBI_DBW_16 0x00000001 |
16-bit data bus width.
Definition at line 83 of file at91_ebi.h.
| #define EBI_DBW_8 0x00000002 |
8-bit data bus width.
Definition at line 84 of file at91_ebi.h.
| #define EBI_NWS 0x0000001C |
Masks number of wait states.
Definition at line 86 of file at91_ebi.h.
| #define EBI_NWS_1 0x00000000 |
1 wait state.
Definition at line 87 of file at91_ebi.h.
| #define EBI_NWS_2 0x00000004 |
2 wait states.
Definition at line 88 of file at91_ebi.h.
| #define EBI_NWS_3 0x00000008 |
3 wait states.
Definition at line 89 of file at91_ebi.h.
| #define EBI_NWS_4 0x0000000C |
4 wait states.
Definition at line 90 of file at91_ebi.h.
| #define EBI_NWS_5 0x00000010 |
5 wait states.
Definition at line 91 of file at91_ebi.h.
| #define EBI_NWS_6 0x00000014 |
6 wait states.
Definition at line 92 of file at91_ebi.h.
| #define EBI_NWS_7 0x00000018 |
7 wait states.
Definition at line 93 of file at91_ebi.h.
| #define EBI_NWS_8 0x0000001C |
8 wait states.
Definition at line 94 of file at91_ebi.h.
| #define EBI_WSE 0x00000020 |
Wait state enable.
Definition at line 96 of file at91_ebi.h.
| #define EBI_PAGES 0x00000180 |
Page size mask.
Definition at line 98 of file at91_ebi.h.
| #define EBI_PAGES_1M 0x00000000 |
1 MByte page size.
Definition at line 99 of file at91_ebi.h.
| #define EBI_PAGES_4M 0x00000080 |
4 MBytes page size.
Definition at line 100 of file at91_ebi.h.
| #define EBI_PAGES_16M 0x00000100 |
16 MBytes page size.
Definition at line 101 of file at91_ebi.h.
| #define EBI_PAGES_64M 0x00000180 |
64 MBytes page size.
Definition at line 102 of file at91_ebi.h.
| #define EBI_TDF 0x00000E00 |
Masks data float output time clock cycles.
Definition at line 104 of file at91_ebi.h.
| #define EBI_TDF_0 0x00000000 |
No added cycles.
Definition at line 105 of file at91_ebi.h.
| #define EBI_TDF_1 0x00000200 |
1 cycle.
Definition at line 106 of file at91_ebi.h.
| #define EBI_TDF_2 0x00000400 |
2 cycles.
Definition at line 107 of file at91_ebi.h.
| #define EBI_TDF_3 0x00000600 |
3 cycles.
Definition at line 108 of file at91_ebi.h.
| #define EBI_TDF_4 0x00000800 |
4 cycles.
Definition at line 109 of file at91_ebi.h.
| #define EBI_TDF_5 0x00000A00 |
5 cycles.
Definition at line 110 of file at91_ebi.h.
| #define EBI_TDF_6 0x00000C00 |
6 cycles.
Definition at line 111 of file at91_ebi.h.
| #define EBI_TDF_7 0x00000E00 |
7 cycles.
Definition at line 112 of file at91_ebi.h.
| #define EBI_BAT 0x00001000 |
Byte access type.
Definition at line 114 of file at91_ebi.h.
| #define EBI_BAT_BYTE_WRITE 0x00000000 |
Byte write access type.
Definition at line 115 of file at91_ebi.h.
| #define EBI_BAT_BYTE_SELECT 0x00001000 |
Byte select access type.
Definition at line 116 of file at91_ebi.h.
| #define EBI_CSEN 0x00002000 |
Chip select enable.
Definition at line 118 of file at91_ebi.h.
| #define EBI_BA 0xFFF00000 |
Page base address mask.
Definition at line 120 of file at91_ebi.h.
| #define EBI_RCR (EBI_BASE + 0x20) |
Remap control register address.
Definition at line 125 of file at91_ebi.h.
| #define EBI_RCB 0x00000001 |
Remap command.
Definition at line 126 of file at91_ebi.h.
| #define EBI_MCR (EBI_BASE + 0x24) |
Memory control register address.
Definition at line 131 of file at91_ebi.h.
| #define EBI_ALE 0x00000007 |
Address line enable.
Definition at line 132 of file at91_ebi.h.
| #define EBI_ALE_16M 0x00000000 |
16 Mbytes total address space.
Definition at line 133 of file at91_ebi.h.
| #define EBI_ALE_8M 0x00000004 |
8 Mbytes total address space.
Definition at line 134 of file at91_ebi.h.
| #define EBI_ALE_4M 0x00000005 |
4 Mbytes total address space.
Definition at line 135 of file at91_ebi.h.
| #define EBI_ALE_2M 0x00000006 |
2 Mbytes total address space.
Definition at line 136 of file at91_ebi.h.
| #define EBI_ALE_1M 0x00000007 |
1 Mbyte total address space.
Definition at line 137 of file at91_ebi.h.
| #define EBI_DRP 0x00000010 |
Data read protocol mask.
Definition at line 139 of file at91_ebi.h.
| #define EBI_DRP_STANDARD 0x00000000 |
Standard read protocol.
Definition at line 140 of file at91_ebi.h.
| #define EBI_DRP_EARLY 0x00000010 |
Early read protocol.
Definition at line 141 of file at91_ebi.h.