EEFC Flash Mode Register | |
#define | EEFC_FMR_OFF 0x00000000 |
Mode register offset. | |
#define | EEFC_FMR (EEFC_BASE + EEFC_FMR_OFF) |
Mode register address. | |
#define | EEFC_FWS 0x00000F00 |
Flash wait state mask. | |
#define | EEFC_FWS_LSB 8 |
Flash wait state LSB. | |
EEFC Flash Command Register | |
#define | EEFC_FCR_OFF 0x00000004 |
Command register offset. | |
#define | EEFC_FCR (EEFC_BASE + EEFC_FCR_OFF) |
Command register address. | |
#define | EEFC_FCMD 0x000000FF |
Flash command mask. | |
#define | EEFC_FCMD_GETD 0x00000000 |
Get flash descriptor command. | |
#define | EEFC_FCMD_WP 0x00000001 |
Write page command. | |
#define | EEFC_FCMD_WPL 0x00000002 |
Write page and lock command. | |
#define | EEFC_FCMD_EWP 0x00000003 |
Erase and write page command. | |
#define | EEFC_FCMD_EWPL 0x00000004 |
Erase and write page with lock command. | |
#define | EEFC_FCMD_EA 0x00000005 |
Erase all command. | |
#define | EEFC_FCMD_EPL 0x00000006 |
Erase plane command. | |
#define | EEFC_FCMD_EPA 0x00000007 |
Erase pages command. | |
#define | EEFC_FCMD_SLB 0x00000008 |
Set lock bit command. | |
#define | EEFC_FCMD_CLB 0x00000009 |
Clear lock bit command. | |
#define | EEFC_FCMD_GLB 0x0000000A |
Get lock bit command. | |
#define | EEFC_FCMD_SGPB 0x0000000B |
Set GPNVM bit command. | |
#define | EEFC_FCMD_CGPB 0x0000000C |
Clear GPNVM bit command. | |
#define | EEFC_FCMD_GGPB 0x0000000D |
Get GPNVM bit command. | |
#define | EEFC_FARG 0x00FFFF00 |
Flash command argument mask. | |
#define | EEFC_FARG_LSB 8 |
Flash command argument LSB. | |
#define | EEFC_FKEY 0x5A000000 |
Flash write protection key. | |
EEFC Flash Status Register | |
#define | EEFC_FSR_OFF 0x00000008 |
Status register offset. | |
#define | EEFC_FSR (EEFC_BASE + EEFC_FSR_OFF) |
Status register address. | |
#define | EEFC_FRDY 0x00000001 |
Flash ready. | |
#define | EEFC_FCMDE 0x00000002 |
Flash command error. | |
#define | EEFC_LOCKE 0x00000004 |
Flash lock error. | |
EEFC Flash Result Register | |
#define | EEFC_FRR_OFF 0x0000000C |
Result register offset. | |
#define | EEFC_FRR (EEFC_BASE + EEFC_FRR_OFF) |
Result register address. | |
EEFC Flash Version Register | |
#define | EEFC_FVR_OFF 0x00000010 |
Version register offset. | |
#define | EEFC_FVR (EEFC_BASE + EEFC_FVR_OFF) |
Version register address. |
#define EEFC_FMR_OFF 0x00000000 |
Mode register offset.
Definition at line 54 of file at91_eefc.h.
#define EEFC_FMR (EEFC_BASE + EEFC_FMR_OFF) |
Mode register address.
Definition at line 55 of file at91_eefc.h.
#define EEFC_FWS 0x00000F00 |
Flash wait state mask.
Definition at line 56 of file at91_eefc.h.
#define EEFC_FWS_LSB 8 |
Flash wait state LSB.
Definition at line 57 of file at91_eefc.h.
#define EEFC_FCR_OFF 0x00000004 |
Command register offset.
Definition at line 62 of file at91_eefc.h.
#define EEFC_FCR (EEFC_BASE + EEFC_FCR_OFF) |
Command register address.
Definition at line 63 of file at91_eefc.h.
#define EEFC_FCMD 0x000000FF |
Flash command mask.
Definition at line 64 of file at91_eefc.h.
#define EEFC_FCMD_GETD 0x00000000 |
Get flash descriptor command.
Definition at line 65 of file at91_eefc.h.
#define EEFC_FCMD_WP 0x00000001 |
Write page command.
Definition at line 66 of file at91_eefc.h.
#define EEFC_FCMD_WPL 0x00000002 |
Write page and lock command.
Definition at line 67 of file at91_eefc.h.
#define EEFC_FCMD_EWP 0x00000003 |
Erase and write page command.
Definition at line 68 of file at91_eefc.h.
#define EEFC_FCMD_EWPL 0x00000004 |
Erase and write page with lock command.
Definition at line 69 of file at91_eefc.h.
#define EEFC_FCMD_EA 0x00000005 |
Erase all command.
Definition at line 70 of file at91_eefc.h.
#define EEFC_FCMD_EPL 0x00000006 |
Erase plane command.
Definition at line 71 of file at91_eefc.h.
#define EEFC_FCMD_EPA 0x00000007 |
Erase pages command.
Definition at line 72 of file at91_eefc.h.
#define EEFC_FCMD_SLB 0x00000008 |
Set lock bit command.
Definition at line 73 of file at91_eefc.h.
#define EEFC_FCMD_CLB 0x00000009 |
Clear lock bit command.
Definition at line 74 of file at91_eefc.h.
#define EEFC_FCMD_GLB 0x0000000A |
Get lock bit command.
Definition at line 75 of file at91_eefc.h.
#define EEFC_FCMD_SGPB 0x0000000B |
Set GPNVM bit command.
Definition at line 76 of file at91_eefc.h.
#define EEFC_FCMD_CGPB 0x0000000C |
Clear GPNVM bit command.
Definition at line 77 of file at91_eefc.h.
#define EEFC_FCMD_GGPB 0x0000000D |
Get GPNVM bit command.
Definition at line 78 of file at91_eefc.h.
#define EEFC_FARG 0x00FFFF00 |
Flash command argument mask.
Definition at line 79 of file at91_eefc.h.
#define EEFC_FARG_LSB 8 |
Flash command argument LSB.
Definition at line 80 of file at91_eefc.h.
#define EEFC_FKEY 0x5A000000 |
Flash write protection key.
Definition at line 81 of file at91_eefc.h.
#define EEFC_FSR_OFF 0x00000008 |
Status register offset.
Definition at line 86 of file at91_eefc.h.
#define EEFC_FSR (EEFC_BASE + EEFC_FSR_OFF) |
Status register address.
Definition at line 87 of file at91_eefc.h.
#define EEFC_FRDY 0x00000001 |
Flash ready.
Definition at line 88 of file at91_eefc.h.
#define EEFC_FCMDE 0x00000002 |
Flash command error.
Definition at line 89 of file at91_eefc.h.
#define EEFC_LOCKE 0x00000004 |
Flash lock error.
Definition at line 90 of file at91_eefc.h.
#define EEFC_FRR_OFF 0x0000000C |
Result register offset.
Definition at line 95 of file at91_eefc.h.
#define EEFC_FRR (EEFC_BASE + EEFC_FRR_OFF) |
Result register address.
Definition at line 96 of file at91_eefc.h.
#define EEFC_FVR_OFF 0x00000010 |
Version register offset.
Definition at line 101 of file at91_eefc.h.
#define EEFC_FVR (EEFC_BASE + EEFC_FVR_OFF) |
Version register address.
Definition at line 102 of file at91_eefc.h.