Periodic interval timer registers. More...
Periodic Inverval Timer Mode Register | |
#define | PIT_MR_OFF 0x00000000 |
Mode register offset. | |
#define | PIT_MR (PIT_BASE + PIT_MR_OFF) |
Mode register address. | |
#define | PIT_PIV 0x000FFFFF |
Periodic interval value mask. | |
#define | PIT_PIV_LSB 0 |
Periodic interval value LSB. | |
#define | PIT_PITEN 0x01000000 |
Periodic interval timer enable. | |
#define | PIT_PITIEN 0x02000000 |
Periodic interval timer interrupt enable. | |
Periodic Inverval Timer Status Register | |
#define | PIT_SR_OFF 0x00000004 |
Status register offset. | |
#define | PIT_SR (PIT_BASE + PIT_SR_OFF) |
Status register address. | |
#define | PIT_PITS 0x00000001 |
Timer has reached PIT_PIV. | |
Periodic Inverval Timer Value and Image Registers | |
#define | PIT_PIVR_OFF 0x00000008 |
Value register offset. | |
#define | PIT_PIVR (PIT_BASE + PIT_PIVR_OFF) |
Value register address. | |
#define | PIT_PIIR_OFF 0x0000000C |
Image register offset. | |
#define | PIT_PIIR (PIT_BASE + PIT_PIIR_OFF) |
Image register address. | |
#define | PIT_CPIV 0x000FFFFF |
Current periodic interval value mask. | |
#define | PIT_CPIV_LSB 0 |
Current periodic interval value LSB. | |
#define | PIT_PICNT 0xFFF00000 |
Periodic interval counter mask. | |
#define | PIT_PICNT_LSB 20 |
Periodic interval counter LSB. |
Periodic interval timer registers.
#define PIT_MR_OFF 0x00000000 |
Mode register offset.
Definition at line 57 of file at91_pit.h.
#define PIT_MR (PIT_BASE + PIT_MR_OFF) |
Mode register address.
Definition at line 58 of file at91_pit.h.
Referenced by NutGetTickClock(), and NutRegisterTimer().
#define PIT_PIV 0x000FFFFF |
Periodic interval value mask.
Definition at line 59 of file at91_pit.h.
Referenced by NutGetTickClock().
#define PIT_PIV_LSB 0 |
Periodic interval value LSB.
Definition at line 60 of file at91_pit.h.
Referenced by NutRegisterTimer().
#define PIT_PITEN 0x01000000 |
Periodic interval timer enable.
Definition at line 61 of file at91_pit.h.
Referenced by NutRegisterTimer().
#define PIT_PITIEN 0x02000000 |
Periodic interval timer interrupt enable.
Definition at line 62 of file at91_pit.h.
Referenced by NutRegisterTimer().
#define PIT_SR_OFF 0x00000004 |
Status register offset.
Definition at line 67 of file at91_pit.h.
#define PIT_SR (PIT_BASE + PIT_SR_OFF) |
Status register address.
Definition at line 68 of file at91_pit.h.
#define PIT_PITS 0x00000001 |
Timer has reached PIT_PIV.
Definition at line 69 of file at91_pit.h.
#define PIT_PIVR_OFF 0x00000008 |
Value register offset.
Definition at line 74 of file at91_pit.h.
#define PIT_PIVR (PIT_BASE + PIT_PIVR_OFF) |
#define PIT_PIIR_OFF 0x0000000C |
Image register offset.
Definition at line 76 of file at91_pit.h.
#define PIT_PIIR (PIT_BASE + PIT_PIIR_OFF) |
Image register address.
Definition at line 77 of file at91_pit.h.
#define PIT_CPIV 0x000FFFFF |
Current periodic interval value mask.
Definition at line 78 of file at91_pit.h.
#define PIT_CPIV_LSB 0 |
Current periodic interval value LSB.
Definition at line 79 of file at91_pit.h.
#define PIT_PICNT 0xFFF00000 |
Periodic interval counter mask.
Definition at line 80 of file at91_pit.h.
#define PIT_PICNT_LSB 20 |
Periodic interval counter LSB.
Definition at line 81 of file at91_pit.h.