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00054 #include <arch/arm.h>
00055 #include <dev/irqreg.h>
00056
00057 #if defined (IRQ2_ID)
00058
00059 #ifndef NUT_IRQPRI_IRQ2
00060 #define NUT_IRQPRI_IRQ2 4
00061 #endif
00062
00063 static int Interrupt2Ctl(int cmd, void *param);
00064
00065 IRQ_HANDLER sig_INTERRUPT2 = {
00066 #ifdef NUT_PERFMON
00067 0,
00068 #endif
00069 NULL,
00070 NULL,
00071 Interrupt2Ctl
00072 };
00073
00077 static void Interrupt2Entry(void) __attribute__ ((naked));
00078 void Interrupt2Entry(void)
00079 {
00080 IRQ_ENTRY();
00081 #ifdef NUT_PERFMON
00082 sig_INTERRUPT2.ir_count++;
00083 #endif
00084 if (sig_INTERRUPT2.ir_handler) {
00085 (sig_INTERRUPT2.ir_handler) (sig_INTERRUPT2.ir_arg);
00086 }
00087 IRQ_EXIT();
00088 }
00089
00105 static int Interrupt2Ctl(int cmd, void *param)
00106 {
00107 int rc = 0;
00108 unsigned int *ival = (unsigned int *)param;
00109 int_fast8_t enabled = inr(AIC_IMR) & _BV(IRQ2_ID);
00110
00111
00112 if (enabled) {
00113 outr(AIC_IDCR, _BV(IRQ2_ID));
00114 }
00115
00116 switch(cmd) {
00117 case NUT_IRQCTL_INIT:
00118
00119 outr(AIC_SVR(IRQ2_ID), (unsigned int)Interrupt2Entry);
00120
00121 outr(AIC_SMR(IRQ2_ID), AIC_SRCTYPE_EXT_NEGATIVE_EDGE | NUT_IRQPRI_IRQ2);
00122
00123 outr(AIC_ICCR, _BV(IRQ2_ID));
00124 break;
00125 case NUT_IRQCTL_STATUS:
00126 if (enabled) {
00127 *ival |= 1;
00128 }
00129 else {
00130 *ival &= ~1;
00131 }
00132 break;
00133 case NUT_IRQCTL_ENABLE:
00134 enabled = 1;
00135 break;
00136 case NUT_IRQCTL_DISABLE:
00137 enabled = 0;
00138 break;
00139 case NUT_IRQCTL_GETMODE:
00140 {
00141 unsigned int val = inr(AIC_SMR(IRQ2_ID)) & AIC_SRCTYPE;
00142
00143 if (val == AIC_SRCTYPE_EXT_LOW_LEVEL) {
00144 *ival = NUT_IRQMODE_LOWLEVEL;
00145 } else if (val == AIC_SRCTYPE_EXT_HIGH_LEVEL) {
00146 *ival = NUT_IRQMODE_HIGHLEVEL;
00147 } else if (val == AIC_SRCTYPE_EXT_POSITIVE_EDGE) {
00148 *ival = NUT_IRQMODE_RISINGEDGE;
00149 } else {
00150 *ival = NUT_IRQMODE_FALLINGEDGE;
00151 }
00152 }
00153 break;
00154 case NUT_IRQCTL_SETMODE:
00155 if (*ival == NUT_IRQMODE_LOWLEVEL) {
00156 outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_LOW_LEVEL);
00157 } else if (*ival == NUT_IRQMODE_HIGHLEVEL) {
00158 outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_HIGH_LEVEL);
00159 } else if (*ival == NUT_IRQMODE_FALLINGEDGE) {
00160 outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_NEGATIVE_EDGE);
00161 } else if (*ival == NUT_IRQMODE_RISINGEDGE) {
00162 outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_POSITIVE_EDGE);
00163 } else {
00164 rc = -1;
00165 }
00166 break;
00167 case NUT_IRQCTL_GETPRIO:
00168 *ival = inr(AIC_SMR(IRQ2_ID)) & AIC_PRIOR;
00169 break;
00170 case NUT_IRQCTL_SETPRIO:
00171 outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_PRIOR) | *ival);
00172 break;
00173 #ifdef NUT_PERFMON
00174 case NUT_IRQCTL_GETCOUNT:
00175 *ival = (unsigned int)sig_INTERRUPT2.ir_count;
00176 sig_INTERRUPT2.ir_count = 0;
00177 break;
00178 #endif
00179 default:
00180 rc = -1;
00181 break;
00182 }
00183
00184
00185 if (enabled) {
00186 outr(AIC_IECR, _BV(IRQ2_ID));
00187 }
00188 return rc;
00189 }
00190
00191 #endif