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00044 #include <cfg/memory.h>
00045
00046 #include <dev/blockdev.h>
00047 #include <dev/spi_at45d.h>
00048
00049 #ifndef SPI_RATE_AT45D0
00050 #define SPI_RATE_AT45D0 33000000
00051 #endif
00052
00053 #ifndef SPI_MODE_AT45D0
00054
00055 #ifdef SPI_CSHIGH_AT45D0
00056 #define SPI_MODE_AT45D0 (SPI_MODE_3 | SPI_MODE_CSHIGH)
00057 #else
00058 #define SPI_MODE_AT45D0 SPI_MODE_3
00059 #endif
00060
00061 #elif defined(SPI_CSHIGH_AT45D0)
00062
00063
00064
00065
00066
00067 #if SPI_MODE_AT45D0 == SPI_MODE_0
00068 #undef SPI_MODE_AT45D0
00069 #define SPI_MODE_AT45D0 (SPI_MODE_0 | SPI_MODE_CSHIGH)
00070 #elif SPI_MODE_AT45D0 == SPI_MODE_3
00071 #undef SPI_MODE_AT45D0
00072 #define SPI_MODE_AT45D0 (SPI_MODE_3 | SPI_MODE_CSHIGH)
00073 #endif
00074
00075 #endif
00076
00077 #ifndef MOUNT_OFFSET_AT45D0
00078 #define MOUNT_OFFSET_AT45D0 0
00079 #endif
00080
00081 #ifndef MOUNT_TOP_RESERVE_AT45D0
00082 #define MOUNT_TOP_RESERVE_AT45D0 0
00083 #endif
00084
00088 NUTSPINODE nodeSpiAt45d0 = {
00089 NULL,
00090 NULL,
00091 SPI_RATE_AT45D0,
00092 SPI_MODE_AT45D0,
00093 8,
00094 0
00095 };
00096
00100 static NUTBLOCKIO blkIoAt45d0 = {
00101 NULL,
00102 0,
00103 0,
00104 MOUNT_OFFSET_AT45D0,
00105 MOUNT_TOP_RESERVE_AT45D0,
00106 SpiAt45dPageRead,
00107 SpiAt45dPageWrite,
00108 #ifdef __HARVARD_ARCH__
00109 SpiAt45dPageWrite_P,
00110 #endif
00111 SpiAt45dIOCtl
00112 };
00113
00117 NUTDEVICE devSpiAt45d0 = {
00118 NULL,
00119 {'A', 'T', '4', '5', 'D', '0', 0, 0, 0},
00120 IFTYP_BLKIO,
00121 0,
00122 0,
00123 &nodeSpiAt45d0,
00124 &blkIoAt45d0,
00125 SpiAt45dInit,
00126 NutBlockDeviceIOCtl,
00127 NutBlockDeviceRead,
00128 NutBlockDeviceWrite,
00129 #ifdef __HARVARD_ARCH__
00130 NutBlockDeviceWrite_P,
00131 #endif
00132 NutBlockDeviceOpen,
00133 NutBlockDeviceClose,
00134 NutBlockDeviceSize
00135 };