#include <cfg/arch.h>
#include <cfg/arch/gpio.h>
#include <dev/irqreg.h>

Include dependency graph for gpio_lpc17xx.h:

Data Structures
struct	GPIO_VECTOR
struct	_gpio_signal
Defines
#define	NUTGPIO_PORT 0
#define	NUTGPIO_PORT0 0
#define	NUTGPIO_PORT1 1
#define	NUTGPIO_PORT2 2
#define	NUTGPIO_PORT3 3
#define	NUTGPIO_PORT4 4
#define	NUTGPIO_PORT5 5
#define	NUTGPIO_PORTA NUTGPIO_PORT0
#define	NUTGPIO_PORTB NUTGPIO_PORT1
#define	NUTGPIO_PORTC NUTGPIO_PORT2
#define	NUTGPIO_PORTD NUTGPIO_PORT3
#define	NUTGPIO_PORTE NUTGPIO_PORT4
#define	NUTGPIO_PORTF NUTGPIO_PORT5
#define	NUTGPIO_EXTINT0 1
#define	NUTGPIO_EXTINT1 2
#define	NUTGPIO_EXTINT2 3
#define	NUTGPIO_EXTINT3 4
#define	NUTGPIO_EXTINT4 5
#define	GPIO_CFG_INPUT 0x00000000
	GPIO input.
#define	GPIO_CFG_DISABLED 0x00000001
	GPIO disabled.
#define	GPIO_CFG_OUTPUT 0x00000002
	GPIO output direction enabled.
#define	GPIO_CFG_PULLUP 0x00000004
	GPIO pull-up enabled.
#define	GPIO_CFG_PULLDOWN 0x00000008
	GPIO pull-down enabled.
#define	GPIO_CFG_REPEATER 0x00000010
	GPIO repeater-mode enabled.
#define	GPIO_CFG_MULTIDRIVE 0x00000020
	GPIO open drain output feature enabled.
#define	GPIO_CFG_PERIPHERAL_MASK 0x07000000
	GPIO input glitch filter enabled.
#define	GPIO_CFG_PERIPHERAL_POS 24
#define	GPIO_CFG_PERIPHERAL0 0x00000000
#define	GPIO_CFG_PERIPHERAL1 0x01000000
#define	GPIO_CFG_PERIPHERAL2 0x02000000
#define	GPIO_CFG_PERIPHERAL3 0x03000000
#define	GPIO_BANKID2BASE(bank) (LPC_GPIO0_BASE + (bank << 5))
#define	GpioPinGet(bank, bit) CM3BBREG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOPIN, bit)
#define	GpioPinSet(bank, bit, value)
#define	GpioPinMaskSet(bank, bit, value) CM3BBREG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOMASK, bit) = (value)
#define	GpioPinSetHigh(bank, bit) CM3BBREG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOSET, bit) = 1
#define	GpioPinSetLow(bank, bit) CM3BBREG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOCLR, bit) = 1
#define	GpioPortGet(bank) CM3REG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOPIN )
#define	GpioPortSet(bank, value) CM3REG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOPIN ) = (value)
#define	GpioPortSetHigh(bank, mask) CM3REG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOSET) = (mask)
#define	GpioPortSetLow(bank, mask) CM3REG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOCLR) = (mask)
#define	GpioPortMaskSet(bank, mask) CM3REG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOMASK) = (mask)
Typedefs
typedef struct _gpio_signal	GPIO_SIGNAL
Functions
uint32_t	GpioPinConfigGet (int bank, int bit)
	Get pin configuration.
int	GpioPinConfigSet (int bank, int bit, uint32_t flags)
	Set pin configuration.
int	GpioPortConfigSet (int bank, uint32_t mask, uint32_t flags)
	Set port wide pin configuration.
int	GpioRegisterIrqHandler (GPIO_SIGNAL sig, int bit, void(handler)(void ), void arg)
	Register a GPIO pin interrupt handler.
int	GpioIrqEnable (GPIO_SIGNAL *sig, int bit)
	Enable a specified GPIO interrupt.
int	GpioIrqStatus (GPIO_SIGNAL *sig, int bit)
	Query the status of a specified GPIO interrupt.
int	GpioIrqDisable (GPIO_SIGNAL *sig, int bit)
	Disable a specified GPIO interrupt.
int	GpioIrqSetMode (GPIO_SIGNAL *sig, int bit, int mode)
	Set the GPIO interrupt mode for a pin.
Variables
GPIO_SIGNAL	sig_GPIO0
GPIO_SIGNAL	sig_GPIO2

Define Documentation

#define NUTGPIO_PORT 0

#define NUTGPIO_PORT0 0

Referenced by GpioPinConfigSet(), and GpioPortConfigSet().

#define NUTGPIO_PORT1 1

Referenced by Lpc177x_8x_MciInit(), Lpc17xxEmacInit(), and NutBoardInit().

#define NUTGPIO_PORT2 2

Referenced by NutBoardInit().

#define NUTGPIO_PORT3 3

Referenced by NutBoardInit().

#define NUTGPIO_PORT4 4

Referenced by NutBoardInit().

#define NUTGPIO_PORT5 5

Referenced by GpioPortConfigSet().

#define NUTGPIO_PORTA NUTGPIO_PORT0

#define NUTGPIO_PORTB NUTGPIO_PORT1

#define NUTGPIO_PORTC NUTGPIO_PORT2

#define NUTGPIO_PORTD NUTGPIO_PORT3

#define NUTGPIO_PORTE NUTGPIO_PORT4

#define NUTGPIO_PORTF NUTGPIO_PORT5

#define NUTGPIO_EXTINT0 1

#define NUTGPIO_EXTINT1 2

#define NUTGPIO_EXTINT2 3

#define NUTGPIO_EXTINT3 4

#define NUTGPIO_EXTINT4 5

#define GPIO_CFG_INPUT 0x00000000

GPIO input.

Will configure the pin as input. This is the default state, when no other config option is given.

#define GPIO_CFG_DISABLED 0x00000001

GPIO disabled.

Will activate the pins alternate function if set. This may not work on all platforms.

#define GPIO_CFG_OUTPUT 0x00000002

GPIO output direction enabled.

If set, the pin is configured as an output. Otherwise it is in input mode or z-state.

#define GPIO_CFG_PULLUP 0x00000004

GPIO pull-up enabled.

#define GPIO_CFG_PULLDOWN 0x00000008

GPIO pull-down enabled.

Referenced by GpioPinConfigGet(), GpioPinConfigSet(), GpioPortConfigSet(), and NutBoardInit().

#define GPIO_CFG_REPEATER 0x00000010

GPIO repeater-mode enabled.

Referenced by GpioPinConfigGet(), GpioPinConfigSet(), GpioPortConfigSet(), and NutBoardInit().

#define GPIO_CFG_MULTIDRIVE 0x00000020

GPIO open drain output feature enabled.

If not set, the output will use push pull mode.

#define GPIO_CFG_PERIPHERAL_MASK 0x07000000

GPIO input glitch filter enabled.

GPIO set to alternate function 0.

LPC176x specific: Enables alternate function 0..3 of the pin. Function 0 is the GPIO function

Referenced by GpioPinConfigGet(), GpioPinConfigSet(), and GpioPortConfigSet().

#define GPIO_CFG_PERIPHERAL_POS 24

Referenced by GpioPinConfigGet(), GpioPinConfigSet(), and GpioPortConfigSet().

#define GPIO_CFG_PERIPHERAL0 0x00000000

#define GPIO_CFG_PERIPHERAL1 0x01000000

#define GPIO_CFG_PERIPHERAL2 0x02000000

#define GPIO_CFG_PERIPHERAL3 0x03000000

#define GPIO_BANKID2BASE ( bank ) (LPC_GPIO0_BASE + (bank << 5))

Referenced by GpioPinConfigGet(), GpioPinConfigSet(), and GpioPortConfigSet().

#define GpioPinGet	(	bank,
		bit
	)	CM3BBREG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOPIN, bit)

Examples:: portdio/portdio.c, and tcps/tcps.c.

Referenced by sys_key().

#define GpioPinSet	(	bank,
		bit,
		value
	)

Value:

if (value) CM3BBREG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOSET, bit) = 1; else \
                                                    CM3BBREG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOCLR, bit) = 1;

Referenced by NutSetLed().

#define GpioPinMaskSet	(	bank,
		bit,
		value
	)	CM3BBREG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOMASK, bit) = (value)

#define GpioPinSetHigh	(	bank,
		bit
	)	CM3BBREG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOSET, bit) = 1

Examples:: portdio/portdio.c.

Referenced by GpioPinSet(), InitLED(), Lpc177x_8x_MciInit(), NutBoardInit(), NutRegisterOwiBus_BB(), ProcessRequests(), Stm32I2cBus1Recover(), Stm32I2cBus2Recover(), and Stm32Usart3ChipSelect().

#define GpioPinSetLow	(	bank,
		bit
	)	CM3BBREG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOCLR, bit) = 1

Examples:: portdio/portdio.c.

Referenced by GpioPinSet(), GpioSpiBus0Select(), init_dio(), Lpc177x_8x_MciInit(), NutBoardInit(), ProcessRequests(), Stm32I2cBus1Recover(), Stm32I2cBus2Recover(), and Stm32Usart3ChipSelect().

#define GpioPortGet ( bank ) CM3REG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOPIN )

Referenced by GpioPortSetHigh(), and GpioPortSetLow().

#define GpioPortSet	(	bank,
		value
	)	CM3REG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOPIN ) = (value)

Referenced by GpioPortSetHigh(), and GpioPortSetLow().

#define GpioPortSetHigh	(	bank,
		mask
	)	CM3REG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOSET) = (mask)

Referenced by GpioPortSet().

#define GpioPortSetLow	(	bank,
		mask
	)	CM3REG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOCLR) = (mask)

Referenced by GpioPortSet().

#define GpioPortMaskSet	(	bank,
		mask
	)	CM3REG(GPIO_BANKID2BASE(bank), LPC_GPIO_TypeDef, FIOMASK) = (mask)

Typedef Documentation

typedef struct _gpio_signal GPIO_SIGNAL

Variable Documentation

GPIO_SIGNAL sig_GPIO0

GPIO_SIGNAL sig_GPIO2

Data Structures

Defines

Typedefs

Functions

Variables

Define Documentation

Typedef Documentation

Variable Documentation