Defines | |
| #define | RCC_AHBPeriph_GPIOA RCC_AHBENR_GPIOAEN |
| #define | RCC_AHBPeriph_GPIOB RCC_AHBENR_GPIOBEN |
| #define | RCC_AHBPeriph_GPIOC RCC_AHBENR_GPIOCEN |
| #define | RCC_AHBPeriph_GPIOD RCC_AHBENR_GPIODEN |
| #define | RCC_AHBPeriph_GPIOE RCC_AHBENR_GPIOEEN |
| #define | RCC_AHBPeriph_GPIOH RCC_AHBENR_GPIOHEN |
| #define | RCC_AHBPeriph_GPIOF RCC_AHBENR_GPIOFEN |
| #define | RCC_AHBPeriph_GPIOG RCC_AHBENR_GPIOGEN |
| #define | RCC_AHBPeriph_CRC RCC_AHBENR_CRCEN |
| #define | RCC_AHBPeriph_FLITF RCC_AHBENR_FLITFEN |
| #define | RCC_AHBPeriph_SRAM RCC_AHBLPENR_SRAMLPEN |
| #define | RCC_AHBPeriph_DMA1 RCC_AHBENR_DMA1EN |
| #define | RCC_AHBPeriph_DMA2 RCC_AHBENR_DMA2EN |
| #define | RCC_AHBPeriph_AES RCC_AHBENR_AESEN |
| #define | RCC_AHBPeriph_FSMC RCC_AHBENR_FSMCEN |
| #define | IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xB4FF6F00) == 0x00) && ((PERIPH) != 0x00)) |
| #define | IS_RCC_AHB_LPMODE_PERIPH(PERIPH) ((((PERIPH) & 0xB4FF6F00) == 0x00) && ((PERIPH) != 0x00)) |
| #define RCC_AHBPeriph_GPIOA RCC_AHBENR_GPIOAEN |
| #define RCC_AHBPeriph_GPIOB RCC_AHBENR_GPIOBEN |
| #define RCC_AHBPeriph_GPIOC RCC_AHBENR_GPIOCEN |
| #define RCC_AHBPeriph_GPIOD RCC_AHBENR_GPIODEN |
| #define RCC_AHBPeriph_GPIOE RCC_AHBENR_GPIOEEN |
| #define RCC_AHBPeriph_GPIOH RCC_AHBENR_GPIOHEN |
| #define RCC_AHBPeriph_GPIOF RCC_AHBENR_GPIOFEN |
| #define RCC_AHBPeriph_GPIOG RCC_AHBENR_GPIOGEN |
| #define RCC_AHBPeriph_CRC RCC_AHBENR_CRCEN |
| #define RCC_AHBPeriph_FLITF RCC_AHBENR_FLITFEN |
| #define RCC_AHBPeriph_SRAM RCC_AHBLPENR_SRAMLPEN |
| #define RCC_AHBPeriph_DMA1 RCC_AHBENR_DMA1EN |
| #define RCC_AHBPeriph_DMA2 RCC_AHBENR_DMA2EN |
| #define RCC_AHBPeriph_AES RCC_AHBENR_AESEN |
| #define RCC_AHBPeriph_FSMC RCC_AHBENR_FSMCEN |
| #define IS_RCC_AHB_PERIPH | ( | PERIPH | ) | ((((PERIPH) & 0xB4FF6F00) == 0x00) && ((PERIPH) != 0x00)) |
| #define IS_RCC_AHB_LPMODE_PERIPH | ( | PERIPH | ) | ((((PERIPH) & 0xB4FF6F00) == 0x00) && ((PERIPH) != 0x00)) |
Referenced by RCC_AHBPeriphClockLPModeCmd().