Peripheral Identifiers and Interrupts | |
| #define | FIQ_ID 0 |
| Fast interrupt. | |
| #define | SYSC_ID 1 |
| System interrupt. | |
| #define | PIOA_ID 2 |
| Parallel I/O controller A. | |
| #define | PIOB_ID 3 |
| Parallel I/O controller B. | |
| #define | PIOC_ID 4 |
| Parallel I/O controller C. | |
| #define | PIODE_ID 5 |
| Parallel I/O controller C. | |
| #define | RNG_ID 6 |
| Analog to digital converter. | |
| #define | US0_ID 7 |
| USART 0. | |
| #define | US1_ID 8 |
| USART 1. | |
| #define | US2_ID 9 |
| USART 2. | |
| #define | US3_ID 10 |
| USART 3. | |
| #define | MCI0_ID 11 |
| MMC interface. | |
| #define | TWI0_ID 12 |
| Two wire interface. | |
| #define | TWI1_ID 13 |
| Two wire interface. | |
| #define | SPI0_ID 14 |
| Serial peripheral 0. | |
| #define | SPI1_ID 15 |
| Serial peripheral 1. | |
| #define | SSC0_ID 16 |
| Serial peripheral interface. | |
| #define | SSC1_ID 17 |
| Serial peripheral interface. | |
| #define | TC0_ID 18 |
| Timer/counter 0. | |
| #define | TC1_ID 18 |
| Timer/counter 1. | |
| #define | TC2_ID 18 |
| Timer/counter 2. | |
| #define | TC3_ID 18 |
| Timer/counter 3. | |
| #define | TC4_ID 18 |
| Timer/counter 4. | |
| #define | TC5_ID 18 |
| Timer/counter 5. | |
| #define | PWMC_ID 19 |
| Pulse Width Modulation Controller. | |
| #define | TSADCC_ID 20 |
| Touch Screen ADC Controller. | |
| #define | DMA_ID 21 |
| DMA Controller. | |
| #define | UHP_ID 22 |
| USB host port. | |
| #define | LCDC_ID 23 |
| LCD controller. | |
| #define | AC97_ID 24 |
| AC97 controller. | |
| #define | EMAC_ID 25 |
| Ethernet MAC. | |
| #define | ISI_ID 26 |
| Image sensor interface. | |
| #define | UDP_ID 27 |
| USB device port. | |
| #define | MCI1_ID 29 |
| MMC interface. | |
| #define | IRQ0_ID 31 |
| External interrupt 0. | |
| #define | TWI_ID TWI0_ID |
| Two wire interface. | |
| #define | MCI_ID MCI0_ID |
| MMC interface. | |
| #define | SSC_ID SSC0_ID |
| Serial peripheral interface. | |
USART Peripheral Multiplexing | |
| #define | PB16_SCK0_B 16 |
| Channel 0 serial clock pin. | |
| #define | PB19_TXD0_A 19 |
| Channel 0 transmit data pin. | |
| #define | PB18_RXD0_A 18 |
| Channel 0 receive data pin. | |
| #define | PB15_CTS0_B 15 |
| Channel 0 clear to send pin. | |
| #define | PB17_RTS0_B 17 |
| Channel 0 request to send pin. | |
| #define | PD29_SCK1_B 29 |
| Channel 1 serial clock pin. | |
| #define | PB4_TXD1_A 4 |
| Channel 1 transmit data pin. | |
| #define | PB5_RXD1_A 5 |
| Channel 1 receive data pin. | |
| #define | PD17_CTS1_A 17 |
| Channel 1 clear to send pin. | |
| #define | PD16_RTS1_A 16 |
| Channel 1 request to send pin. | |
| #define | PD30_SCK2_B 30 |
| Channel 2 serial clock pin. | |
| #define | PB6_TXD2_A 6 |
| Channel 2 transmit data pin. | |
| #define | PB7_RXD2_A 7 |
| Channel 2 receive data pin. | |
| #define | PC11_CTS2_B 11 |
| Channel 2 clear to send pin. | |
| #define | PC9_RTS2_B 9 |
| Channel 2 request to send pin. | |
| #define | PA22_SCK3_B 22 |
| Channel 3 serial clock pin. | |
| #define | PB8_TXD3_A 8 |
| Channel 3 transmit data pin. | |
| #define | PB9_RXD3_A 9 |
| Channel 3 receive data pin. | |
| #define | PA24_CTS3_B 24 |
| Channel 3 clear to send pin. | |
| #define | PA23_RTS3_B 23 |
| Channel 3 request to send pin. | |
SPI Peripheral Multiplexing | |
| #define | PB0_SPI0_MISO_A 0 |
| Channel 0 master input slave output pin. | |
| #define | PB1_SPI0_MOSI_A 1 |
| Channel 0 master output slave input pin. | |
| #define | PB2_SPI0_SPCK_A 2 |
| Channel 0 serial clock pin. | |
| #define | PB3_SPI0_NPCS0_A 3 |
| Channel 0 chip select 0 pin. | |
| #define | PB18_SPI0_NPCS1_B 18 |
| Channel 0 chip select 1 pin. | |
| #define | PD24_SPI0_NPCS1_A 24 |
| Channel 0 chip select 1 pin. | |
| #define | PB19_SPI0_NPCS2_B 19 |
| Channel 0 chip select 2 pin. | |
| #define | PD25_SPI0_NPCS2_A 25 |
| Channel 0 chip select 1 pin. | |
| #define | PD27_SPI0_NPCS3_B 27 |
| Channel 0 chip select 3 pin. | |
| #define | SPI0_PINS _BV(PB0_SPI0_MISO_A) | _BV(PB1_SPI0_MOSI_A) | _BV(PB2_SPI0_SPCK_A) |
| #define | SPI0_PIO_BASE PIOA_BASE |
| #define | SPI0_PSR_OFF PIO_ASR_OFF |
| #define | SPI0_CS0_PIN _BV(PB3_SPI0_NPCS0_A) |
| #define | SPI0_CS0_PIO_BASE PIOB_BASE |
| #define | SPI0_CS0_PSR_OFF PIO_ASR_OFF |
| #define | SPI0_CS1_PIN _BV(PB18_SPI0_NPCS1_B) |
| #define | SPI0_CS1_PIO_BASE PIOB_BASE |
| #define | SPI0_CS1_PSR_OFF PIO_BSR_OFF |
| #define | PB14_SPI1_MISO_A 14 |
| Channel 1 master input slave output pin. | |
| #define | PB15_SPI1_MOSI_A 15 |
| Channel 1 master output slave input pin. | |
| #define | PB16_SPI1_SPCK_A 16 |
| Channel 1 serial clock pin. | |
| #define | PB17_SPI1_NPCS0_A 17 |
| Channel 1 chip select 0 pin. | |
| #define | PD28_SPI1_NPCS1_B 28 |
| Channel 1 chip select 1 pin. | |
| #define | PD18_SPI1_NPCS2_A 18 |
| Channel 1 chip select 2 pin. | |
| #define | PD19_SPI1_NPCS3_A 19 |
| Channel 1 chip select 3 pin. | |
| #define | SPI1_PINS _BV(PB14_SPI1_MISO_A) | _BV(PB15_SPI1_MOSI_A) | _BV(PB16_SPI1_SPCK_A) |
| #define | SPI1_PIO_BASE PIOB_BASE |
| #define | SPI1_PSR_OFF PIO_ASR_OFF |
| #define | SPI1_CS0_PIN _BV(PB17_SPI1_NPCS0_A) |
| #define | SPI1_CS0_PIO_BASE PIOB_BASE |
| #define | SPI1_CS0_PSR_OFF PIO_ASR_OFF |
| #define | SPI1_CS3_PIN _BV(PD19_SPI1_NPCS3_A) |
| #define | SPI1_CS3_PIO_BASE PIOD_BASE |
| #define | SPI1_CS3_PSR_OFF PIO_ASR_OFF |
Image Sensor Interface Peripheral Multiplexing | |
| #define | PB20_ISI_D0_A 20 |
| Image sensor data bit 0 pin. | |
| #define | PB21_ISI_D1_A 21 |
| Image sensor data bit 1 pin. | |
| #define | PB22_ISI_D2_A 22 |
| Image sensor data bit 2 pin. | |
| #define | PB23_ISI_D3_A 23 |
| Image sensor data bit 3 pin. | |
| #define | PB24_ISI_D4_A 24 |
| Image sensor data bit 4 pin. | |
| #define | PB25_ISI_D5_A 25 |
| Image sensor data bit 5 pin. | |
| #define | PB26_ISI_D6_A 26 |
| Image sensor data bit 6 pin. | |
| #define | PB27_ISI_D7_A 27 |
| Image sensor data bit 7 pin. | |
| #define | PB10_ISI_D8_B 10 |
| Image sensor data bit 8 pin. | |
| #define | PB11_ISI_D9_B 11 |
| Image sensor data bit 9 pin. | |
| #define | PB12_ISI_D10_B 12 |
| Image sensor data bit 10 pin. | |
| #define | PB13_ISI_D11_B 13 |
| Image sensor data bit 11 pin. | |
| #define | PB28_ISI_PCK_A 28 |
| Image sensor data clock pin. | |
| #define | PB29_ISI_VSYNC_A 29 |
| Image sensor vertical sync pin. | |
| #define | PB30_ISI_HSYNC_A 30 |
| Image sensor horizontal sync pin. | |
| #define | PB31_ISI_MCK_A 31 |
| Image sensor reference clock pin. | |
EMAC Interface Peripheral Multiplexing | |
| #define | PA6_ETX2_B 6 |
| Transmit data bit 2 pin. | |
| #define | PA7_ETX3_B 7 |
| Transmit data bit 3 pin. | |
| #define | PA10_ETX0_A 10 |
| Transmit data bit 0 pin. | |
| #define | PA11_ETX1_A 11 |
| Transmit data bit 1 pin. | |
| #define | PA12_ERX0_A 12 |
| Receive data bit 0 pin. | |
| #define | PA13_ERX1_A 13 |
| Receive data bit 1 pin. | |
| #define | PA14_ETXEN_A 14 |
| Transmit enable pin. | |
| #define | PA15_ERXDV_A 15 |
| Data valid pin. | |
| #define | PA16_ERXER_A 16 |
| Receive error pin. | |
| #define | PA17_ETXCK_A 17 |
| Transmit clock pin. | |
| #define | PA18_EMDC_A 18 |
| Management data clock pin. | |
| #define | PA19_EMDIO_A 19 |
| Management data I/O pin. | |
| #define | PA27_ETXER_B 27 |
| Transmit error pin. | |
| #define | PA8_ERX2_B 8 |
| Receive data bit 2 pin. | |
| #define | PA9_ERX3_B 9 |
| Receive data bit 3 pin. | |
| #define | PA28_ERXCK_B 28 |
| Receive clock pin. | |
| #define | PA29_ECRS_B 29 |
| Carrier sense pin. | |
| #define | PA30_ECOL_B 30 |
| Collision detect pin. | |
AT91SAM9G45-EKES-Specific LAN defintitions | |
| #define | PHY_MODE_RMII |
| #define | EMAC_PIO_ASR PIO_ASR_OFF |
| #define | PHY_MII_PINS_A |
| #define | EMAC_PIO_BSR PIO_BSR_OFF |
| #define | PHY_MII_PINS_B (PA6_ETX2_B | PA7_ETX3_B | PA27_ETXER_B | PA8_ERX2_B | PA9_ERX3_B | PA28_ERXCK_B | PA29_ECRS_B | PA30_ECOL_B) |
| #define | EMAC_PIO_PDR PIOA_PDR |
ADC Interface Peripheral Multiplexing | |
| #define | PD28_ADTRG_A 28 |
| ADC trigger pin. | |
Debug Unit Peripheral Multiplexing | |
| #define | PB12_DRXD_A 12 |
| Debug unit receive data pin. | |
| #define | PB13_DTXD_A 13 |
| Debug unit transmit data pin. | |
Synchronous Serial Controller Peripheral Multiplexing | |
| #define | PD2_TD0_A 2 |
| Transmit data pin. | |
| #define | PD3_RD0_A 3 |
| Receive data pin. | |
| #define | PD0_TK0_A 0 |
| Transmit clock pin. | |
| #define | PD4_RK0_A 4 |
| Receive clock pin. | |
| #define | PD1_TF0_A 1 |
| Transmit frame sync. pin. | |
| #define | PD5_RF0_A 5 |
| Receive frame sync. pin. | |
Two Wire Interface Peripheral Multiplexing | |
| #define | PA20_TWD0_A 20 |
| Two wire serial data pin. | |
| #define | PA21_TWCK0_A 21 |
| Two wire serial clock pin. | |
| #define | PB10_TWD1_A 10 |
| Two wire serial data pin. | |
| #define | PB11_TWCK1_A 11 |
| Two wire serial clock pin. | |
Timer/Counter Peripheral Multiplexing | |
| #define | PD23_TCLK0_A 23 |
| Timer/counter 0 external clock input. | |
| #define | PD20_TIOA0_A 20 |
| Timer/counter 0 I/O line A. | |
| #define | PD30_TIOB0_A 30 |
| Timer/counter 0 I/O line B. | |
| #define | PD29_TCLK1_A 29 |
| Timer/counter 1 external clock input. | |
| #define | PD21_TIOA1_A 21 |
| Timer/counter 1 I/O line A. | |
| #define | PD31_TIOB1_A 31 |
| Timer/counter 1 I/O line B. | |
| #define | PC10_TCLK2_B 10 |
| Timer/counter 2 external clock input. | |
| #define | PD22_TIOA2_A 22 |
| Timer/counter 2 I/O line A. | |
| #define | PA26_TIOB2_B 26 |
| Timer/counter 2 I/O line B. | |
| #define | PA0_TCLK3_B 0 |
| Timer/counter 3 external clock input. | |
| #define | PA1_TIOA3_B 1 |
| Timer/counter 3 I/O line A. | |
| #define | PA2_TIOB3_B 2 |
| Timer/counter 3 I/O line B. | |
| #define | PA3_TCLK4_B 3 |
| Timer/counter 4 external clock input. | |
| #define | PA4_TIOA4_B 4 |
| Timer/counter 4 I/O line A. | |
| #define | PA5_TIOB4_B 5 |
| Timer/counter 4 I/O line B. | |
| #define | PD9_TCLK5_B 9 |
| Timer/counter 5 external clock input. | |
| #define | PD7_TIOA5_B 7 |
| Timer/counter 5 I/O line A. | |
| #define | PD8_TIOB5_B 8 |
| Timer/counter 5 I/O line B. | |
Clocks, Oscillators and PLLs Peripheral Multiplexing | |
| #define | PD26_PCK0_A 26 |
| Programmable clock 0 output pin. | |
| #define | PE0_PCK0_B 0 |
| Programmable clock 0 output pin. | |
| #define | PD27_PCK1_A 27 |
| Programmable clock 1 output pin. | |
| #define | PE31_PCK1_B 31 |
| Programmable clock 1 output pin. | |
CompactFlash Peripheral Multiplexing | |
| #define | PC12_A25_CFRNW_A 12 |
| Read not write pin. | |
| #define | PC10_NCS4_CFCS0_A 10 |
| Chip select line 0 pin. | |
| #define | PC11_NCS5_CFCS1_A 11 |
| Chip select line 1 pin. | |
| #define | PC8_CFCE1_A 8 |
| Chip enable line 1 pin. | |
| #define | PC9_CFCE2_A 9 |
| Chip enable line 2 pin. | |
External Bus Interface Peripheral Multiplexing | |
| #define | PC16_D16_A 16 |
| Data bus bit 16 pin. | |
| #define | PC17_D17_A 17 |
| Data bus bit 17 pin. | |
| #define | PC18_D18_A 18 |
| Data bus bit 18 pin. | |
| #define | PC19_D19_A 19 |
| Data bus bit 19 pin. | |
| #define | PC20_D20_A 20 |
| Data bus bit 20 pin. | |
| #define | PC21_D21_A 21 |
| Data bus bit 21 pin. | |
| #define | PC22_D22_A 22 |
| Data bus bit 22 pin. | |
| #define | PC23_D23_A 23 |
| Data bus bit 23 pin. | |
| #define | PC24_D24_A 24 |
| Data bus bit 24 pin. | |
| #define | PC25_D25_A 25 |
| Data bus bit 25 pin. | |
| #define | PC26_D26_A 26 |
| Data bus bit 26 pin. | |
| #define | PC27_D27_A 27 |
| Data bus bit 27 pin. | |
| #define | PC28_D28_A 28 |
| Data bus bit 28 pin. | |
| #define | PC29_D29_A 29 |
| Data bus bit 29 pin. | |
| #define | PC30_D30_A 30 |
| Data bus bit 30 pin. | |
| #define | PC31_D31_A 31 |
| Data bus bit 31 pin. | |
| #define | PC6_A23_A 6 |
| Address bus bit 23 pin. | |
| #define | PC7_A24_A 7 |
| Address bus bit 24 pin. | |
| #define | PC13_NCS2_A 13 |
| Negated chip select 2 pin. | |
| #define | PC14_NCS3_NANDCS_A 14 |
| Negated chip select 3 pin. | |
| #define | PC15_NWAIT_A 15 |
| External wait signal pin. | |
Advanced Interrupt Controller Peripheral Multiplexing | |
| #define | PD19_FIQ_B 19 |
| Fast interrupt input pin. | |
| #define | PC18_IRQ_B 18 |
| External interrupt input pin. | |
LCD Port definition | |
| #define | LCDC_PIO_BASE PIOE_BASE |
| #define | LCDC_PINS_A 0x6FEFFFDE |
| #define | LCDC_PINS_B 0x10100000 |
| #define | LCDC_PINS (LCDC_PINS_A | LCDC_PINS_B) |
| #define | LCDC_PIO_ASR PIOE_ASR |
| #define | LCDC_PIO_BSR PIOE_BSR |
| #define | LCDC_PIO_PDR PIOE_PDR |
| #define FIQ_ID 0 |
Fast interrupt.
| #define SYSC_ID 1 |
System interrupt.
| #define PIOA_ID 2 |
Parallel I/O controller A.
| #define PIOB_ID 3 |
Parallel I/O controller B.
| #define PIOC_ID 4 |
Parallel I/O controller C.
| #define PIODE_ID 5 |
Parallel I/O controller C.
| #define RNG_ID 6 |
Analog to digital converter.
| #define US0_ID 7 |
USART 0.
| #define US1_ID 8 |
USART 1.
| #define US2_ID 9 |
USART 2.
| #define US3_ID 10 |
USART 3.
| #define MCI0_ID 11 |
MMC interface.
| #define TWI0_ID 12 |
Two wire interface.
| #define TWI1_ID 13 |
Two wire interface.
| #define SPI0_ID 14 |
Serial peripheral 0.
| #define SPI1_ID 15 |
Serial peripheral 1.
| #define SSC0_ID 16 |
Serial peripheral interface.
| #define SSC1_ID 17 |
Serial peripheral interface.
| #define TC0_ID 18 |
Timer/counter 0.
| #define TC1_ID 18 |
Timer/counter 1.
| #define TC2_ID 18 |
Timer/counter 2.
| #define TC3_ID 18 |
Timer/counter 3.
| #define TC4_ID 18 |
Timer/counter 4.
| #define TC5_ID 18 |
Timer/counter 5.
| #define PWMC_ID 19 |
Pulse Width Modulation Controller.
| #define TSADCC_ID 20 |
Touch Screen ADC Controller.
| #define DMA_ID 21 |
DMA Controller.
| #define UHP_ID 22 |
USB host port.
| #define LCDC_ID 23 |
LCD controller.
| #define AC97_ID 24 |
AC97 controller.
| #define EMAC_ID 25 |
Ethernet MAC.
| #define ISI_ID 26 |
Image sensor interface.
| #define UDP_ID 27 |
USB device port.
| #define MCI1_ID 29 |
MMC interface.
| #define IRQ0_ID 31 |
External interrupt 0.
| #define TWI_ID TWI0_ID |
Two wire interface.
| #define MCI_ID MCI0_ID |
MMC interface.
| #define SSC_ID SSC0_ID |
Serial peripheral interface.
| #define PB16_SCK0_B 16 |
Channel 0 serial clock pin.
| #define PB19_TXD0_A 19 |
Channel 0 transmit data pin.
| #define PB18_RXD0_A 18 |
Channel 0 receive data pin.
| #define PB15_CTS0_B 15 |
Channel 0 clear to send pin.
| #define PB17_RTS0_B 17 |
Channel 0 request to send pin.
| #define PD29_SCK1_B 29 |
Channel 1 serial clock pin.
| #define PB4_TXD1_A 4 |
Channel 1 transmit data pin.
| #define PB5_RXD1_A 5 |
Channel 1 receive data pin.
| #define PD17_CTS1_A 17 |
Channel 1 clear to send pin.
| #define PD16_RTS1_A 16 |
Channel 1 request to send pin.
| #define PD30_SCK2_B 30 |
Channel 2 serial clock pin.
| #define PB6_TXD2_A 6 |
Channel 2 transmit data pin.
| #define PB7_RXD2_A 7 |
Channel 2 receive data pin.
| #define PC11_CTS2_B 11 |
Channel 2 clear to send pin.
| #define PC9_RTS2_B 9 |
Channel 2 request to send pin.
| #define PA22_SCK3_B 22 |
Channel 3 serial clock pin.
| #define PB8_TXD3_A 8 |
Channel 3 transmit data pin.
| #define PB9_RXD3_A 9 |
Channel 3 receive data pin.
| #define PA24_CTS3_B 24 |
Channel 3 clear to send pin.
| #define PA23_RTS3_B 23 |
Channel 3 request to send pin.
| #define PB0_SPI0_MISO_A 0 |
Channel 0 master input slave output pin.
| #define PB1_SPI0_MOSI_A 1 |
Channel 0 master output slave input pin.
| #define PB2_SPI0_SPCK_A 2 |
Channel 0 serial clock pin.
| #define PB3_SPI0_NPCS0_A 3 |
Channel 0 chip select 0 pin.
| #define PB18_SPI0_NPCS1_B 18 |
Channel 0 chip select 1 pin.
| #define PD24_SPI0_NPCS1_A 24 |
Channel 0 chip select 1 pin.
| #define PB19_SPI0_NPCS2_B 19 |
Channel 0 chip select 2 pin.
| #define PD25_SPI0_NPCS2_A 25 |
Channel 0 chip select 1 pin.
| #define PD27_SPI0_NPCS3_B 27 |
Channel 0 chip select 3 pin.
| #define SPI0_PINS _BV(PB0_SPI0_MISO_A) | _BV(PB1_SPI0_MOSI_A) | _BV(PB2_SPI0_SPCK_A) |
| #define SPI0_PIO_BASE PIOA_BASE |
| #define SPI0_PSR_OFF PIO_ASR_OFF |
| #define SPI0_CS0_PIN _BV(PB3_SPI0_NPCS0_A) |
| #define SPI0_CS0_PIO_BASE PIOB_BASE |
| #define SPI0_CS0_PSR_OFF PIO_ASR_OFF |
| #define SPI0_CS1_PIN _BV(PB18_SPI0_NPCS1_B) |
| #define SPI0_CS1_PIO_BASE PIOB_BASE |
| #define SPI0_CS1_PSR_OFF PIO_BSR_OFF |
| #define PB14_SPI1_MISO_A 14 |
Channel 1 master input slave output pin.
| #define PB15_SPI1_MOSI_A 15 |
Channel 1 master output slave input pin.
| #define PB16_SPI1_SPCK_A 16 |
Channel 1 serial clock pin.
| #define PB17_SPI1_NPCS0_A 17 |
Channel 1 chip select 0 pin.
| #define PD28_SPI1_NPCS1_B 28 |
Channel 1 chip select 1 pin.
| #define PD18_SPI1_NPCS2_A 18 |
Channel 1 chip select 2 pin.
| #define PD19_SPI1_NPCS3_A 19 |
Channel 1 chip select 3 pin.
| #define SPI1_PINS _BV(PB14_SPI1_MISO_A) | _BV(PB15_SPI1_MOSI_A) | _BV(PB16_SPI1_SPCK_A) |
| #define SPI1_PIO_BASE PIOB_BASE |
| #define SPI1_PSR_OFF PIO_ASR_OFF |
| #define SPI1_CS0_PIN _BV(PB17_SPI1_NPCS0_A) |
| #define SPI1_CS0_PIO_BASE PIOB_BASE |
| #define SPI1_CS0_PSR_OFF PIO_ASR_OFF |
| #define SPI1_CS3_PIN _BV(PD19_SPI1_NPCS3_A) |
| #define SPI1_CS3_PIO_BASE PIOD_BASE |
| #define SPI1_CS3_PSR_OFF PIO_ASR_OFF |
| #define PB20_ISI_D0_A 20 |
Image sensor data bit 0 pin.
| #define PB21_ISI_D1_A 21 |
Image sensor data bit 1 pin.
| #define PB22_ISI_D2_A 22 |
Image sensor data bit 2 pin.
| #define PB23_ISI_D3_A 23 |
Image sensor data bit 3 pin.
| #define PB24_ISI_D4_A 24 |
Image sensor data bit 4 pin.
| #define PB25_ISI_D5_A 25 |
Image sensor data bit 5 pin.
| #define PB26_ISI_D6_A 26 |
Image sensor data bit 6 pin.
| #define PB27_ISI_D7_A 27 |
Image sensor data bit 7 pin.
| #define PB10_ISI_D8_B 10 |
Image sensor data bit 8 pin.
| #define PB11_ISI_D9_B 11 |
Image sensor data bit 9 pin.
| #define PB12_ISI_D10_B 12 |
Image sensor data bit 10 pin.
| #define PB13_ISI_D11_B 13 |
Image sensor data bit 11 pin.
| #define PB28_ISI_PCK_A 28 |
Image sensor data clock pin.
| #define PB29_ISI_VSYNC_A 29 |
Image sensor vertical sync pin.
| #define PB30_ISI_HSYNC_A 30 |
Image sensor horizontal sync pin.
| #define PB31_ISI_MCK_A 31 |
Image sensor reference clock pin.
| #define PA6_ETX2_B 6 |
Transmit data bit 2 pin.
| #define PA7_ETX3_B 7 |
Transmit data bit 3 pin.
| #define PA10_ETX0_A 10 |
Transmit data bit 0 pin.
| #define PA11_ETX1_A 11 |
Transmit data bit 1 pin.
| #define PA12_ERX0_A 12 |
Receive data bit 0 pin.
| #define PA13_ERX1_A 13 |
Receive data bit 1 pin.
| #define PA14_ETXEN_A 14 |
Transmit enable pin.
| #define PA15_ERXDV_A 15 |
Data valid pin.
| #define PA16_ERXER_A 16 |
Receive error pin.
| #define PA17_ETXCK_A 17 |
Transmit clock pin.
| #define PA18_EMDC_A 18 |
Management data clock pin.
| #define PA19_EMDIO_A 19 |
Management data I/O pin.
| #define PA27_ETXER_B 27 |
Transmit error pin.
| #define PA8_ERX2_B 8 |
Receive data bit 2 pin.
| #define PA9_ERX3_B 9 |
Receive data bit 3 pin.
| #define PA28_ERXCK_B 28 |
Receive clock pin.
| #define PA29_ECRS_B 29 |
Carrier sense pin.
| #define PA30_ECOL_B 30 |
Collision detect pin.
| #define PHY_MODE_RMII |
| #define EMAC_PIO_ASR PIO_ASR_OFF |
| #define PHY_MII_PINS_A |
(PA10_ETX0_A | PA11_ETX1_A | PA12_ERX0_A | PA13_ERX1_A | PA14_ETXEN_A | PA15_ERXDV_A | PA16_ERXER_A | \ PA17_ETXCK_A | PA18_EMDC_A | PA19_EMDIO_A)
| #define EMAC_PIO_BSR PIO_BSR_OFF |
| #define PHY_MII_PINS_B (PA6_ETX2_B | PA7_ETX3_B | PA27_ETXER_B | PA8_ERX2_B | PA9_ERX3_B | PA28_ERXCK_B | PA29_ECRS_B | PA30_ECOL_B) |
| #define EMAC_PIO_PDR PIOA_PDR |
| #define PD28_ADTRG_A 28 |
ADC trigger pin.
| #define PB12_DRXD_A 12 |
Debug unit receive data pin.
| #define PB13_DTXD_A 13 |
Debug unit transmit data pin.
| #define PD2_TD0_A 2 |
Transmit data pin.
| #define PD3_RD0_A 3 |
Receive data pin.
| #define PD0_TK0_A 0 |
Transmit clock pin.
| #define PD4_RK0_A 4 |
Receive clock pin.
| #define PD1_TF0_A 1 |
Transmit frame sync. pin.
| #define PD5_RF0_A 5 |
Receive frame sync. pin.
| #define PA20_TWD0_A 20 |
Two wire serial data pin.
| #define PA21_TWCK0_A 21 |
Two wire serial clock pin.
| #define PB10_TWD1_A 10 |
Two wire serial data pin.
| #define PB11_TWCK1_A 11 |
Two wire serial clock pin.
| #define PD23_TCLK0_A 23 |
Timer/counter 0 external clock input.
| #define PD20_TIOA0_A 20 |
Timer/counter 0 I/O line A.
| #define PD30_TIOB0_A 30 |
Timer/counter 0 I/O line B.
| #define PD29_TCLK1_A 29 |
Timer/counter 1 external clock input.
| #define PD21_TIOA1_A 21 |
Timer/counter 1 I/O line A.
| #define PD31_TIOB1_A 31 |
Timer/counter 1 I/O line B.
| #define PC10_TCLK2_B 10 |
Timer/counter 2 external clock input.
| #define PD22_TIOA2_A 22 |
Timer/counter 2 I/O line A.
| #define PA26_TIOB2_B 26 |
Timer/counter 2 I/O line B.
| #define PA0_TCLK3_B 0 |
Timer/counter 3 external clock input.
| #define PA1_TIOA3_B 1 |
Timer/counter 3 I/O line A.
| #define PA2_TIOB3_B 2 |
Timer/counter 3 I/O line B.
| #define PA3_TCLK4_B 3 |
Timer/counter 4 external clock input.
| #define PA4_TIOA4_B 4 |
Timer/counter 4 I/O line A.
| #define PA5_TIOB4_B 5 |
Timer/counter 4 I/O line B.
| #define PD9_TCLK5_B 9 |
Timer/counter 5 external clock input.
| #define PD7_TIOA5_B 7 |
Timer/counter 5 I/O line A.
| #define PD8_TIOB5_B 8 |
Timer/counter 5 I/O line B.
| #define PD26_PCK0_A 26 |
Programmable clock 0 output pin.
| #define PE0_PCK0_B 0 |
Programmable clock 0 output pin.
| #define PD27_PCK1_A 27 |
Programmable clock 1 output pin.
| #define PE31_PCK1_B 31 |
Programmable clock 1 output pin.
| #define PC12_A25_CFRNW_A 12 |
Read not write pin.
| #define PC10_NCS4_CFCS0_A 10 |
Chip select line 0 pin.
| #define PC11_NCS5_CFCS1_A 11 |
Chip select line 1 pin.
| #define PC8_CFCE1_A 8 |
Chip enable line 1 pin.
| #define PC9_CFCE2_A 9 |
Chip enable line 2 pin.
| #define PC16_D16_A 16 |
Data bus bit 16 pin.
| #define PC17_D17_A 17 |
Data bus bit 17 pin.
| #define PC18_D18_A 18 |
Data bus bit 18 pin.
| #define PC19_D19_A 19 |
Data bus bit 19 pin.
| #define PC20_D20_A 20 |
Data bus bit 20 pin.
| #define PC21_D21_A 21 |
Data bus bit 21 pin.
| #define PC22_D22_A 22 |
Data bus bit 22 pin.
| #define PC23_D23_A 23 |
Data bus bit 23 pin.
| #define PC24_D24_A 24 |
Data bus bit 24 pin.
| #define PC25_D25_A 25 |
Data bus bit 25 pin.
| #define PC26_D26_A 26 |
Data bus bit 26 pin.
| #define PC27_D27_A 27 |
Data bus bit 27 pin.
| #define PC28_D28_A 28 |
Data bus bit 28 pin.
| #define PC29_D29_A 29 |
Data bus bit 29 pin.
| #define PC30_D30_A 30 |
Data bus bit 30 pin.
| #define PC31_D31_A 31 |
Data bus bit 31 pin.
| #define PC6_A23_A 6 |
Address bus bit 23 pin.
| #define PC7_A24_A 7 |
Address bus bit 24 pin.
| #define PC13_NCS2_A 13 |
Negated chip select 2 pin.
| #define PC14_NCS3_NANDCS_A 14 |
Negated chip select 3 pin.
| #define PC15_NWAIT_A 15 |
External wait signal pin.
| #define PD19_FIQ_B 19 |
Fast interrupt input pin.
| #define PC18_IRQ_B 18 |
External interrupt input pin.
| #define LCDC_PIO_BASE PIOE_BASE |
| #define LCDC_PINS_A 0x6FEFFFDE |
| #define LCDC_PINS_B 0x10100000 |
| #define LCDC_PINS (LCDC_PINS_A | LCDC_PINS_B) |
| #define LCDC_PIO_ASR PIOE_ASR |
| #define LCDC_PIO_BSR PIOE_BSR |
| #define LCDC_PIO_PDR PIOE_PDR |