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Nut/OS
5.0.5
API Reference
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Nut/OS
5.0.5
API Reference
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Universal serial bus device registers. More...
USB Device Port Frame Number Register | |
| #define | UDP_NUM_OFF 0x00000000 |
| Frame number register (offset). | |
| #define | UDP_NUM (UDP_BASE + UDP_NUM_OFF) |
| Frame number register (address). | |
| #define | UDP_FRM_NUM 0x000007FF |
| Current frame number (mask). | |
| #define | UDP_FRM_NUM_LSB 0 |
| Current frame number (LSB). | |
| #define | UDP_FRM_ERR _BV(16) |
| Frame error. | |
| #define | UDP_FRM_OK _BV(17) |
| Frame OK. | |
USB Device Port Global State Register | |
| #define | UDP_GLB_STAT_OFF 0x00000004 |
| Global state register (offset). | |
| #define | UDP_GLB_STAT (UDP_BASE + UDP_GLB_STAT_OFF) |
| Global state register (address). | |
| #define | UDP_FADDEN _BV(0) |
| Device is in address state. | |
| #define | UDP_CONFG _BV(1) |
| Device is in configured state. | |
| #define | UDP_ESR _BV(2) |
| Enable send resume. | |
| #define | UDP_RSMINPR _BV(3) |
| A resume has been sent to the host. | |
| #define | UDP_RMWUPE _BV(4) |
| Remote wake up enable. | |
USB Device Port Function Address Register | |
| #define | UDP_FADDR_OFF 0x00000008 |
| Function address register (offset). | |
| #define | UDP_FADDR (UDP_BASE + UDP_FADDR_OFF) |
| Function address register (address). | |
| #define | UDP_FADD 0x0000007F |
| Function address value (mask). | |
| #define | UDP_FADD_LSB 0 |
| Function address value (LSB). | |
| #define | UDP_FEN _BV(8) |
| Function endpoint enabled. | |
USB Device Port Interrupt Registers | |
| #define | UDP_IER_OFF 0x00000010 |
| Interrupt enable register (offset). | |
| #define | UDP_IER (UDP_BASE + UDP_IER_OFF) |
| Interrupt enable register (address). | |
| #define | UDP_IDR_OFF 0x00000014 |
| Interrupt disable register (offset). | |
| #define | UDP_IDR (UDP_BASE + UDP_IDR_OFF) |
| Interrupt disable register (address). | |
| #define | UDP_IMR_OFF 0x00000018 |
| Interrupt mask register (offset). | |
| #define | UDP_IMR (UDP_BASE + UDP_IMR_OFF) |
| Interrupt mask register (address). | |
| #define | UDP_ISR_OFF 0x0000001C |
| Interrupt status register (offset). | |
| #define | UDP_ISR (UDP_BASE + UDP_ISR_OFF) |
| Interrupt status register (address). | |
| #define | UDP_ICR_OFF 0x00000020 |
| Interrupt clear register (offset). | |
| #define | UDP_ICR (UDP_BASE + UDP_ICR_OFF) |
| Interrupt clear register (address). | |
| #define | UDP_EPINT(n) _BV(n) |
| Endpoint interrupt 0-7. | |
| #define | UDP_RXSUSP _BV(8) |
| USB suspend interrupt. | |
| #define | UDP_RXRSM _BV(9) |
| USB resume interrupt. | |
| #define | UDP_EXTRSM _BV(10) |
| USB external resume interrupt. | |
| #define | UDP_SOFINT _BV(11) |
| USB start of frame interrupt. | |
| #define | UDP_ENDBUSRES _BV(12) |
| USB end of bus reset interrupt. | |
| #define | UDP_WAKEUP _BV(13) |
| USB resume interrupt. | |
USB Device Port Reset Endpoint Register | |
| #define | UDP_RST_EP_OFF 0x00000028 |
| Reset endpoint register (offset). | |
| #define | UDP_RST_EP (UDP_BASE + UDP_RST_EP_OFF) |
| Reset endpoint register (address). | |
| #define | UDP_EP(n) _BV(n) |
| Reset endpoint 0-7. | |
USB Device Port Endpoint Control and Status Registers | |
| #define | UDP_CSR_OFF 0x00000030 |
| Endpoint control and status register (offset). | |
| #define | UDP_CSR(n) (UDP_BASE + UDP_CSR_OFF + (n) * 4) |
| Endpoint control and status registers 0-7 (address). | |
| #define | UDP_TXCOMP _BV(0) |
| Generates an IN packet with data previously written in the DPR. | |
| #define | UDP_RX_DATA_BK0 _BV(1) |
| Receive data bank 0. | |
| #define | UDP_RXSETUP _BV(2) |
| Sends Stall to the host (control endpoints). | |
| #define | UDP_STALLSEND_ISOERROR _BV(3) |
| Stall send / isochronous error (isochronous endpoints). | |
| #define | UDP_TXPKTRDY _BV(4) |
| Transmit packet ready. | |
| #define | UDP_FORCESTALL _BV(5) |
| Force Stall (used by control, bulk and isochronous endpoints). | |
| #define | UDP_RX_DATA_BK1 _BV(6) |
| Receive data bank 1 (only used by endpoints with ping-pong attributes). | |
| #define | UDP_DIR _BV(7) |
| Transfer direction. | |
| #define | UDP_EPTYPE (0x7 << 8) |
| Endpoint type mask. | |
| #define | UDP_EPTYPE_CTRL (0x0 << 8) |
| Endpoint type is control. | |
| #define | UDP_EPTYPE_ISO_OUT (0x1 << 8) |
| Endpoint type is isochronous output. | |
| #define | UDP_EPTYPE_BULK_OUT (0x2 << 8) |
| Endpoint type is bulk output. | |
| #define | UDP_EPTYPE_INT_OUT (0x3 << 8) |
| Endpoint type is interrupt output. | |
| #define | UDP_EPTYPE_ISO_IN (0x5 << 8) |
| Endpoint type is isochronous input. | |
| #define | UDP_EPTYPE_BULK_IN (0x6 << 8) |
| Endpoint type is bulk input. | |
| #define | UDP_EPTYPE_INT_IN (0x7 << 8) |
| Endpoint type is interrupt input. | |
| #define | UDP_DTGLE _BV(11) |
| Data toggle. | |
| #define | UDP_EPEDS _BV(15) |
| Endpoint enable disable. | |
| #define | UDP_RXBYTECNT (0x7FF << 16) |
| Number of bytes available in the FIFO (mask). | |
| #define | UDP_RXBYTECNT_LSB 16 |
| Number of bytes available in the FIFO (LSB). | |
USB Device Port Endpoint FIFO Data Registers | |
| #define | UDP_FDR_OFF 0x00000050 |
| Endpoint FIFO data register (offset). | |
| #define | UDP_FDR(n) (UDP_BASE + UDP_FDR_OFF + (n) * 4) |
| Endpoint FIFO data register (address). | |
| #define | UDP_FIFO_DATA 0x000000FF |
| FIFO data value (mask). | |
| #define | UDP_FIFO_DATA_LSB 0 |
| FIFO data value (LSB). | |
USB Device Port Tranceiver Control Register | |
| #define | UDP_TXVC_OFF 0x00000074 |
| Transceiver control register (offset). | |
| #define | UDP_TXVC (UDP_BASE + UDP_TXVC_OFF) |
| Transceiver control register (address). | |
| #define | UDP_TXVDIS _BV(8) |
| Tranceiver disable. | |
| #define | UDP_PUON _BV(9) |
| Pull-up enable. | |
Universal serial bus device registers.
| #define UDP_NUM_OFF 0x00000000 |
Frame number register (offset).
| #define UDP_NUM (UDP_BASE + UDP_NUM_OFF) |
Frame number register (address).
| #define UDP_FRM_NUM 0x000007FF |
Current frame number (mask).
| #define UDP_FRM_NUM_LSB 0 |
Current frame number (LSB).
| #define UDP_FRM_ERR _BV(16) |
Frame error.
| #define UDP_FRM_OK _BV(17) |
Frame OK.
| #define UDP_GLB_STAT_OFF 0x00000004 |
Global state register (offset).
| #define UDP_GLB_STAT (UDP_BASE + UDP_GLB_STAT_OFF) |
Global state register (address).
| #define UDP_FADDEN _BV(0) |
Device is in address state.
| #define UDP_CONFG _BV(1) |
Device is in configured state.
| #define UDP_ESR _BV(2) |
Enable send resume.
| #define UDP_RSMINPR _BV(3) |
A resume has been sent to the host.
| #define UDP_RMWUPE _BV(4) |
Remote wake up enable.
| #define UDP_FADDR_OFF 0x00000008 |
Function address register (offset).
| #define UDP_FADDR (UDP_BASE + UDP_FADDR_OFF) |
Function address register (address).
| #define UDP_FADD 0x0000007F |
Function address value (mask).
| #define UDP_FADD_LSB 0 |
Function address value (LSB).
| #define UDP_FEN _BV(8) |
Function endpoint enabled.
| #define UDP_IER_OFF 0x00000010 |
Interrupt enable register (offset).
| #define UDP_IER (UDP_BASE + UDP_IER_OFF) |
Interrupt enable register (address).
| #define UDP_IDR_OFF 0x00000014 |
Interrupt disable register (offset).
| #define UDP_IDR (UDP_BASE + UDP_IDR_OFF) |
Interrupt disable register (address).
| #define UDP_IMR_OFF 0x00000018 |
Interrupt mask register (offset).
| #define UDP_IMR (UDP_BASE + UDP_IMR_OFF) |
Interrupt mask register (address).
| #define UDP_ISR_OFF 0x0000001C |
Interrupt status register (offset).
| #define UDP_ISR (UDP_BASE + UDP_ISR_OFF) |
Interrupt status register (address).
| #define UDP_ICR_OFF 0x00000020 |
Interrupt clear register (offset).
| #define UDP_ICR (UDP_BASE + UDP_ICR_OFF) |
Interrupt clear register (address).
| #define UDP_EPINT | ( | n | ) | _BV(n) |
Endpoint interrupt 0-7.
| #define UDP_RXSUSP _BV(8) |
USB suspend interrupt.
| #define UDP_RXRSM _BV(9) |
USB resume interrupt.
| #define UDP_EXTRSM _BV(10) |
USB external resume interrupt.
| #define UDP_SOFINT _BV(11) |
USB start of frame interrupt.
| #define UDP_ENDBUSRES _BV(12) |
USB end of bus reset interrupt.
| #define UDP_WAKEUP _BV(13) |
USB resume interrupt.
| #define UDP_RST_EP_OFF 0x00000028 |
Reset endpoint register (offset).
| #define UDP_RST_EP (UDP_BASE + UDP_RST_EP_OFF) |
Reset endpoint register (address).
| #define UDP_EP | ( | n | ) | _BV(n) |
Reset endpoint 0-7.
| #define UDP_CSR_OFF 0x00000030 |
Endpoint control and status register (offset).
| #define UDP_CSR | ( | n | ) | (UDP_BASE + UDP_CSR_OFF + (n) * 4) |
Endpoint control and status registers 0-7 (address).
| #define UDP_TXCOMP _BV(0) |
Generates an IN packet with data previously written in the DPR.
| #define UDP_RX_DATA_BK0 _BV(1) |
Receive data bank 0.
| #define UDP_RXSETUP _BV(2) |
Sends Stall to the host (control endpoints).
| #define UDP_STALLSEND_ISOERROR _BV(3) |
Stall send / isochronous error (isochronous endpoints).
| #define UDP_TXPKTRDY _BV(4) |
Transmit packet ready.
| #define UDP_FORCESTALL _BV(5) |
Force Stall (used by control, bulk and isochronous endpoints).
| #define UDP_RX_DATA_BK1 _BV(6) |
Receive data bank 1 (only used by endpoints with ping-pong attributes).
| #define UDP_DIR _BV(7) |
Transfer direction.
| #define UDP_EPTYPE (0x7 << 8) |
Endpoint type mask.
| #define UDP_EPTYPE_CTRL (0x0 << 8) |
Endpoint type is control.
| #define UDP_EPTYPE_ISO_OUT (0x1 << 8) |
Endpoint type is isochronous output.
| #define UDP_EPTYPE_BULK_OUT (0x2 << 8) |
Endpoint type is bulk output.
| #define UDP_EPTYPE_INT_OUT (0x3 << 8) |
Endpoint type is interrupt output.
| #define UDP_EPTYPE_ISO_IN (0x5 << 8) |
Endpoint type is isochronous input.
| #define UDP_EPTYPE_BULK_IN (0x6 << 8) |
Endpoint type is bulk input.
| #define UDP_EPTYPE_INT_IN (0x7 << 8) |
Endpoint type is interrupt input.
| #define UDP_DTGLE _BV(11) |
Data toggle.
| #define UDP_EPEDS _BV(15) |
Endpoint enable disable.
| #define UDP_RXBYTECNT (0x7FF << 16) |
Number of bytes available in the FIFO (mask).
| #define UDP_RXBYTECNT_LSB 16 |
Number of bytes available in the FIFO (LSB).
| #define UDP_FDR_OFF 0x00000050 |
Endpoint FIFO data register (offset).
| #define UDP_FDR | ( | n | ) | (UDP_BASE + UDP_FDR_OFF + (n) * 4) |
Endpoint FIFO data register (address).
| #define UDP_FIFO_DATA 0x000000FF |
FIFO data value (mask).
| #define UDP_FIFO_DATA_LSB 0 |
FIFO data value (LSB).
| #define UDP_TXVC_OFF 0x00000074 |
Transceiver control register (offset).
| #define UDP_TXVC (UDP_BASE + UDP_TXVC_OFF) |
Transceiver control register (address).
| #define UDP_TXVDIS _BV(8) |
Tranceiver disable.
| #define UDP_PUON _BV(9) |
Pull-up enable.