RPort hardware specification. More...
Defines | |
| #define | NutInitSysIrq() |
| #define | NIC_IO_BASE (0x800000UL + 0x300UL) |
| #define | NicIntIsEnabled() (INTC.IER.BIT.IRQ0E == 1) |
| #define | NicDisableInt() INTC.IER.BIT.IRQ0E = 0 |
| #define | NicEnableInt() INTC.IER.BIT.IRQ0E = 1 |
| #define | NicMcu16bitBus() BSC.ABWCR.BIT.ABW4 = 0 |
| #define | NicMcu8bitBus() BSC.ABWCR.BIT.ABW4 = 1 |
| #define | RTL_SIGNAL sig_INT0 |
RPort hardware specification.
| #define NutInitSysIrq | ( | ) |
INTC.ISCR.BIT.IRQ0SC = 0; \
INTC.IPRA.BIT._IRQ0 = 0;
Low level sensing interrupt; Very important! High poriority; CKE1-0 in SCR, default setting; C/A# in SMR, default setting; P95DDR, default setting: P9DDR = B_1100_0000; SCI1.SMR.BIT.CA = 0;
| #define NIC_IO_BASE (0x800000UL + 0x300UL) |
IO base address of RTL chip.
| #define NicIntIsEnabled | ( | ) | (INTC.IER.BIT.IRQ0E == 1) |
Check Nic Int is set or not
| #define NicDisableInt | ( | ) | INTC.IER.BIT.IRQ0E = 0 |
Disable Nic Interruption
| #define NicEnableInt | ( | ) | INTC.IER.BIT.IRQ0E = 1 |
Enable Nic Interruption
| #define NicMcu16bitBus | ( | ) | BSC.ABWCR.BIT.ABW4 = 0 |
Switch MCU data bus (area 4) into 16 bit mode
| #define NicMcu8bitBus | ( | ) | BSC.ABWCR.BIT.ABW4 = 1 |
Switch MCU data bus (area 4) into 8 bit mode
| #define RTL_SIGNAL sig_INT0 |
interruption signal handler of RTL_SIGNAL_BIT.