ih_stm32_dma1.c File Reference

#include <cfg/arch.h>
#include <arch/cm3.h>
#include <dev/irqreg.h>
#include <arch/cm3/cortex_interrupt.h>
#include <arch/cm3/stm/stm32xxxx.h>
#include <arch/cm3/stm/stm32_dma.h>

Include dependency graph for ih_stm32_dma1.c:

Defines
#define	NUT_IRQPRI_DMA1   4
Functions
void	Dma1IrqEntry_Ch1 (void *arg)
	DMA 1 Channel interrupt entries.
void	Dma1IrqEntry_Ch2 (void *arg)
void	Dma1IrqEntry_Ch3 (void *arg)
void	Dma1IrqEntry_Ch4 (void *arg)
void	Dma1IrqEntry_Ch5 (void *arg)
void	Dma1IrqEntry_Ch6 (void *arg)
void	Dma1IrqEntry_Ch7 (void *arg)
Variables
IRQ_HANDLER	sig_DMA1_CH1
	DMA1 Channel Interrupt Signals.
IRQ_HANDLER	sig_DMA1_CH2
IRQ_HANDLER	sig_DMA1_CH3
IRQ_HANDLER	sig_DMA1_CH4
IRQ_HANDLER	sig_DMA1_CH5
IRQ_HANDLER	sig_DMA1_CH6
IRQ_HANDLER	sig_DMA1_CH7

---

Define Documentation

#define NUT_IRQPRI_DMA1   4

 * $Id$
 * 

---

Function Documentation

void Dma1IrqEntry_Ch1

(

void *

arg

)

DMA 1 Channel interrupt entries.

References IRQ_HANDLER::ir_arg, and IRQ_HANDLER::ir_handler.

void Dma1IrqEntry_Ch2

(

void *

arg

)

References IRQ_HANDLER::ir_arg, and IRQ_HANDLER::ir_handler.

void Dma1IrqEntry_Ch3

(

void *

arg

)

References IRQ_HANDLER::ir_arg, and IRQ_HANDLER::ir_handler.

void Dma1IrqEntry_Ch4

(

void *

arg

)

References IRQ_HANDLER::ir_arg, and IRQ_HANDLER::ir_handler.

void Dma1IrqEntry_Ch5

(

void *

arg

)

References IRQ_HANDLER::ir_arg, and IRQ_HANDLER::ir_handler.

void Dma1IrqEntry_Ch6

(

void *

arg

)

References IRQ_HANDLER::ir_arg, and IRQ_HANDLER::ir_handler.

void Dma1IrqEntry_Ch7

(

void *

arg

)

References IRQ_HANDLER::ir_arg, and IRQ_HANDLER::ir_handler.

---

Variable Documentation

IRQ_HANDLER sig_DMA1_CH1

Initial value:

 {



    NULL,           
    NULL,           
    Dma1c1IrqCtl    
}

DMA1 Channel Interrupt Signals.

IRQ_HANDLER sig_DMA1_CH2

Initial value:

 {



    NULL,           
    NULL,           
    Dma1c2IrqCtl    
}

IRQ_HANDLER sig_DMA1_CH3

Initial value:

 {



    NULL,           
    NULL,           
    Dma1c3IrqCtl    
}

IRQ_HANDLER sig_DMA1_CH4

Initial value:

 {



    NULL,           
    NULL,           
    Dma1c4IrqCtl    
}

IRQ_HANDLER sig_DMA1_CH5

Initial value:

 {



    NULL,           
    NULL,           
    Dma1c5IrqCtl    
}

IRQ_HANDLER sig_DMA1_CH6

Initial value:

 {



    NULL,           
    NULL,           
    Dma1c6IrqCtl    
}

IRQ_HANDLER sig_DMA1_CH7

Initial value:

 {



    NULL,           
    NULL,           
    Dma1c7IrqCtl    
}