#include <avr32/io.h>#include <arch/avr32.h>#include <arch/avr32/pm.h>#include <cfg/os.h>#include <cfg/clock.h>#include <dev/irqreg.h>#include <sys/timer.h>#include <arch/avr32/ihndlr.h>#include "compiler.h"Data Structures | |
| union | u_avr32_pm_mcctrl_t |
| union | u_avr32_pm_cksel_t |
| union | u_avr32_pm_pll_t |
| union | u_avr32_pm_oscctrl0_t |
| union | u_avr32_pm_oscctrl1_t |
| union | u_avr32_pm_oscctrl32_t |
| union | u_avr32_pm_ier_t |
| union | u_avr32_pm_idr_t |
| union | u_avr32_pm_icr_t |
| union | u_avr32_pm_gcctrl_t |
| union | u_avr32_pm_rccr_t |
| union | u_avr32_pm_bgcr_t |
| union | u_avr32_pm_vregcr_t |
| union | u_avr32_pm_bod_t |
| union | u_avr32_flashc_fcr_t |
PM Writable Bit-Field Registers | |
Copyright (C) 2001-2010 by egnite Software GmbH All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. Neither the name of the copyright holders nor the names of contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. For additional information see http://www.ethernut.de/ Portions Copyright Atmel Corporation, see the following note. | |
| void | pm_enable_osc0_crystal (unsigned int fosc0) |
| This function will enable the crystal mode of the oscillator 0. | |
| void | pm_switch_to_osc0 (unsigned int fosc0, unsigned int startup) |
| Switch main clock to clock Osc0 (crystal mode) | |
| void | pm_enable_clk0 (unsigned int startup) |
| This function will enable the oscillator 0 to be used with a startup time. | |
| void | pm_switch_to_clock (unsigned long clock) |
| This function will switch the power manager main clock. | |
| void | pm_pll_setup (volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount) |
| This function will setup a PLL. | |
| void | pm_pll_set_option (volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable) |
| This function will set a PLL option. | |
| void | pm_pll_enable (volatile avr32_pm_t *pm, unsigned int pll) |
| This function will enable a PLL. | |
| void | Avr32InitClockTree (void) |
| void pm_enable_osc0_crystal | ( | unsigned int | fosc0 | ) |
This function will enable the crystal mode of the oscillator 0.
| pm | Base address of the Power Manager (i.e. &AVR32_PM) |
| fosc0 | Oscillator 0 crystal frequency (Hz) |
| void pm_switch_to_osc0 | ( | unsigned int | fosc0, |
| unsigned int | startup | ||
| ) |
Switch main clock to clock Osc0 (crystal mode)
| pm | Base address of the Power Manager (i.e. &AVR32_PM) |
| fosc0 | Oscillator 0 crystal frequency (Hz) |
| startup | Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. |
References pm_enable_clk0(), pm_enable_osc0_crystal(), and pm_switch_to_clock().
| void pm_enable_clk0 | ( | unsigned int | startup | ) |
This function will enable the oscillator 0 to be used with a startup time.
| pm | Base address of the Power Manager (i.e. &AVR32_PM) |
| startup | Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. |
References u_avr32_pm_oscctrl0_t::oscctrl0, and u_avr32_pm_oscctrl0_t::OSCCTRL0.
Referenced by pm_switch_to_osc0().
| void pm_switch_to_clock | ( | unsigned long | clock | ) |
This function will switch the power manager main clock.
| pm | Base address of the Power Manager (i.e. &AVR32_PM) |
| clock | Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0. |
References u_avr32_pm_mcctrl_t::mcctrl, and u_avr32_pm_mcctrl_t::MCCTRL.
Referenced by Avr32InitClockTree(), and pm_switch_to_osc0().
| void pm_pll_setup | ( | volatile avr32_pm_t * | pm, |
| unsigned int | pll, | ||
| unsigned int | mul, | ||
| unsigned int | div, | ||
| unsigned int | osc, | ||
| unsigned int | lockcount | ||
| ) |
This function will setup a PLL.
| pm | Base address of the Power Manager (i.e. &AVR32_PM) |
| pll | PLL number(0 for PLL0, 1 for PLL1) |
| mul | PLL MUL in the PLL formula |
| div | PLL DIV in the PLL formula |
| osc | OSC number (0 for osc0, 1 for osc1) |
| lockcount | PLL lockount |
References u_avr32_pm_pll_t::pll, and u_avr32_pm_pll_t::PLL.
Referenced by Avr32InitClockTree().
| void pm_pll_set_option | ( | volatile avr32_pm_t * | pm, |
| unsigned int | pll, | ||
| unsigned int | pll_freq, | ||
| unsigned int | pll_div2, | ||
| unsigned int | pll_wbwdisable | ||
| ) |
This function will set a PLL option.
| pm | Base address of the Power Manager (i.e. &AVR32_PM) |
| pll | PLL number(0 for PLL0, 1 for PLL1) |
| pll_freq | Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. |
| pll_div2 | Divide the PLL output frequency by 2 (this settings does not change the FVCO value) |
| pll_wbwdisable | 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. |
References u_avr32_pm_pll_t::pll, and u_avr32_pm_pll_t::PLL.
Referenced by Avr32InitClockTree().
| void pm_pll_enable | ( | volatile avr32_pm_t * | pm, |
| unsigned int | pll | ||
| ) |
This function will enable a PLL.
| pm | Base address of the Power Manager (i.e. &AVR32_PM) |
| pll | PLL number(0 for PLL0, 1 for PLL1) |
Referenced by Avr32InitClockTree().
| void Avr32InitClockTree | ( | void | ) |
References pm_cksel(), pm_pll_enable(), pm_pll_set_option(), pm_pll_setup(), pm_switch_to_clock(), pm_switch_to_osc0(), and pm_wait_for_pll0_locked().