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Functions | |
| int | X12Init (NUTRTC *rtc) NUT_DEPRECATED |
| Initialize the interface to an Intersil X12xx hardware clock. | |
| int | X12RtcGetClock (NUTRTC *rtc, struct _tm *tm) NUT_DEPRECATED |
| Get date and time from an X12xx hardware clock. | |
| int | X12RtcSetClock (NUTRTC *rtc, const struct _tm *tm) NUT_DEPRECATED |
| Set an X12xx hardware clock. | |
| int | X12RtcGetAlarm (NUTRTC *rtc, int idx, struct _tm *tm, int *aflgs) NUT_DEPRECATED |
| Get alarm date and time of an X12xx hardware clock. | |
| int | X12RtcSetAlarm (NUTRTC *rtc, int idx, const struct _tm *tm, int aflgs) NUT_DEPRECATED |
| Set alarm of an X12xx hardware clock. | |
| int | X12RtcGetStatus (NUTRTC *rtc, uint32_t *sflgs) NUT_DEPRECATED |
| Query RTC status flags. | |
| int | X12RtcClearStatus (NUTRTC *rtc, uint32_t sflgs) NUT_DEPRECATED |
| Clear RTC status flags. | |
| int | X12RtcReadRegs (uint8_t addr, uint8_t *buff, size_t len) |
| Read RTC registers. | |
| int | X12RtcWrite (int nv, const uint8_t *buff, size_t len) |
| Write to RTC registers. | |
| int | X12EepromRead (unsigned int addr, void *buff, size_t len) |
| Read contents from non-volatile EEPROM. | |
| int | X12EepromWrite (unsigned int addr, const void *buff, size_t len) |
| Store buffer contents in non-volatile EEPROM. | |
Variables | |
| NUTRTC | rtcX12x6 |
Non-Volatile Alarm Registers | |
| #define | X12RTC_SCA0 0x00 |
| Alarm 0 second. | |
| #define | X12RTC_SCA1 0x08 |
| Alarm 1 second. | |
| #define | X12RTC_SCA_ESC 0x80 |
| Second alarm enabled. | |
| #define | X12RTC_MNA0 0x01 |
| Alarm 0 minute. | |
| #define | X12RTC_MNA1 0x09 |
| Alarm 1 minute. | |
| #define | X12RTC_MNA_EMN 0x80 |
| Minute alarm enabled. | |
| #define | X12RTC_HRA0 0x02 |
| Alarm 0 hour. | |
| #define | X12RTC_HRA1 0x0A |
| Alarm 1 hour. | |
| #define | X12RTC_HRA_EHR 0x80 |
| Hour alarm enabled. | |
| #define | X12RTC_DTA0 0x03 |
| Alarm 0 day of month. | |
| #define | X12RTC_DTA1 0x0B |
| Alarm 1 day of month. | |
| #define | X12RTC_DTA_EDT 0x80 |
| Day of month alarm enabled. | |
| #define | X12RTC_MOA0 0x04 |
| Alarm 0 month. | |
| #define | X12RTC_MOA1 0x0C |
| Alarm 1 month. | |
| #define | X12RTC_MOA_EMO 0x80 |
| Month alarm enabled. | |
| #define | X12RTC_YRA0 0x05 |
| Currently unused alarm 0 register. | |
| #define | X12RTC_YRA1 0x0D |
| Currently unused alarm 1 register. | |
| #define | X12RTC_DWA0 0x06 |
| Alarm 0 weekday. | |
| #define | X12RTC_DWA1 0x0E |
| Alarm 1 weekday. | |
| #define | X12RTC_DWA_EDW 0x80 |
| Weekday alarm enabled. | |
| #define | X12RTC_Y2K0 0x07 |
| Alarm 0 . | |
| #define | X12RTC_Y2K1 0x0F |
| Alarm 1 . | |
Non-Volatile Control Registers | |
| #define | X12RTC_BL 0x10 |
| Block protection and watchdog register. | |
| #define | X12RTC_BL_WD 0x18 |
| Watchdog configuration. | |
| #define | X12RTC_BL_WD_1750 0x00 |
| Timeout after 1.75 seconds. | |
| #define | X12RTC_BL_WD_750 0x08 |
| Timeout after 750 milliseconds. | |
| #define | X12RTC_BL_WD_250 0x10 |
| Timeout after 250 milliseconds. | |
| #define | X12RTC_BL_WD_OFF 0x18 |
| Disabled. | |
| #define | X12RTC_BL_BP 0xE0 |
| Block protection. | |
| #define | X12RTC_BL_BP_NONE 0x00 |
| No protection. | |
| #define | X12RTC_BL_BP_UQUAD 0x20 |
| Upper quarter protected. | |
| #define | X12RTC_BL_BP_UHALF 0x40 |
| Upper half protected. | |
| #define | X12RTC_BL_BP_FULL 0x60 |
| Full array protected. | |
| #define | X12RTC_BL_BP_FIRST1 0x80 |
| First page protected. | |
| #define | X12RTC_BL_BP_FIRST2 0xA0 |
| First 2 pages protected. | |
| #define | X12RTC_BL_BP_FIRST3 0xC0 |
| First 4 pages protected. | |
| #define | X12RTC_BL_BP_FIRST8 0xE0 |
| First 8 pages protected. | |
| #define | X12RTC_INT 0x11 |
| Interrupt control and freq. output register. | |
| #define | X12RTC_INT_FO 0x14 |
| Programmable frequency output bits. | |
| #define | X12RTC_INT_FO_IRQ 0x00 |
| Alarm interrupt. | |
| #define | X12RTC_INT_FO_32KHZ 0x04 |
| 32.768kHz. | |
| #define | X12RTC_INT_FO_100HZ 0x10 |
| 100Hz. | |
| #define | X12RTC_INT_FO_1HZ 0x14 |
| 1Hz. | |
| #define | X12RTC_INT_AL0E 0x20 |
| Alarm 0 interrupt enable. | |
| #define | X12RTC_INT_AL1E 0x40 |
| Alarm 1 interrupt enable. | |
| #define | X12RTC_INT_IM 0x80 |
| Repetitive alarm. | |
| #define | X12RTC_ATR 0x12 |
| Analog trimming register. | |
| #define | X12RTC_DTR 0x13 |
| Digital trimming register. | |
| #define | X12RTC_DTR_NONE 0x00 |
| 0 PPM. | |
| #define | X12RTC_DTR_PLUS10 0x02 |
| +10 PPM. | |
| #define | X12RTC_DTR_PLUS20 0x01 |
| +20 PPM. | |
| #define | X12RTC_DTR_PLUS30 0x03 |
| +30 PPM. | |
| #define | X12RTC_DTR_MINUS10 0x06 |
| -10 PPM. | |
| #define | X12RTC_DTR_MINUS20 0x05 |
| -20 PPM. | |
| #define | X12RTC_DTR_MINUS30 0x07 |
| -30 PPM. | |
Volatile Date and Time Registers | |
| #define | X12RTC_SC 0x30 |
| #define | X12RTC_MN 0x31 |
| #define | X12RTC_HR 0x32 |
| #define | X12RTC_HR_MIL 0x80 |
| #define | X12RTC_DT 0x33 |
| #define | X12RTC_MO 0x34 |
| #define | X12RTC_YR 0x35 |
| #define | X12RTC_DW 0x36 |
| #define | X128xRTC_SSEC 0x37 |
| #define | X122xRTC_Y2K 0x37 |
Volatile Status Register | |
| #define | X12RTC_SR 0x3F |
| #define | X12RTC_SR_RTCF 0x01 |
| #define | X12RTC_SR_WEL 0x02 |
| #define | X12RTC_SR_RWEL 0x04 |
| #define | X12RTC_SR_AL0 0x20 |
| #define | X12RTC_SR_AL1 0x40 |
| #define | X12RTC_SR_BAT 0x80 |
| #define X12RTC_SCA0 0x00 |
Alarm 0 second.
| #define X12RTC_SCA1 0x08 |
Alarm 1 second.
| #define X12RTC_SCA_ESC 0x80 |
Second alarm enabled.
Referenced by X12RtcGetAlarm(), and X12RtcSetAlarm().
| #define X12RTC_MNA0 0x01 |
Alarm 0 minute.
| #define X12RTC_MNA1 0x09 |
Alarm 1 minute.
| #define X12RTC_MNA_EMN 0x80 |
Minute alarm enabled.
Referenced by X12RtcGetAlarm(), and X12RtcSetAlarm().
| #define X12RTC_HRA0 0x02 |
Alarm 0 hour.
| #define X12RTC_HRA1 0x0A |
Alarm 1 hour.
| #define X12RTC_HRA_EHR 0x80 |
Hour alarm enabled.
Referenced by X12RtcGetAlarm(), and X12RtcSetAlarm().
| #define X12RTC_DTA0 0x03 |
Alarm 0 day of month.
| #define X12RTC_DTA1 0x0B |
Alarm 1 day of month.
| #define X12RTC_DTA_EDT 0x80 |
Day of month alarm enabled.
Referenced by X12RtcGetAlarm(), and X12RtcSetAlarm().
| #define X12RTC_MOA0 0x04 |
Alarm 0 month.
| #define X12RTC_MOA1 0x0C |
Alarm 1 month.
| #define X12RTC_MOA_EMO 0x80 |
Month alarm enabled.
Referenced by X12RtcGetAlarm(), and X12RtcSetAlarm().
| #define X12RTC_YRA0 0x05 |
Currently unused alarm 0 register.
| #define X12RTC_YRA1 0x0D |
Currently unused alarm 1 register.
| #define X12RTC_DWA0 0x06 |
Alarm 0 weekday.
| #define X12RTC_DWA1 0x0E |
Alarm 1 weekday.
| #define X12RTC_DWA_EDW 0x80 |
Weekday alarm enabled.
Referenced by X12RtcGetAlarm(), and X12RtcSetAlarm().
| #define X12RTC_Y2K0 0x07 |
Alarm 0 .
| #define X12RTC_Y2K1 0x0F |
Alarm 1 .
| #define X12RTC_BL 0x10 |
Block protection and watchdog register.
| #define X12RTC_BL_WD 0x18 |
Watchdog configuration.
| #define X12RTC_BL_WD_1750 0x00 |
Timeout after 1.75 seconds.
| #define X12RTC_BL_WD_750 0x08 |
Timeout after 750 milliseconds.
| #define X12RTC_BL_WD_250 0x10 |
Timeout after 250 milliseconds.
| #define X12RTC_BL_WD_OFF 0x18 |
Disabled.
| #define X12RTC_BL_BP 0xE0 |
Block protection.
| #define X12RTC_BL_BP_NONE 0x00 |
No protection.
| #define X12RTC_BL_BP_UQUAD 0x20 |
Upper quarter protected.
| #define X12RTC_BL_BP_UHALF 0x40 |
Upper half protected.
| #define X12RTC_BL_BP_FULL 0x60 |
Full array protected.
| #define X12RTC_BL_BP_FIRST1 0x80 |
First page protected.
| #define X12RTC_BL_BP_FIRST2 0xA0 |
First 2 pages protected.
| #define X12RTC_BL_BP_FIRST3 0xC0 |
First 4 pages protected.
| #define X12RTC_BL_BP_FIRST8 0xE0 |
First 8 pages protected.
| #define X12RTC_INT 0x11 |
Interrupt control and freq. output register.
| #define X12RTC_INT_FO 0x14 |
Programmable frequency output bits.
| #define X12RTC_INT_FO_IRQ 0x00 |
Alarm interrupt.
| #define X12RTC_INT_FO_32KHZ 0x04 |
32.768kHz.
| #define X12RTC_INT_FO_100HZ 0x10 |
100Hz.
| #define X12RTC_INT_FO_1HZ 0x14 |
1Hz.
| #define X12RTC_INT_AL0E 0x20 |
Alarm 0 interrupt enable.
| #define X12RTC_INT_AL1E 0x40 |
Alarm 1 interrupt enable.
| #define X12RTC_INT_IM 0x80 |
Repetitive alarm.
| #define X12RTC_ATR 0x12 |
Analog trimming register.
| #define X12RTC_DTR 0x13 |
Digital trimming register.
| #define X12RTC_DTR_NONE 0x00 |
0 PPM.
| #define X12RTC_DTR_PLUS10 0x02 |
+10 PPM.
| #define X12RTC_DTR_PLUS20 0x01 |
+20 PPM.
| #define X12RTC_DTR_PLUS30 0x03 |
+30 PPM.
| #define X12RTC_DTR_MINUS10 0x06 |
-10 PPM.
| #define X12RTC_DTR_MINUS20 0x05 |
-20 PPM.
| #define X12RTC_DTR_MINUS30 0x07 |
-30 PPM.
| #define X12RTC_SC 0x30 |
Seconds register, 0 - 59.
Referenced by X12RtcGetClock(), and X12RtcSetClock().
| #define X12RTC_MN 0x31 |
Minutes register, 0 - 59.
| #define X12RTC_HR 0x32 |
Hours register, 0 - 23.
| #define X12RTC_HR_MIL 0x80 |
Use 24h format.
| #define X12RTC_DT 0x33 |
Day register, 1 - 31.
| #define X12RTC_MO 0x34 |
Month register, 1 - 12.
| #define X12RTC_YR 0x35 |
Year register, 0 - 99.
| #define X12RTC_DW 0x36 |
Day of the weeks register, 0 - 6.
| #define X128xRTC_SSEC 0x37 |
X1286 1/100 second register, 0 - 99 (read only).
Referenced by X12Init().
| #define X122xRTC_Y2K 0x37 |
X1226 epoch register, 19 or 20.
| #define X12RTC_SR 0x3F |
Status register.
Referenced by X12RtcGetStatus().
| #define X12RTC_SR_RTCF 0x01 |
Power failure.
| #define X12RTC_SR_WEL 0x02 |
Memory write enable.
| #define X12RTC_SR_RWEL 0x04 |
Register write enable.
| #define X12RTC_SR_AL0 0x20 |
Alarm 0 indicator.
| #define X12RTC_SR_AL1 0x40 |
Alarm 1 indicator.
| #define X12RTC_SR_BAT 0x80 |
Operating from battery.
| int X12Init | ( | NUTRTC * | rtc | ) |
Initialize the interface to an Intersil X12xx hardware clock.
References NutSleep(), printf, rc, TwInit, X128xRTC_SSEC, X12RtcGetStatus(), and X12RtcReadRegs().
Get date and time from an X12xx hardware clock.
| tm | Points to a structure that receives the date and time information. |
References BCD2BIN, rc, _tm::tm_hour, _tm::tm_mday, _tm::tm_min, _tm::tm_mon, _tm::tm_sec, _tm::tm_wday, _tm::tm_year, X12RTC_SC, and X12RtcReadRegs().
Set an X12xx hardware clock.
New time will be taken over at the beginning of the next second.
| tm | Points to a structure which contains the date and time information. |
References BIN2BCD, memset(), _tm::tm_hour, _tm::tm_mday, _tm::tm_min, _tm::tm_mon, _tm::tm_sec, _tm::tm_wday, _tm::tm_year, X12RTC_SC, and X12RtcWrite().
Get alarm date and time of an X12xx hardware clock.
| idx | Zero based index. Two alarms are supported. |
| tm | Points to a structure that receives the date and time information. |
| aflgs | Points to an unsigned long that receives the enable flags. |
References BCD2BIN, memset(), rc, RTC_ALARM_HOUR, RTC_ALARM_MDAY, RTC_ALARM_MINUTE, RTC_ALARM_MONTH, RTC_ALARM_SECOND, RTC_ALARM_WDAY, _tm::tm_hour, _tm::tm_mday, _tm::tm_min, _tm::tm_mon, _tm::tm_sec, _tm::tm_wday, X12RTC_DTA_EDT, X12RTC_DWA_EDW, X12RTC_HRA_EHR, X12RTC_MNA_EMN, X12RTC_MOA_EMO, X12RTC_SCA_ESC, and X12RtcReadRegs().
Set alarm of an X12xx hardware clock.
| idx | Zero based index. Two alarms are supported. |
| tm | Points to a structure which contains the date and time information. May be NULL to clear the alarm. |
| aflgs | Each bit enables a specific comparision.
|
References BIN2BCD, memset(), RTC_ALARM_HOUR, RTC_ALARM_MDAY, RTC_ALARM_MINUTE, RTC_ALARM_MONTH, RTC_ALARM_SECOND, RTC_ALARM_WDAY, _tm::tm_hour, _tm::tm_mday, _tm::tm_min, _tm::tm_mon, _tm::tm_sec, _tm::tm_wday, X12RTC_DTA_EDT, X12RTC_DWA_EDW, X12RTC_HRA_EHR, X12RTC_MNA_EMN, X12RTC_MOA_EMO, X12RTC_SCA_ESC, and X12RtcWrite().
Query RTC status flags.
| sflgs | Points to an unsigned long that receives the status flags.
|
References rc, X12RTC_SR, and X12RtcReadRegs().
Referenced by X12Init().
Clear RTC status flags.
| sflgs | Status flags to clear. |
Read RTC registers.
| reg | The first register to read. |
| buff | Pointer to a buffer that receives the register contents. |
| cnt | The number of registers to read. |
References I2C_SLA_RTC, NUT_WAIT_INFINITE, printf, putchar(), rc, and TwMasterTransact.
Referenced by X12Init(), X12RtcGetAlarm(), X12RtcGetClock(), and X12RtcGetStatus().
| int X12RtcWrite | ( | int | nv, |
| const uint8_t * | buff, | ||
| size_t | cnt | ||
| ) |
Write to RTC registers.
| nv | Must be set to 1 when writing to non-volatile registers. In this case the routine will poll for write cycle completion before returning to the caller. Set to zero if writing to volatile registers. |
| buff | This buffer must contain all bytes to be transfered to the RTC chip, including the register address. |
| cnt | Number of valid bytes in the buffer. |
References I2C_SLA_RTC, NUT_WAIT_INFINITE, printf, putchar(), rc, and TwMasterTransact.
Referenced by X12RtcSetAlarm(), and X12RtcSetClock().
| int X12EepromRead | ( | unsigned int | addr, |
| void * | buff, | ||
| size_t | len | ||
| ) |
Read contents from non-volatile EEPROM.
| addr | Start location. |
| buff | Points to a buffer that receives the contents. |
| len | Number of bytes to read. |
References I2C_SLA_EEPROM, NUT_WAIT_INFINITE, rc, and TwMasterTransact.
Referenced by NutNvMemLoad().
| int X12EepromWrite | ( | unsigned int | addr, |
| const void * | buff, | ||
| size_t | len | ||
| ) |
Store buffer contents in non-volatile EEPROM.
The EEPROM of the X122x has a capacity of 512 bytes, while the X1286 is able to store 32 kBytes.
| addr | Storage start location. |
| buff | Points to a buffer that contains the bytes to store. |
| len | Number of valid bytes in the buffer. |
References EEPROM_PAGE_SIZE, free(), I2C_SLA_EEPROM, malloc(), memcpy(), NUT_WAIT_INFINITE, rc, and TwMasterTransact.
Referenced by NutNvMemSave().