api/at91_8h_source.html

00001 #ifndef _ARCH_ARM_AT91_H_
00002 #define _ARCH_ARM_AT91_H_
00003
00004 /*
00005  * Copyright (C) 2005 by egnite Software GmbH. All rights reserved.
00006  *
00007  * Redistribution and use in source and binary forms, with or without
00008  * modification, are permitted provided that the following conditions
00009  * are met:
00010  *
00011  * 1. Redistributions of source code must retain the above copyright
00012  *    notice, this list of conditions and the following disclaimer.
00013  * 2. Redistributions in binary form must reproduce the above copyright
00014  *    notice, this list of conditions and the following disclaimer in the
00015  *    documentation and/or other materials provided with the distribution.
00016  * 3. Neither the name of the copyright holders nor the names of
00017  *    contributors may be used to endorse or promote products derived
00018  *    from this software without specific prior written permission.
00019  *
00020  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00021  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00022  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00023  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00024  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00025  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00026  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00027  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00028  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00029  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00030  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00031  * SUCH DAMAGE.
00032  *
00033  * For additional information see http://www.ethernut.de/
00034  */
00035
00092 #if defined (MCU_AT91R40008)
00093 #include <arch/arm/atmel/at91x40.h>
00094 #elif defined (MCU_AT91SAM7X)
00095 #include <arch/arm/atmel/at91sam7x.h>
00096 #elif defined (MCU_AT91SAM7S)
00097 #include <arch/arm/atmel/at91sam7s.h>
00098 #elif defined (MCU_AT91SAM7SE)
00099 #include <arch/arm/atmel/at91sam7se.h>
00100 #elif defined (MCU_AT91SAM9260)
00101 #include <arch/arm/atmel/at91sam9260.h>
00102 #elif defined (MCU_AT91SAM9G45)
00103 #include <arch/arm/atmel/at91sam9g45.h>
00104 #elif defined(MCU_AT91SAM9XE)
00105 #include <arch/arm/atmel/at91sam9xe.h>
00106 #endif
00107
00108 #if defined(PMC_HAS_MDIV)
00109 /* If the power management controller has a master clock divider, then
00110    the peripherals may run on a slower clock than the CPU. In this case
00111    set the peripheral clock index to 1. If NUT_HWCLK_PERIPHERAL is not
00112    defined, it will be set in sys/timer.h to NUT_HWCLK_CPU, which is 0. */
00113 #define NUT_HWCLK_PERIPHERAL    1
00114 #endif
00115
00118
00119 #ifdef __GNUC__
00120
00124 #define IRQ_ENTRY() \
00125     asm volatile("sub   lr, lr,#4"          "\n\t"  /* Adjust LR */ \
00126                  "stmfd sp!,{r0-r12,lr}"    "\n\t"  /* Save registers on IRQ stack. */ \
00127                  "mrs   r1, spsr"           "\n\t"  /* Save SPSR */ \
00128                  "stmfd sp!,{r1}"           "\n\t")     /* */
00129
00133 #define IRQ_EXIT() \
00134     asm volatile("ldmfd sp!, {r1}"          "\n\t"  /* Restore SPSR */ \
00135                  "msr   spsr_c, r1"         "\n\t"  /* */ \
00136                  "ldr   r0, =0xFFFFF000"    "\n\t"  /* End of interrupt. */ \
00137                  "str   r0, [r0, #0x130]"   "\n\t"  /* */ \
00138                  "ldmfd sp!, {r0-r12, pc}^" "\n\t")     /* Restore registers and return. */
00139
00143 #define FIQ_ENTRY() \
00144     asm volatile("sub   lr, lr,#4"          "\n\t"  /* Adjust LR */ \
00145                  "stmfd sp!,{r0-r7,lr}"    "\n\t"  /* Save registers on IRQ stack. */ \
00146                  "mrs   r1, spsr"           "\n\t"  /* Save SPSR */ \
00147                  "stmfd sp!,{r1}"           "\n\t")     /* */
00148
00152 #define FIQ_EXIT() \
00153     asm volatile("ldmfd sp!, {r1}"          "\n\t"  /* Restore SPSR */ \
00154                  "msr   spsr_c, r1"         "\n\t"  /* */ \
00155                  "ldr   r0, =0xFFFFF000"    "\n\t"  /* End of interrupt. */ \
00156                  "str   r0, [r0, #0x130]"   "\n\t"  /* */ \
00157                  "ldmfd sp!, {r0-r7, pc}^" "\n\t")     /* Restore registers and return. */
00158
00159 #else /* __IMAGECRAFT__ */
00160
00161 #define IRQ_ENTRY() \
00162     asm("sub   lr, lr,#4\n" \
00163         "stmfd sp!,{r0-r12,lr}\n" \
00164         "mrs   r1, spsr\n" \
00165         "stmfd sp!,{r1}\n")
00166
00167 #define IRQ_EXIT() \
00168     asm("ldmfd sp!, {r1}\n" \
00169         "msr   spsr_c, r1\n" \
00170         ";ldr   r0, =0xFFFFF000\n" /* ICCARM: FIXME! */ \
00171         "str   r0, [r0, #0x130]\n" \
00172         "ldmfd sp!, {r0-r12, pc}^")
00173
00174 #define FIQ_ENTRY() \
00175     asm("sub   lr, lr,#4\n" \
00176         "stmfd sp!,{r0-r7,lr}\n" \
00177         "mrs   r1, spsr\n" \
00178         "stmfd sp!,{r1}\n")
00179
00180 #define FIQ_EXIT() \
00181     asm("ldmfd sp!, {r1}\n" \
00182         "msr   spsr_c, r1\n" \
00183         ";ldr   r0, =0xFFFFF000\n" /* ICCARM: FIXME! */ \
00184         "str   r0, [r0, #0x130]\n" \
00185         "ldmfd sp!, {r0-r7, pc}^")
00186
00187 #endif
00188
00191 #ifndef __ASSEMBLER__
00192 extern void McuInit(void);
00193 #endif
00194
00195 #endif                          /* _ARCH_ARM_AT91_H_ */