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Image Sensor Control Register 1 | |
| #define | ISI_CR1_OFF 0x00000000 |
| Control register 1 offset. | |
| #define | ISI_CR1 (ISI_BASE + ISI_CR1_OFF) |
| Control register 1 address. | |
| #define | ISI_RST 0x00000001 |
| Image sensor interface reset. | |
| #define | ISI_HSYNC_POL 0x00000004 |
| HSYNC active low. | |
| #define | ISI_VSYNC_POL 0x00000008 |
| VSYNC active low. | |
| #define | ISI_PIXCLK_POL 0x00000010 |
| Data sampled on falling edge of pixel clock. | |
| #define | ISI_EMB_SYNC 0x00000040 |
| Embedded synchronisation. | |
| #define | ISI_CRC_SYNC 0x00000080 |
| CRC correction. | |
| #define | ISI_FRATE 0x00000700 |
| Frame rate capture mask. | |
| #define | ISI_FRATE_LSB 8 |
| Frame rate capture LSB. | |
| #define | ISI_FULL 0x00001000 |
| Full mode is allowed. | |
| #define | ISI_THMASK 0x00006000 |
| Threshold mask. | |
| #define | ISI_THMASK_4_8_16_BURST 0x00000000 |
| 4, 8 and 16 AHB bursts are allowed. | |
| #define | ISI_THMASK_8_16_BURST 0x00002000 |
| 8 and 16 AHB bursts are allowed. | |
| #define | ISI_THMASK_16_BURST 0x00004000 |
| Only 16 AHB bursts are allowed. | |
| #define | ISI_CODEC_ON 0x00008000 |
| Codec path enable. | |
| #define | ISI_SLD 0x00FF0000 |
| Start of line delay mask. | |
| #define | ISI_SLD_LSB 16 |
| Start of line delay LSB. | |
| #define | ISI_SFD 0xFF000000 |
| Start of frame delay mask. | |
| #define | ISI_SFD_LSB 24 |
| Start of frame delay LSB. | |
Image Sensor Control Register 2 | |
| #define | ISI_CR2_OFF 0x00000004 |
| Control register 2 offset. | |
| #define | ISI_CR2 (ISI_BASE + ISI_CR2_OFF) |
| Control register 2 address. | |
| #define | ISI_IM_VSIZE 0x000007FF |
| Vertical size of the image sensor mask. | |
| #define | ISI_IM_VSIZE_LSB 0 |
| Vertical size of the image sensor LSB. | |
| #define | ISI_GS_MODE 0x00000800 |
| 1 pixel grayscale mode. | |
| #define | ISI_RGB_MODE 0x00001000 |
| 16 bit RGB mode. | |
| #define | ISI_GRAYSCALE 0x00002000 |
| Grayscale enable. | |
| #define | ISI_RGB_SWAP 0x00004000 |
| RGB swap. | |
| #define | ISI_COL_SPACE 0x00008000 |
| RGB color space for the image data. | |
| #define | ISI_IM_HSIZE 0x07FF0000 |
| Horizontal size of the image sensor mask. | |
| #define | ISI_IM_HSIZE_LSB 16 |
| Horizontal size of the image sensor LSB. | |
| #define | ISI_YCC_SWAP 0x30000000 |
| YCC swap mask. | |
| #define | ISI_YCC_SWAP_DEFAULT 0x00000000 |
| Image data format Cb(i) Y(i) Cr(i) Y(i+1). | |
| #define | ISI_YCC_SWAP_MODE1 0x10000000 |
| Image data format Cr(i) Y(i) Cb(i) Y(i+1). | |
| #define | ISI_YCC_SWAP_MODE2 0x20000000 |
| Image data format Y(i) Cb(i) Y(i+1) Cr(i). | |
| #define | ISI_YCC_SWAP_MODE3 0x30000000 |
| Image data format Y(i) Cr(i) Y(i+1) Cb(i). | |
| #define | ISI_RGB_CFG 0xC0000000 |
| RGB configuration mask. | |
| #define | ISI_RGB_CFG_DEFAULT 0x00000000 |
| RGB pattern R/G(MSB) G(LSB)/B R/G(MSB) G(LSB)/B. | |
| #define | ISI_RGB_CFG_MODE1 0x40000000 |
| RGB pattern B/G(MSB) G(LSB)/R B/G(MSB) G(LSB)/R. | |
| #define | ISI_RGB_CFG_MODE2 0x80000000 |
| RGB pattern G(LSB)/R B/G(MSB) G(LSB)/R B/G(MSB). | |
| #define | ISI_RGB_CFG_MODE3 0xC0000000 |
| RGB pattern G(LSB)/B R/G(MSB) G(LSB)/B R/G(MSB). | |
Image Sensor Status and Interrupt Registers | |
| #define | ISI_DIS 0x00000002 |
| Image sensor shut down. | |
| #define | ISI_SR_OFF 0x00000008 |
| Status register offset. | |
| #define | ISI_SR (ISI_BASE + ISI_SR_OFF) |
| Status register address. | |
| #define | ISI_IER_OFF 0x0000000C |
| Interrupt enable register offset. | |
| #define | ISI_IER (ISI_BASE + ISI_IER_OFF) |
| Interrupt enable address. | |
| #define | ISI_IDR_OFF 0x00000010 |
| Interrupt disable register offset. | |
| #define | ISI_IDR (ISI_BASE + ISI_IDR_OFF) |
| Interrupt disable address. | |
| #define | ISI_IMR_OFF 0x00000014 |
| Interrupt mask register offset. | |
| #define | ISI_IMR (ISI_BASE + ISI_IMR_OFF) |
| Interrupt mask address. | |
| #define | ISI_SOF 0x00000001 |
| Start of frame. | |
| #define | ISI_DIS 0x00000002 |
| Image sensor shut down. | |
| #define | ISI_SOFTRST 0x00000004 |
| Software reset. | |
| #define | ISI_CDC_PND 0x00000008 |
| Codec request pending. | |
| #define | ISI_CRC_ERR 0x00000010 |
| CRC synchronisation error. | |
| #define | ISI_FO_C_OVF 0x00000020 |
| Codec overflow. | |
| #define | ISI_FO_P_OVF 0x00000040 |
| Preview FIFO overflow. | |
| #define | ISI_FO_P_EMP 0x00000080 |
| Preview FIFO empty. | |
| #define | ISI_FO_C_EMP 0x00000100 |
| Codec FIFO empty. | |
| #define | ISI_FR_OVR 0x00000200 |
| Frame rate overun. | |
Image Sensor Preview Size Register | |
| #define | ISI_PSIZE_OFF 0x00000020 |
| Preview size register offset. | |
| #define | ISI_PSIZE (ISI_BASE + ISI_PSIZE_OFF) |
| Preview size register address. | |
| #define | ISI_PREV_VSIZE 0x000003FF |
| Vertical size for the preview path mask. | |
| #define | ISI_PREV_VSIZE_LSB 0 |
| Vertical size for the preview path LSB. | |
| #define | ISI_PREV_HSIZE 0x03FF0000 |
| Horizontal size for the preview path mask. | |
| #define | ISI_PREV_HSIZE_LSB 16 |
| Horizontal size for the preview path LSB. | |
Image Sensor Preview Decimation Register | |
| #define | ISI_PDECF_OFF 0x00000024 |
| Preview decimation factor register offset. | |
| #define | ISI_PDECF (ISI_BASE + ISI_PDECF_OFF) |
| Preview decimation factor register address. | |
| #define | ISI_DEC_FACTOR 0x000000FF |
| Decimation factor mask. | |
| #define | ISI_DEC_FACTOR_LSB 0 |
| Decimation factor LSB. | |
Image Sensor Preview Primary FBD Register | |
| #define | ISI_PPFBD_OFF 0x00000028 |
| Preview frame buffer address register offset. | |
| #define | ISI_PPFBD (ISI_BASE + ISI_PPFBD_OFF) |
| Preview frame buffer address register address. | |
Image Sensor Codec DMA Base Address Register | |
| #define | ISI_CDBA_OFF 0x0000002C |
| Codec DMA address register offset. | |
| #define | ISI_CDBA (ISI_BASE + ISI_CDBA_OFF) |
| Codec DMA address register address. | |
Image Sensor Color Space Conversion YCrCb To RGB Set 0 Register | |
| #define | ISI_Y2R_SET0_OFF 0x00000030 |
| YCrCb to RGB conversion set 0 register offset. | |
| #define | ISI_Y2R_SET0 (ISI_BASE + ISI_Y2R_SET0_OFF) |
| YCrCb to RGB conversion set 0 register address. | |
| #define | ISI_Y2R_C0 0x000000FF |
| Conversion matrix coefficient C0 mask. | |
| #define | ISI_Y2R_C0_LSB 0 |
| Conversion matrix coefficient C0 LSB. | |
| #define | ISI_Y2R_C1 0x0000FF00 |
| Conversion matrix coefficient C1 mask. | |
| #define | ISI_Y2R_C1_LSB 8 |
| Conversion matrix coefficient C1 LSB. | |
| #define | ISI_Y2R_C2 0x00FF0000 |
| Conversion matrix coefficient C2 mask. | |
| #define | ISI_Y2R_C2_LSB 16 |
| Conversion matrix coefficient C2 LSB. | |
| #define | ISI_Y2R_C3 0xFF000000 |
| Conversion matrix coefficient C3 mask. | |
| #define | ISI_Y2R_C3_LSB 24 |
| Conversion matrix coefficient C3 LSB. | |
Image Sensor Color Space Conversion YCrCb To RGB Set 1 Register | |
| #define | ISI_Y2R_SET1_OFF 0x00000034 |
| YCrCb to RGB conversion set 1 register offset. | |
| #define | ISI_Y2R_SET1 (ISI_BASE + ISI_Y2R_SET1_OFF) |
| YCrCb to RGB conversion set 1 register address. | |
| #define | ISI_Y2R_C4 0x000001FF |
| Conversion matrix coefficient C4 mask. | |
| #define | ISI_Y2R_C4_LSB 0 |
| Conversion matrix coefficient C4 LSB. | |
| #define | ISI_Y2R_YOFF 0x00001000 |
| Luminance default offset 128. | |
| #define | ISI_Y2R_CROFF 0x00002000 |
| Red chrominance default offset 16. | |
| #define | ISI_Y2R_CBOFF 0x00004000 |
| Blue chrominance default offset 16. | |
Image Sensor Color Space Conversion RGB To YCrCb Set 0 Register | |
| #define | ISI_R2Y_SET0_OFF 0x00000038 |
| RGB to YCrCb conversion set 0 register offset. | |
| #define | ISI_R2Y_SET0 (ISI_BASE + ISI_R2Y_SET0_OFF) |
| RGB to YCrCb conversion set 0 register address. | |
| #define | ISI_R2Y_C0 0x000000FF |
| Conversion matrix coefficient C0 mask. | |
| #define | ISI_R2Y_C0_LSB 0 |
| Conversion matrix coefficient C0 LSB. | |
| #define | ISI_R2Y_C1 0x0000FF00 |
| Conversion matrix coefficient C1 mask. | |
| #define | ISI_R2Y_C1_LSB 8 |
| Conversion matrix coefficient C1 LSB. | |
| #define | ISI_R2Y_C2 0x00FF0000 |
| Conversion matrix coefficient C2 mask. | |
| #define | ISI_R2Y_C2_LSB 16 |
| Conversion matrix coefficient C2 LSB. | |
| #define | ISI_R2Y_ROFF 0x01000000 |
| Red component offset 16. | |
Image Sensor Color Space Conversion RGB To YCrCb Set 1 Register | |
| #define | ISI_R2Y_SET1_OFF 0x0000003C |
| RGB to YCrCb conversion set 1 register offset. | |
| #define | ISI_R2Y_SET1 (ISI_BASE + ISI_R2Y_SET1_OFF) |
| RGB to YCrCb conversion set 1 register address. | |
| #define | ISI_R2Y_C3 0x000000FF |
| Conversion matrix coefficient C3 mask. | |
| #define | ISI_R2Y_C3_LSB 0 |
| Conversion matrix coefficient C3 LSB. | |
| #define | ISI_R2Y_C4 0x0000FF00 |
| Conversion matrix coefficient C4 mask. | |
| #define | ISI_R2Y_C4_LSB 8 |
| Conversion matrix coefficient C4 LSB. | |
| #define | ISI_R2Y_C5 0x00FF0000 |
| Conversion matrix coefficient C5 mask. | |
| #define | ISI_R2Y_C5_LSB 16 |
| Conversion matrix coefficient C5 LSB. | |
| #define | ISI_R2Y_GOFF 0x01000000 |
| Green component offset 128. | |
Image Sensor Color Space Conversion RGB To YCrCb Set 2 Register | |
| #define | ISI_R2Y_SET2_OFF 0x00000040 |
| RGB to YCrCb conversion set 2 register offset. | |
| #define | ISI_R2Y_SET2 (ISI_BASE + ISI_R2Y_SET2_OFF) |
| RGB to YCrCb conversion set 2 register address. | |
| #define | ISI_R2Y_C6 0x000000FF |
| Conversion matrix coefficient C6 mask. | |
| #define | ISI_R2Y_C6_LSB 0 |
| Conversion matrix coefficient C6 LSB. | |
| #define | ISI_R2Y_C7 0x0000FF00 |
| Conversion matrix coefficient C7 mask. | |
| #define | ISI_R2Y_C7_LSB 8 |
| Conversion matrix coefficient C7 LSB. | |
| #define | ISI_R2Y_C8 0x00FF0000 |
| Conversion matrix coefficient C8 mask. | |
| #define | ISI_R2Y_C8_LSB 16 |
| Conversion matrix coefficient C8 LSB. | |
| #define | ISI_R2Y_BOFF 0x01000000 |
| Blue component offset 128. | |