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Nut/OS
4.10.3
API Reference
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Nut/OS
4.10.3
API Reference
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Go to the source code of this file.
Defines | |
| #define | WRAM_START 0x03000000 |
| Internal work RAM. | |
| #define | WRAM_END (WRAM_START + 0x8000) |
| #define | INT_VECTOR (WRAM_END - 4) |
| #define | REG_DISPCNT 0x04000000 |
| Display control. | |
| #define | REG_STAT 0x04000004 |
| #define | REG_VCOUNT 0x04000006 |
| #define | REG_BG0CNT 0x04000008 |
| #define | REG_BG1CNT 0x0400000a |
| #define | REG_BG2CNT 0x0400000c |
| #define | REG_BG3CNT 0x0400000e |
| #define | REG_BG0HOFS 0x04000010 |
| #define | REG_BG0VOFS 0x04000012 |
| #define | REG_BG1HOFS 0x04000014 |
| #define | REG_BG1VOFS 0x04000016 |
| #define | REG_BG2HOFS 0x04000018 |
| #define | REG_BG2VOFS 0x0400001a |
| #define | REG_BG3HOFS 0x0400001c |
| #define | REG_BG3VOFS 0x0400001e |
| #define | REG_BG2PA 0x04000020 |
| #define | REG_BG2PB 0x04000022 |
| #define | REG_BG2PC 0x04000024 |
| #define | REG_BG2PD 0x04000026 |
| #define | REG_BG2X 0x04000028 |
| #define | REG_BG2Y 0x0400002c |
| #define | REG_BG3PA 0x04000030 |
| #define | REG_BG3PB 0x04000032 |
| #define | REG_BG3PC 0x04000034 |
| #define | REG_BG3PD 0x04000036 |
| #define | REG_BG3X 0x04000038 |
| #define | REG_BG3Y 0x0400003c |
| #define | REG_WINCNT 0x04000040 |
| #define | REG_WININ 0x04000048 |
| #define | REG_WINOUT 0x0400004a |
| #define | REG_MOSAIC 0x0400004c |
| #define | REG_BLDCNT 0x04000050 |
| #define | REG_BLDALPHA 0x04000052 |
| #define | REG_BLDY 0x04000054 |
| #define | REG_SOUND1CNT 0x04000060 |
| Sound control. | |
| #define | REG_SOUND2CNT 0x04000068 |
| #define | REG_SOUND3CNT 0x04000070 |
| #define | REG_SOUND4CNT 0x04000078 |
| #define | REG_SOUNDCNT 0x04000080 |
| #define | REG_SOUNDBIAS 0x04000088 |
| #define | REG_WAVE_RAM0 0x04000090 |
| #define | REG_WAVE_RAM1 0x04000094 |
| #define | REG_WAVE_RAM2 0x04000098 |
| #define | REG_WAVE_RAM3 0x0400009c |
| #define | REG_FIFO_A 0x040000a0 |
| #define | REG_FIFO_B 0x040000a4 |
| #define | REG_DMA0SAD 0x040000b0 |
| DMA control. | |
| #define | REG_DMA0DAD 0x040000b4 |
| #define | REG_DMA0CNT 0x040000b8 |
| #define | REG_DMA1SAD 0x040000bc |
| #define | REG_DMA1DAD 0x040000c0 |
| #define | REG_DMA1CNT 0x040000c4 |
| #define | REG_DMA2SAD 0x040000c8 |
| #define | REG_DMA2DAD 0x040000cc |
| #define | REG_DMA2CNT 0x040000d0 |
| #define | REG_DMA3SAD 0x040000d4 |
| #define | REG_DMA3DAD 0x040000d8 |
| #define | REG_DMA3CNT 0x040000dc |
| #define | REG_TMR0CNT 0x04000100 |
| Timer control. | |
| #define | REG_TMR1CNT 0x04000104 |
| #define | REG_TMR2CNT 0x04000108 |
| #define | REG_TMR3CNT 0x0400010c |
| #define | REG_SIODATA32 0x04000120 |
| Serial communication control. | |
| #define | REG_SIOCNT 0x04000128 |
| #define | REG_SIODATA8 0x0400012a |
| #define | REG_KEYINPUT 0x04000130 |
| Keyboard control. | |
| #define | REG_KEYCNT 0x04000132 |
| #define | REG_RCNT 0x04000134 |
| General I/O control. | |
| #define | REG_JOYCNT 0x04000140 |
| JOY Bus control. | |
| #define | REG_JOYSTAT 0x04000158 |
| #define | REG_JOY_RECV 0x04000150 |
| #define | REG_JOY_TRANS 0x04000154 |
| #define | REG_IE 0x04000200 |
| Interrupt control. | |
| #define | REG_IF 0x04000202 |
| #define | REG_WAITCNT 0x04000204 |
| #define | REG_IME 0x04000208 |
| #define | INT_VBLANK 0x0001 |
| Interrupt flags. | |
| #define | INT_HBLANK 0x0002 |
| #define | INT_VCOUNT 0x0004 |
| #define | INT_TMR0 0x0008 |
| #define | INT_TMR1 0x0010 |
| #define | INT_TMR2 0x0020 |
| #define | INT_TMR3 0x0040 |
| #define | INT_SIO 0x0080 |
| #define | INT_DMA0 0x0100 |
| #define | INT_DMA1 0x0200 |
| #define | INT_DMA2 0x0400 |
| #define | INT_DMA3 0x0800 |
| #define | INT_KEYPAD 0x1000 |
| #define | INT_GAMEPAK 0x2000 |
| #define | REG_HALTCNT 0x04000300 |
| Power management control. | |
| #define | outw(_reg, _val) (*((volatile unsigned short *)(_reg)) = (_val)) |
| #define | outdw(_reg, _val) (*((volatile unsigned long *)(_reg)) = (_val)) |
| #define | inw(_reg) (*((volatile unsigned short *)(_reg))) |
| #define | indw(_reg) (*((volatile unsigned long *)(_reg))) |
| #define | GBAKEY_A 0x0001 |
| #define | GBAKEY_B 0x0002 |
| #define | GBAKEY_SELECT 0x0003 |
| #define | GBAKEY_START 0x0008 |
| #define | GBAKEY_RIGHT 0x0010 |
| #define | GBAKEY_LEFT 0x0020 |
| #define | GBAKEY_UP 0x0040 |
| #define | GBAKEY_DOWN 0x0080 |
| #define | GBAKEY_R 0x0100 |
| #define | GBAKEY_L 0x0200 |
| #define | TMR_PRE_64 0x00010000 |
| Timer control. | |
| #define | TMR_PRE_256 0x00020000 |
| #define | TMR_PRE_1024 0x00030000 |
| #define | TMR_IRQ_ENA 0x00400000 |
| #define | TMR_ENA 0x00800000 |
| #define | SIO_BAUD_9600 0x0000 |
| SIO control. | |
| #define | SIO_BAUD_38400 0x0001 |
| #define | SIO_BAUD_57600 0x0002 |
| #define | SIO_BAUD_115200 0x0003 |
| #define | SIO_CTS_ENA 0x0004 |
| #define | SIO_PARITY_ODD 0x0008 |
| #define | SIO_TX_FULL 0x0010 |
| #define | SIO_RX_EMPTY 0x0020 |
| #define | SIO_ERROR 0x0040 |
| #define | SIO_DATA_8BIT 0x0080 |
| #define | SIO_FIFO_ENA 0x0100 |
| #define | SIO_PARITY_ENA 0x0200 |
| #define | SIO_SEND_ENA 0x0400 |
| #define | SIO_RECV_ENA 0x0800 |
| #define | SIO_MODE_32BIT 0x1000 |
| #define | SIO_MODE_MULTI 0x2000 |
| #define | SIO_MODE_UART 0x3000 |
| #define | SIO_IRQ_ENA 0x4000 |
| #define INT_VECTOR (WRAM_END - 4) |
Definition at line 55 of file gba.h.
Referenced by InitIrqHandler().
| #define REG_DISPCNT 0x04000000 |
| #define REG_BG2CNT 0x0400000c |
Definition at line 65 of file gba.h.
Referenced by DebugInit().
| #define REG_TMR3CNT 0x0400010c |
Definition at line 133 of file gba.h.
Referenced by NutRegisterTimer().
| #define REG_SIODATA32 0x04000120 |
| #define REG_IE 0x04000200 |
| #define REG_IF 0x04000202 |
Definition at line 165 of file gba.h.
Referenced by IrqHandler(), and Timer3Entry().
| #define REG_IME 0x04000208 |
Definition at line 167 of file gba.h.
Referenced by NutRegisterTimer().
| #define INT_VBLANK 0x0001 |
| #define INT_HBLANK 0x0002 |
Definition at line 173 of file gba.h.
Referenced by IrqHandler().
| #define INT_VCOUNT 0x0004 |
Definition at line 174 of file gba.h.
Referenced by IrqHandler().
| #define INT_TMR0 0x0008 |
Definition at line 175 of file gba.h.
Referenced by IrqHandler().
| #define INT_TMR1 0x0010 |
Definition at line 176 of file gba.h.
Referenced by IrqHandler().
| #define INT_TMR2 0x0020 |
Definition at line 177 of file gba.h.
Referenced by IrqHandler().
| #define INT_TMR3 0x0040 |
Definition at line 178 of file gba.h.
Referenced by IrqHandler(), NutRegisterTimer(), and Timer3Entry().
| #define INT_SIO 0x0080 |
Definition at line 179 of file gba.h.
Referenced by IrqHandler().
| #define INT_DMA0 0x0100 |
Definition at line 180 of file gba.h.
Referenced by IrqHandler().
| #define INT_DMA1 0x0200 |
Definition at line 181 of file gba.h.
Referenced by IrqHandler().
| #define INT_DMA2 0x0400 |
Definition at line 182 of file gba.h.
Referenced by IrqHandler().
| #define INT_DMA3 0x0800 |
Definition at line 183 of file gba.h.
Referenced by IrqHandler().
| #define INT_KEYPAD 0x1000 |
Definition at line 184 of file gba.h.
Referenced by IrqHandler().
| #define INT_GAMEPAK 0x2000 |
Definition at line 185 of file gba.h.
Referenced by IrqHandler().
| #define outw | ( | _reg, | |
| _val | |||
| ) | (*((volatile unsigned short *)(_reg)) = (_val)) |
Definition at line 193 of file gba.h.
Referenced by DebugInit(), NutRegisterTimer(), and Timer3Entry().
| #define outdw | ( | _reg, | |
| _val | |||
| ) | (*((volatile unsigned long *)(_reg)) = (_val)) |
Definition at line 194 of file gba.h.
Referenced by InitIrqHandler(), and NutRegisterTimer().
| #define inw | ( | _reg | ) | (*((volatile unsigned short *)(_reg))) |
Definition at line 195 of file gba.h.
Referenced by IrqHandler(), and NutRegisterTimer().
| #define TMR_IRQ_ENA 0x00400000 |
Definition at line 216 of file gba.h.
Referenced by NutRegisterTimer().
| #define TMR_ENA 0x00800000 |
Definition at line 217 of file gba.h.
Referenced by NutRegisterTimer().