Nut/OS  5.0.5
API Reference
Defines | Enumerations | Functions
lpc177x_8x_emc.h File Reference
#include <inttypes.h>
#include <dev/sdram.h>
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Defines

#define EMC_Control_MASK   ((uint32_t) 0x07)
#define EMC_Control_E   ((uint32_t)(1<<0))
#define EMC_Control_M   ((uint32_t)(1<<1))
#define EMC_Control_L   ((uint32_t)(1<<2))
#define EMC_Status_MASK   ((uint32_t) 0x07)
#define EMC_Status_B   ((uint32_t)(1<<0))
#define EMC_Status_S   ((uint32_t)(1<<1))
#define EMC_Status_SA   ((uint32_t)(1<<2))
#define EMC_Config_Endian_Mode   ((uint32_t)(1<<0))
#define EMC_Config_CCLK   ((uint32_t)(1<<8))
#define EMC_Config_MASK   ((uint32_t)(0x101))
#define EMC_DynamicControl_CE   ((uint32_t)(1<<0))
#define EMC_DynamicControl_CS   ((uint32_t)(1<<1))
#define EMC_DynamicControl_SR   ((uint32_t)(1<<2))
#define EMC_DynamicControl_MMC   ((uint32_t)(1<<5))
#define EMC_DynamicControl_I(n)   ((uint32_t)(n<<7))
#define EMC_DynamicControl_DP   ((uint32_t)(1<<13))
#define EMC_DynamicRefresh_REFRESH(n)   ((uint32_t ) (n & 0x3ff))
#define EMC_DynamicReadConfig_RD(n)   ((uint32_t )(n & 0x03))
#define EMC_DynamictRP_tRP(n)   ((uint32_t )(n & 0x0f))
#define EMC_DynamictRP_tRAS(n)   ((uint32_t )(n & 0x0f))
#define EMC_DynamictAPR_tAPR(n)   ((uint32_t )(n & 0x0f))
#define EMC_DynamictDAL_tDAL(n)   ((uint32_t )(n & 0x0f))
#define EMC_DynamictWR_tWR(n)   ((uint32_t )(n & 0x0f))
#define EMC_DynamictRC_tRC(n)   ((uint32_t )(n & 0x1f))
#define EMC_DynamictRFC_tRFC(n)   ((uint32_t )(n & 0x1f))
#define EMC_DynamictXSR_tXSR(n)   ((uint32_t )(n & 0x1f))
#define EMC_DynamictRRD_tRRD(n)   ((uint32_t )(n & 0x0f))
#define EMC_DynamictMRD_tMRD(n)   ((uint32_t )(n & 0x1f))
#define EMC_StaticExtendedWait_EXTENDEDWAIT(n)   ((uint32_t )(n & 0x3ff))
#define EMC_DynamicConfig_MD(n)   ((uint32_t )(n << 3))
#define EMC_DynamicConfig_AM1(n)   ((uint32_t )(n << 7))
#define EMC_DynamicConfig_AM2(n)   ((uint32_t )(1 << 14))
#define EMC_DynamicConfig_B   ((uint32_t )(1 << 19))
#define EMC_DynamicConfig_P   ((uint32_t )(1 << 20))
#define EMC_DynamicConfig_RAS(n)   ((uint32_t )(n & 0x03))
#define EMC_DynamicConfig_CAS(n)   ((uint32_t )(n << 8))
#define EMC_StaticConfig_MW(n)   ((uint32_t )(n & 0x03))
#define EMC_StaticConfig_MW_8BITS   (EMC_StaticConfig_MW(0))
#define EMC_StaticConfig_MW_16BITS   (EMC_StaticConfig_MW(1))
#define EMC_StaticConfig_MW_32BITS   (EMC_StaticConfig_MW(2))
#define EMC_StaticConfig_PM   ((uint32_t )(1 << 3))
#define EMC_StaticConfig_PC   ((uint32_t )(1 << 6))
#define EMC_StaticConfig_PB   ((uint32_t )(1 << 7))
#define EMC_StaticConfig_EW   ((uint32_t )(1 << 8))
#define EMC_StaticConfig_B   ((uint32_t )(1 << 19))
#define EMC_StaticConfig_P   ((uint32_t )(1 << 20))
#define EMC_StaticWaitWen_WAITWEN(n)   ((uint32_t )(n & 0x0f))
#define EMC_StaticWaitOen_WAITOEN(n)   ((uint32_t )(n & 0x0f))
#define EMC_StaticWaitRd_WAITRD(n)   ((uint32_t )(n & 0x1f))
#define EMC_StaticwaitPage_WAITPAGE(n)   ((uint32_t )(n & 0x1f))
#define EMC_StaticWaitwr_WAITWR(n)   ((uint32_t )(n & 0x1f))
#define EMC_StaticWaitTurn_WAITTURN(n)   ((uint32_t )(n & 0x0f))
#define EMC_DLYCTL_CMDDLY(n)   ((uint32_t)(n&0x1F))
#define EMC_DLYCTL_FBCLKDLY(n)   ((uint32_t)((n&0x1F)<<8))
#define EMC_DLYCTL_CLKOUT0DLY(n)   ((uint32_t)((n&0x1F)<<16))
#define EMC_DLYCTL_CLKOUT1DLY(n)   ((uint32_t)((n&0x1F)<<24))
#define EMC_CAL_CALVALUE(n)   ((uint32_t)(n&0xFF))
#define EMC_CAL_START   ((uint32_t)(1<<14))
#define EMC_CAL_DONE   ((uint32_t)(1<<15))
#define EMC_LITTLE_ENDIAN_MODE   ((uint32_t)(0))
#define EMC_BIG_ENDIAN_MODE   ((uint32_t)(1))

Enumerations

enum  EMC_DYN_MEM_PAR {
  EMC_DYN_MEM_REFRESH_TIMER, EMC_DYN_MEM_READ_CONFIG, EMC_DYN_MEM_TRP, EMC_DYN_MEM_TRAS,
  EMC_DYN_MEM_TSREX, EMC_DYN_MEM_TAPR, EMC_DYN_MEM_TDAL, EMC_DYN_MEM_TWR,
  EMC_DYN_MEM_TRC, EMC_DYN_MEM_TRFC, EMC_DYN_MEM_TXSR, EMC_DYN_MEM_TRRD,
  EMC_DYN_MEM_TMRD
}
enum  EMC_STA_MEM_PAR {
  EMC_STA_MEM_WAITWEN, EMC_STA_MEM_WAITOEN, EMC_STA_MEM_WAITRD, EMC_STA_MEM_WAITPAGE,
  EMC_STA_MEM_WAITWR, EMC_STA_MEM_WAITTURN
}

Functions

void Lpc177x_8x_EmcInit (void)
 Initialize EMC.
void Lpc177x_8x_EmcSDRAMAdjustTiming (void)
 Ajust SDRAM SDRAM timing.
int Lpc177x_8x_EmcSDRAMCheck (SDRAM sdram, uint32_t offset)
 Simple SDRAM test.
void Lpc177x_8x_EmcSDRAMInit (SDRAM sdram, uint32_t dynamic_config)
 EMC SDRAM initialisation.
void Lpc177x_8x_EmcConfigEndianMode (uint32_t endian_mode)
 Configure Little Endian/Big Endian mode for EMC.
void Lpc177x_8x_EmcDynCtrlClockEnable (uint32_t clock_enable)
 Set the value for dynamic clock enable bit.
void Lpc177x_8x_EmcDynCtrlClockControl (uint32_t clock_control)
 Set the value for dynamic memory clock control: stops or runs continuously.
void Lpc177x_8x_EmcDynCtrlSelfRefresh (uint32_t self_refresh_mode)
 Switch the Self-refresh mode between normal and self-refresh mode.
void Lpc177x_8x_EmcDynCtrlMMC (uint32_t mmc_val)
 Enable/disable CLKOUT.
void Lpc177x_8x_EmcDynCtrlSDRAMCmd (uint32_t sdram_command)
 Issue SDRAM command.
void Lpc177x_8x_EmcDynCtrlPowerDownMode (uint32_t power_command)
 Switch between Normal operation and deep sleep power mode.
void Lpc177x_8x_EmcSetDynMemoryParameter (EMC_DYN_MEM_PAR par, uint32_t val)
 Set the value of EMC dynamic memory registers.
void Lpc177x_8x_EmcStaticExtendedWait (uint32_t Extended_wait_time_out)
 Set extended wait time out for accessing static memory.
void Lpc177x_8x_EmcDynMemConfigMD (uint32_t cs, uint32_t mem_dev)
 Configure the memory device.
void Lpc177x_8x_EmcDynMemConfigAM (uint32_t cs, uint32_t addr_mapped)
 Map the address for the memory device.
void Lpc177x_8x_EmcDynMemConfigB (uint32_t cs, uint32_t buff_control)
 Enable/disable the buffer.
void Lpc177x_8x_EmcDynMemConfigP (uint32_t cs, uint32_t permission)
 Configure write permission: protect or not.
void Lpc177x_8x_EmcDynMemRAS (uint32_t cs, uint32_t ras_val)
 Set value for RAS latency.
void Lpc177x_8x_EmcDynMemCAS (uint32_t cs, uint32_t cas_val)
 Set value for CAS latency.
void Lpc177x_8x_EmcStaticMemConfigMW (uint32_t cs, uint32_t mem_width)
 Configure the memory bus width.
void Lpc177x_8x_EmcStaticMemConfigPM (uint32_t cs, uint32_t page_mode)
 Configure the page mode.
void Lpc177x_8x_EmcStaticMemConfigPC (uint32_t cs, uint32_t polarity)
 Configure the chip select polarity.
void Lpc177x_8x_EmcStaticMemConfigPB (uint32_t cs, uint32_t pb_val)
 Configure the byte lane state.
void Lpc177x_8x_EmcStaticMemConfigEW (uint32_t cs, uint32_t ex_wait)
 Configure the extended wait value.
void Lpc177x_8x_EmcStaticMemConfigB (uint32_t cs, uint32_t buf_val)
 Configure the buffer enable value.
void Lpc177x_8x_EmcStaticMemConfigP (uint32_t cs, uint32_t permission)
void Lpc177x_8x_EmcSetStaticMemoryParameter (uint32_t cs, EMC_STA_MEM_PAR par, uint32_t val)
 Set the value of LPC_EMC static memory registers.

Define Documentation

#define EMC_Control_MASK   ((uint32_t) 0x07)
#define EMC_Control_E   ((uint32_t)(1<<0))
#define EMC_Control_M   ((uint32_t)(1<<1))
#define EMC_Control_L   ((uint32_t)(1<<2))
#define EMC_Status_MASK   ((uint32_t) 0x07)
#define EMC_Status_B   ((uint32_t)(1<<0))
#define EMC_Status_S   ((uint32_t)(1<<1))
#define EMC_Status_SA   ((uint32_t)(1<<2))
#define EMC_Config_Endian_Mode   ((uint32_t)(1<<0))
#define EMC_Config_CCLK   ((uint32_t)(1<<8))
#define EMC_Config_MASK   ((uint32_t)(0x101))

Referenced by Lpc177x_8x_EmcConfigEndianMode().

#define EMC_DynamicControl_CE   ((uint32_t)(1<<0))

Referenced by Lpc177x_8x_EmcDynCtrlClockEnable().

#define EMC_DynamicControl_CS   ((uint32_t)(1<<1))

Referenced by Lpc177x_8x_EmcDynCtrlClockControl().

#define EMC_DynamicControl_SR   ((uint32_t)(1<<2))

Referenced by Lpc177x_8x_EmcDynCtrlSelfRefresh().

#define EMC_DynamicControl_MMC   ((uint32_t)(1<<5))

Referenced by Lpc177x_8x_EmcDynCtrlMMC().

#define EMC_DynamicControl_I (   n)    ((uint32_t)(n<<7))

Referenced by Lpc177x_8x_EmcDynCtrlSDRAMCmd().

#define EMC_DynamicControl_DP   ((uint32_t)(1<<13))

Referenced by Lpc177x_8x_EmcDynCtrlPowerDownMode().

#define EMC_DynamicRefresh_REFRESH (   n)    ((uint32_t ) (n & 0x3ff))
#define EMC_DynamicReadConfig_RD (   n)    ((uint32_t )(n & 0x03))
#define EMC_DynamictRP_tRP (   n)    ((uint32_t )(n & 0x0f))
#define EMC_DynamictRP_tRAS (   n)    ((uint32_t )(n & 0x0f))
#define EMC_DynamictAPR_tAPR (   n)    ((uint32_t )(n & 0x0f))
#define EMC_DynamictDAL_tDAL (   n)    ((uint32_t )(n & 0x0f))
#define EMC_DynamictWR_tWR (   n)    ((uint32_t )(n & 0x0f))
#define EMC_DynamictRC_tRC (   n)    ((uint32_t )(n & 0x1f))
#define EMC_DynamictRFC_tRFC (   n)    ((uint32_t )(n & 0x1f))
#define EMC_DynamictXSR_tXSR (   n)    ((uint32_t )(n & 0x1f))
#define EMC_DynamictRRD_tRRD (   n)    ((uint32_t )(n & 0x0f))
#define EMC_DynamictMRD_tMRD (   n)    ((uint32_t )(n & 0x1f))
#define EMC_StaticExtendedWait_EXTENDEDWAIT (   n)    ((uint32_t )(n & 0x3ff))
#define EMC_DynamicConfig_MD (   n)    ((uint32_t )(n << 3))
#define EMC_DynamicConfig_AM1 (   n)    ((uint32_t )(n << 7))
#define EMC_DynamicConfig_AM2 (   n)    ((uint32_t )(1 << 14))
#define EMC_DynamicConfig_B   ((uint32_t )(1 << 19))

Referenced by Lpc177x_8x_EmcDynMemConfigB().

#define EMC_DynamicConfig_P   ((uint32_t )(1 << 20))

Referenced by Lpc177x_8x_EmcDynMemConfigP().

#define EMC_DynamicConfig_RAS (   n)    ((uint32_t )(n & 0x03))
#define EMC_DynamicConfig_CAS (   n)    ((uint32_t )(n << 8))
#define EMC_StaticConfig_MW (   n)    ((uint32_t )(n & 0x03))
#define EMC_StaticConfig_MW_8BITS   (EMC_StaticConfig_MW(0))
#define EMC_StaticConfig_MW_16BITS   (EMC_StaticConfig_MW(1))
#define EMC_StaticConfig_MW_32BITS   (EMC_StaticConfig_MW(2))
#define EMC_StaticConfig_PM   ((uint32_t )(1 << 3))

Referenced by Lpc177x_8x_EmcStaticMemConfigPM().

#define EMC_StaticConfig_PC   ((uint32_t )(1 << 6))

Referenced by Lpc177x_8x_EmcStaticMemConfigPC().

#define EMC_StaticConfig_PB   ((uint32_t )(1 << 7))

Referenced by Lpc177x_8x_EmcStaticMemConfigPB().

#define EMC_StaticConfig_EW   ((uint32_t )(1 << 8))

Referenced by Lpc177x_8x_EmcStaticMemConfigEW().

#define EMC_StaticConfig_B   ((uint32_t )(1 << 19))

Referenced by Lpc177x_8x_EmcStaticMemConfigB().

#define EMC_StaticConfig_P   ((uint32_t )(1 << 20))
#define EMC_StaticWaitWen_WAITWEN (   n)    ((uint32_t )(n & 0x0f))
#define EMC_StaticWaitOen_WAITOEN (   n)    ((uint32_t )(n & 0x0f))
#define EMC_StaticWaitRd_WAITRD (   n)    ((uint32_t )(n & 0x1f))
#define EMC_StaticwaitPage_WAITPAGE (   n)    ((uint32_t )(n & 0x1f))
#define EMC_StaticWaitwr_WAITWR (   n)    ((uint32_t )(n & 0x1f))
#define EMC_StaticWaitTurn_WAITTURN (   n)    ((uint32_t )(n & 0x0f))
#define EMC_DLYCTL_CMDDLY (   n)    ((uint32_t)(n&0x1F))
#define EMC_DLYCTL_FBCLKDLY (   n)    ((uint32_t)((n&0x1F)<<8))
#define EMC_DLYCTL_CLKOUT0DLY (   n)    ((uint32_t)((n&0x1F)<<16))
#define EMC_DLYCTL_CLKOUT1DLY (   n)    ((uint32_t)((n&0x1F)<<24))
#define EMC_CAL_CALVALUE (   n)    ((uint32_t)(n&0xFF))
#define EMC_CAL_START   ((uint32_t)(1<<14))
#define EMC_CAL_DONE   ((uint32_t)(1<<15))
#define EMC_LITTLE_ENDIAN_MODE   ((uint32_t)(0))
#define EMC_BIG_ENDIAN_MODE   ((uint32_t)(1))

Enumeration Type Documentation

enum EMC_DYN_MEM_PAR
Enumerator:
EMC_DYN_MEM_REFRESH_TIMER 
EMC_DYN_MEM_READ_CONFIG 
EMC_DYN_MEM_TRP 
EMC_DYN_MEM_TRAS 
EMC_DYN_MEM_TSREX 
EMC_DYN_MEM_TAPR 
EMC_DYN_MEM_TDAL 
EMC_DYN_MEM_TWR 
EMC_DYN_MEM_TRC 
EMC_DYN_MEM_TRFC 
EMC_DYN_MEM_TXSR 
EMC_DYN_MEM_TRRD 
EMC_DYN_MEM_TMRD 
enum EMC_STA_MEM_PAR
Enumerator:
EMC_STA_MEM_WAITWEN 
EMC_STA_MEM_WAITOEN 
EMC_STA_MEM_WAITRD 
EMC_STA_MEM_WAITPAGE 
EMC_STA_MEM_WAITWR 
EMC_STA_MEM_WAITTURN 

Function Documentation

void Lpc177x_8x_EmcInit ( void  )

Initialize EMC.

Initialize the external memory controller. GPIO pins should be correctly configured when calling this function.

Parameters:
none
Returns:
none

References CLKPWR_PCONP_PCEMC, LPC_EMC, LPC_SC, and SysCtlPeripheralClkEnable.

Referenced by NutBoardInit().

void Lpc177x_8x_EmcSDRAMAdjustTiming ( void  )

Ajust SDRAM SDRAM timing.

This function should be called regularly to re-calibrate the delay lines which might change their correct delays due to thermal influences

Parameters:
none
Returns:
none

References DEFAULT_CLKOUTDLY, initial_calibration_value, LPC_SC, original_cmdclkdelay, and original_fbclkdelay.

int Lpc177x_8x_EmcSDRAMCheck ( SDRAM  sdram,
uint32_t  offset 
)

Simple SDRAM test.

This is used at startup time (before the first usage) to find the optimum delay time values.

ATT: This test overwrites the previous SDRAM contents! Please note that IT IS NOT POSSIBLE to preserve these contents because it might be possible that garbage address commands are output and we will not know which locations are addressed during this test. DO NOT USE this test if executing code from SDRAM.

ATT: This test is far from complete. We neither check differen write sizes nor do we use selected pattern to check single bit failures etc.

Parameters:
sdramconfiguration struct of the used sdram
offsetconstant used to modify the test pattern
Returns:
0 if test is ok, 1 in case of a failure

References _sdram_params::base_addr, SDRAMTEST_BLOCKSIZE, SDRAMTEST_JUMPSIZE, and _sdram_params::size.

Referenced by NutIdleInit().

void Lpc177x_8x_EmcSDRAMInit ( SDRAM  sdram,
uint32_t  dynamic_config 
)

EMC SDRAM initialisation.

This function configures the emc to a sdram connected to CS0 SDRAM timing parameters must be given as parameter

Parameters:
sdramconfiguration struct of the used sdram
dynamic_configconfiguration values for dynamic_config register
Returns:
none

References _BV, _sdram_params::base_addr, _sdram_params::bus_width, _sdram_params::cas_latency, _sdram_params::cols, DEFAULT_CMDDLY, DEFAULT_FBCLKDLY, initial_calibration_value, LPC_EMC, LPC_SC, NS_2_CLKS, NUT_HWCLK_CPU, NutArchClockGet(), original_cmdclkdelay, original_fbclkdelay, _sdram_params::ras_latency, _sdram_params::refresh, _sdram_params::tAPR, _sdram_params::tDAL, _sdram_params::tMRD, _sdram_params::tRAS, _sdram_params::tRC, _sdram_params::tRFC, _sdram_params::tRP, _sdram_params::tRRD, _sdram_params::tSREX, _sdram_params::tWR, and _sdram_params::tXSR.

Referenced by NutBoardInit().

Here is the call graph for this function:

void Lpc177x_8x_EmcConfigEndianMode ( uint32_t  endian_mode)

Configure Little Endian/Big Endian mode for EMC.

Parameters:
endian_modeEndian mode, should be:
  • EMC_LITTLE_ENDIAN_MODE: Little-endian mode
  • EMC_BIG_ENDIAN_MODE : Big-endian mode
Returns:
none

References EMC_Config_MASK, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlClockEnable ( uint32_t  clock_enable)

Set the value for dynamic clock enable bit.

Parameters:
clock_enableclock enable mode, should be:
  • 0: Clock enable of idle devices are deasserted to save power
  • EMC_DynamicControl_CE: All clock enables are driven HIGH continuously
Returns:
none

References EMC_DynamicControl_CE, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlClockControl ( uint32_t  clock_control)

Set the value for dynamic memory clock control: stops or runs continuously.

Parameters:
clock_controlclock control mode, should be:
  • 0: CLKOUT stops when all SDRAMs are idle and during self-refresh mode
  • EMC_DynamicControl_CS: CLKOUT runs continuously
Returns:
none

References EMC_DynamicControl_CS, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlSelfRefresh ( uint32_t  self_refresh_mode)

Switch the Self-refresh mode between normal and self-refresh mode.

Parameters:
self_refresh_modeself refresh mode, should be:
  • 0: Normal mode
  • EMC_DynamicControl_SR: Enter self-refresh mode
Returns:
none

References EMC_DynamicControl_SR, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlMMC ( uint32_t  mmc_val)

Enable/disable CLKOUT.

Parameters:
MMC_valMemory clock control mode, should be:
  • 0: CLKOUT enabled
  • EMC_DynamicControl_MMC: CLKOUT disabled
Returns:
none

References EMC_DynamicControl_MMC, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlSDRAMCmd ( uint32_t  sdram_command)

Issue SDRAM command.

Parameters:
sdram_commandCommand mode, should be:
  • 0x00: Issue SDRAM NORMAL operation command
  • 0x01: Issue SDRAM MODE command
  • 0x02: Issue SDRAM PALL (precharge all) command
  • 0x03: Issue SRAM NOP (no operation) command
Returns:
none

References EMC_DynamicControl_I, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlPowerDownMode ( uint32_t  power_command)

Switch between Normal operation and deep sleep power mode.

Parameters:
power_commandLow-power SDRAM deep-sleep mode, should be:
  • 0: Normal operation
  • EMC_DynamicControl_DP: Enter deep-sleep mode
Returns:
none

References EMC_DynamicControl_DP, and LPC_EMC.

void Lpc177x_8x_EmcSetDynMemoryParameter ( EMC_DYN_MEM_PAR  par,
uint32_t  val 
)

Set the value of EMC dynamic memory registers.

Parameters:
parEMC register that will set value, should be:
  • EMC_DYN_MEM_REFRESH_TIMER: Dynamic Refresh register
  • EMC_DYN_MEM_READ_CONFIG: Dynamic Read Config register
  • EMC_DYN_MEM_TRP: Dynamic RP register
  • EMC_DYN_MEM_TRAS: Dynamic RAS register
  • EMC_DYN_MEM_TSREX: Dynamic SREX register
  • EMC_DYN_MEM_TAPR: Dynamic APR register
  • EMC_DYN_MEM_TDAL: Dynamic DAL register
  • EMC_DYN_MEM_TWR: Dynamic WR register
  • EMC_DYN_MEM_TRC: Dynamic RC register
  • EMC_DYN_MEM_TRFC: Dynamic RFC register
  • EMC_DYN_MEM_TXSR: Dynamic XSR register
  • EMC_DYN_MEM_TRRD: Dynamic RRD register
  • EMC_DYN_MEM_TMRD: Dynamic MRD register
Returns:
none

References EMC_DYN_MEM_READ_CONFIG, EMC_DYN_MEM_REFRESH_TIMER, EMC_DYN_MEM_TAPR, EMC_DYN_MEM_TDAL, EMC_DYN_MEM_TMRD, EMC_DYN_MEM_TRAS, EMC_DYN_MEM_TRC, EMC_DYN_MEM_TRFC, EMC_DYN_MEM_TRP, EMC_DYN_MEM_TRRD, EMC_DYN_MEM_TSREX, EMC_DYN_MEM_TWR, EMC_DYN_MEM_TXSR, and LPC_EMC.

void Lpc177x_8x_EmcStaticExtendedWait ( uint32_t  timeout)

Set extended wait time out for accessing static memory.

Parameters:
timeouttimeout value that will be set
Returns:
none

References LPC_EMC.

void Lpc177x_8x_EmcDynMemConfigMD ( uint32_t  cs,
uint32_t  mem_dev 
)

Configure the memory device.

Parameters:
csnumber of chip select, should be from 0 to 3
mem_devmemory device type, should be:
  • 0x00: Low-power SDRAM
  • 0x01: Low-power SDRAM
  • 0x02: Micron Syncflash
Returns:
none

References LPC_EMC.

void Lpc177x_8x_EmcDynMemConfigAM ( uint32_t  cs,
uint32_t  addr_mapped 
)

Map the address for the memory device.

Parameters:
csnumber of chip select, should be from 0 to 3
addr_mappedaddress where the memory will be mapped
Returns:
none

References _BV, and LPC_EMC.

void Lpc177x_8x_EmcDynMemConfigB ( uint32_t  cs,
uint32_t  buff_control 
)

Enable/disable the buffer.

Parameters:
csnumber of chip select, should be from 0 to 3
buff_controlbuffer control mode, should be: 0 - buffer disabled EMC_StaticConfig_B: buffer enabled for the selected chip select
Returns:
none

References EMC_DynamicConfig_B, and LPC_EMC.

void Lpc177x_8x_EmcDynMemConfigP ( uint32_t  cs,
uint32_t  permission 
)

Configure write permission: protect or not.

Parameters:
csnumber of chip select, should be from 0 to 3
permissionpermission mode, should be: 0 - not protected EMC_StaticConfig_P: write protection enabled
Returns:
none

References EMC_DynamicConfig_P, and LPC_EMC.

void Lpc177x_8x_EmcDynMemRAS ( uint32_t  cs,
uint32_t  ras_val 
)

Set value for RAS latency.

Parameters:
csnumber of chip select, should be from 0 to 3
ras_valRAS value should be in range: 0..3
Returns:
none

References LPC_EMC.

void Lpc177x_8x_EmcDynMemCAS ( uint32_t  cs,
uint32_t  cas_val 
)

Set value for CAS latency.

Parameters:
csnumber of chip select, should be from 0 to 3
cas_valCAS value should be in range: 0..3
Returns:
none

References LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigMW ( uint32_t  cs,
uint32_t  mem_width 
)

Configure the memory bus width.

Parameters:
csnumber of chip select, should be from 0 to 3
mem_widthmemory width, should be:
  • EMC_StaticConfig_MW_8BITS
  • EMC_StaticConfig_MW_16BITS
  • EMC_StaticConfig_MW_32BITS
Returns:
none

References LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigPM ( uint32_t  cs,
uint32_t  page_mode 
)

Configure the page mode.

Parameters:
csnumber of chip select, should be from 0 to 3
page_modepage mode, should be
  • 0: disable
  • EMC_StaticConfig_PM: asynchronous page mode enable
Returns:
none

References EMC_StaticConfig_PM, and LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigPC ( uint32_t  cs,
uint32_t  polarity 
)

Configure the chip select polarity.

Parameters:
csnumber of chip select, should be from 0 to 3
polaritychip select polarity, should be:
  • 0: Active LOW ship select
  • EMC_StaticConfig_PC: Active HIGH chip select
Returns:
none

References EMC_StaticConfig_PC, and LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigPB ( uint32_t  cs,
uint32_t  pb_val 
)

Configure the byte lane state.

Parameters:
csnumber of chip select, should be from 0 to 3
pb_valByte lane state, should be:
  • 0: For reads all bits in BLSn[3:0] are HIGH.
  • EMC_StaticConfig_PB: For reads all bits in BLSn[3:0] are LOW.
Returns:
none

References EMC_StaticConfig_PB, and LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigEW ( uint32_t  cs,
uint32_t  ex_wait 
)

Configure the extended wait value.

Parameters:
csnumber of chip select, should be from 0 to 3
ex_waitExtended wait mode, should be:
  • 0: Extended wait disabled.
  • EMC_StaticConfig_EW: Extended wait enabled.
Returns:
none

References EMC_StaticConfig_EW, and LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigB ( uint32_t  cs,
uint32_t  buf_val 
)

Configure the buffer enable value.

Parameters:
csnumber of chip select, should be from 0 to 3
buf_valBuffer mode, should be:
  • 0: Buffer disabled.
  • EMC_StaticConfig_B: Buffer enabled.
Returns:
none

References EMC_StaticConfig_B, and LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigP ( uint32_t  cs,
uint32_t  permission 
)
void Lpc177x_8x_EmcSetStaticMemoryParameter ( uint32_t  cs,
EMC_STA_MEM_PAR  par,
uint32_t  val 
)

Set the value of LPC_EMC static memory registers.

Parameters:
csnumber of chip select, should be from 0 to 3
parStatic register, should be:
  • EMC_STA_MEM_WAITWEN: StaticWaitWen0 register
  • EMC_STA_MEM_WAITOEN: StaticWaitOen0 register
  • EMC_STA_MEM_WAITRD: StaticWaitRd0 register
  • EMC_STA_MEM_WAITPAGE: StaticWaitPage0 register
  • EMC_STA_MEM_WAITWR: StaticWaitWr0 register
  • EMC_STA_MEM_WAITTURN: StaticWaitTurn0 register
valregister value to set
Returns:
none

References EMC_STA_MEM_WAITOEN, EMC_STA_MEM_WAITPAGE, EMC_STA_MEM_WAITRD, EMC_STA_MEM_WAITTURN, EMC_STA_MEM_WAITWEN, EMC_STA_MEM_WAITWR, and LPC_EMC.