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Nut/OS
4.10.3
API Reference
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Nut/OS
4.10.3
API Reference
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Shutdown Control Register | |
| #define | SHDWC_CR_OFF 0x00000000 |
| Control register offset. | |
| #define | SHDWC_CR (SHDWC_BASE + SHDWC_CR_OFF) |
| Control register address. | |
| #define | SHDWC_SHDW 0x00000001 |
| Shutdown command. | |
| #define | SHDWC_KEY 0xA5000000 |
| Shutdown password. | |
Shutdown Mode Register | |
| #define | SHDWC_MR_OFF 0x00000004 |
| Mode register offset. | |
| #define | SHDWC_MR (SHDWC_BASE + SHDWC_MR_OFF) |
| Mode register address. | |
| #define | SHDWC_WKMODE0 0x00000003 |
| Wake-up 0 mode mask. | |
| #define | SHDWC_WKMODE0_NONE 0x00000000 |
| No detection on the wake-up input. | |
| #define | SHDWC_WKMODE0_HIGH 0x00000001 |
| Low to high level. | |
| #define | SHDWC_WKMODE0_LOW 0x00000002 |
| High to low level. | |
| #define | SHDWC_WKMODE0_ANYLEVEL 0x00000003 |
| Both levels change. | |
| #define | SHDWC_CPTWK0 0x000000F0 |
| Counter on wake-up 0 mask. | |
| #define | SHDWC_CPTWK0_LSB 4 |
| Counter on wake-up 0 LSB. | |
| #define | SHDWC_WKMODE1 0x00000300 |
| Wake-up 1 mode mask. | |
| #define | SHDWC_WKMODE1_NONE 0x00000000 |
| No detection on the wake-up input. | |
| #define | SHDWC_WKMODE1_HIGH 0x00000100 |
| Low to high level. | |
| #define | SHDWC_WKMODE1_LOW 0x00000200 |
| High to low level. | |
| #define | SHDWC_WKMODE1_ANYLEVEL 0x00000300 |
| Both levels change. | |
| #define | SHDWC_CPTWK1 0x0000F000 |
| Counter on wake-up 1 mask. | |
| #define | SHDWC_CPTWK1_LSB 12 |
| Counter on wake-up 1 LSB. | |
| #define | SHDWC_RTTWKEN 0x00010000 |
| Real-time timer wake-up enable. | |
| #define | SHDWC_RTCWKEN 0x00020000 |
| Real-time clock wake-up enable. | |
Shutdown Status Register | |
| #define | SHDWC_SR_OFF 0x00000008 |
| Status register offset. | |
| #define | SHDWC_SR (SHDWC_BASE + SHDWC_SR_OFF) |
| Status register address. | |
| #define | SHDWC_WAKEUP0 0x00000001 |
| Wake-up 0 status. | |
| #define | SHDWC_WAKEUP1 0x00000002 |
| Wake-up 1 status. | |
| #define | SHDWC_FWKUP 0x00000004 |
| Force wake-up status. | |
| #define | SHDWC_RTTWK 0x00010000 |
| Real-time timer wake-up. | |
| #define | SHDWC_RTCWK 0x00020000 |
| Real-time clock wake-up. | |
| #define SHDWC_CR_OFF 0x00000000 |
Control register offset.
Definition at line 54 of file at91_shdwc.h.
| #define SHDWC_CR (SHDWC_BASE + SHDWC_CR_OFF) |
Control register address.
Definition at line 55 of file at91_shdwc.h.
| #define SHDWC_SHDW 0x00000001 |
Shutdown command.
Definition at line 56 of file at91_shdwc.h.
| #define SHDWC_KEY 0xA5000000 |
Shutdown password.
Definition at line 57 of file at91_shdwc.h.
| #define SHDWC_MR_OFF 0x00000004 |
Mode register offset.
Definition at line 62 of file at91_shdwc.h.
| #define SHDWC_MR (SHDWC_BASE + SHDWC_MR_OFF) |
Mode register address.
Definition at line 63 of file at91_shdwc.h.
| #define SHDWC_WKMODE0 0x00000003 |
Wake-up 0 mode mask.
Definition at line 64 of file at91_shdwc.h.
| #define SHDWC_WKMODE0_NONE 0x00000000 |
No detection on the wake-up input.
Definition at line 65 of file at91_shdwc.h.
| #define SHDWC_WKMODE0_HIGH 0x00000001 |
Low to high level.
Definition at line 66 of file at91_shdwc.h.
| #define SHDWC_WKMODE0_LOW 0x00000002 |
High to low level.
Definition at line 67 of file at91_shdwc.h.
| #define SHDWC_WKMODE0_ANYLEVEL 0x00000003 |
Both levels change.
Definition at line 68 of file at91_shdwc.h.
| #define SHDWC_CPTWK0 0x000000F0 |
Counter on wake-up 0 mask.
Definition at line 69 of file at91_shdwc.h.
| #define SHDWC_CPTWK0_LSB 4 |
Counter on wake-up 0 LSB.
Definition at line 70 of file at91_shdwc.h.
| #define SHDWC_WKMODE1 0x00000300 |
Wake-up 1 mode mask.
Definition at line 71 of file at91_shdwc.h.
| #define SHDWC_WKMODE1_NONE 0x00000000 |
No detection on the wake-up input.
Definition at line 72 of file at91_shdwc.h.
| #define SHDWC_WKMODE1_HIGH 0x00000100 |
Low to high level.
Definition at line 73 of file at91_shdwc.h.
| #define SHDWC_WKMODE1_LOW 0x00000200 |
High to low level.
Definition at line 74 of file at91_shdwc.h.
| #define SHDWC_WKMODE1_ANYLEVEL 0x00000300 |
Both levels change.
Definition at line 75 of file at91_shdwc.h.
| #define SHDWC_CPTWK1 0x0000F000 |
Counter on wake-up 1 mask.
Definition at line 76 of file at91_shdwc.h.
| #define SHDWC_CPTWK1_LSB 12 |
Counter on wake-up 1 LSB.
Definition at line 77 of file at91_shdwc.h.
| #define SHDWC_RTTWKEN 0x00010000 |
Real-time timer wake-up enable.
Definition at line 78 of file at91_shdwc.h.
| #define SHDWC_RTCWKEN 0x00020000 |
Real-time clock wake-up enable.
Definition at line 79 of file at91_shdwc.h.
| #define SHDWC_SR_OFF 0x00000008 |
Status register offset.
Definition at line 84 of file at91_shdwc.h.
| #define SHDWC_SR (SHDWC_BASE + SHDWC_SR_OFF) |
Status register address.
Definition at line 85 of file at91_shdwc.h.
| #define SHDWC_WAKEUP0 0x00000001 |
Wake-up 0 status.
Definition at line 86 of file at91_shdwc.h.
| #define SHDWC_WAKEUP1 0x00000002 |
Wake-up 1 status.
Definition at line 87 of file at91_shdwc.h.
| #define SHDWC_FWKUP 0x00000004 |
Force wake-up status.
Definition at line 88 of file at91_shdwc.h.
| #define SHDWC_RTTWK 0x00010000 |
Real-time timer wake-up.
Definition at line 89 of file at91_shdwc.h.
| #define SHDWC_RTCWK 0x00020000 |
Real-time clock wake-up.
Definition at line 90 of file at91_shdwc.h.