Medianut hardware specification. More...
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Defines | |
#define | VS_SCK_PORT PORTB |
#define | VS_SCK_DDR DDRB |
#define | VS_SCK_BIT 0 |
VS1001 serial control interface clock input bit. The first rising clock edge after XCS has gone low marks the first bit to be written to the decoder. | |
#define | VS_SS_PORT PORTB |
#define | VS_SS_DDR DDRB |
#define | VS_SS_BIT 1 |
VS1001 serial data interface clock input bit. | |
#define | VS_SI_PORT PORTB |
#define | VS_SI_DDR DDRB |
#define | VS_SI_BIT 2 |
VS1001 serial control interface data input. The decoder samples this input on the rising edge of SCK if XCS is low. | |
#define | VS_SO_PIN PINB |
#define | VS_SO_DDR DDRB |
#define | VS_SO_BIT 3 |
VS1001 serial control interface data output. If data is transfered from the decoder, bits are shifted out on the falling SCK edge. If data is transfered to the decoder, SO is at a high impedance state. | |
#define | VS_XCS_PORT PORTB |
#define | VS_XCS_DDR DDRB |
#define | VS_XCS_BIT 4 |
VS1001 active low chip select input. A high level forces the serial interface into standby mode, ending the current operation. A high level also forces serial output (SO) to high impedance state. | |
#define | VS_BSYNC_PORT PORTB |
#define | VS_BSYNC_DDR DDRB |
#define | VS_BSYNC_BIT 5 |
VS1001 serial data interface bit sync. The first DCLK sampling edge, during which BSYNC is high, marks the first bit of a data byte. | |
#define | VS_RESET_PORT PORTB |
#define | VS_RESET_DDR DDRB |
#define | VS_RESET_BIT 7 |
VS1001 hardware reset input. | |
#define | VS_DREQ_PORT PORTE |
#define | VS_DREQ_PIN PINE |
#define | VS_DREQ_DDR DDRE |
#define | VS_DREQ_BIT 6 |
VS1001 data request output. | |
#define | LCD_DATA_PORT PORTD |
#define | LCD_DATA_DDR DDRD |
#define | LCD_DATA_BITS 0xF0 |
LCD data lines, either upper or lower 4 bits. | |
#define | LCD_ENABLE_PORT PORTE |
#define | LCD_ENABLE_DDR DDRE |
#define | LCD_ENABLE_BIT 3 |
LCD enable output. | |
#define | LCD_REGSEL_PORT PORTE |
#define | LCD_REGSEL_DDR DDRE |
#define | LCD_REGSEL_BIT 2 |
LCD register select output. | |
#define | LCD_LIGHT_PORT PORTB |
#define | LCD_LIGHT_DDR DDRB |
#define | LCD_LIGHT_BIT 6 |
LCD output to switch backlight. | |
#define | IR_SIGNAL_PORT PORTE |
#define | IR_SIGNAL_PIN PINE |
#define | IR_SIGNAL_DDR DDRE |
#define | IR_SIGNAL_BIT 4 |
Infrared decoder signal bit. |
Medianut hardware specification.
Definition in file medianut.h.